| /rk3399_ARM-atf/include/common/ |
| H A D | bl_common.ld.h | 180 . = ALIGN(CACHE_WRITEBACK_GRANULE); \
184 . = ALIGN(CACHE_WRITEBACK_GRANULE); \
202 . = ALIGN(CACHE_WRITEBACK_GRANULE); \
205 . = ALIGN(CACHE_WRITEBACK_GRANULE); \
230 .per_cpu (NOLOAD) : ALIGN(CACHE_WRITEBACK_GRANULE) { \
235 . = ALIGN(CACHE_WRITEBACK_GRANULE); \
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| /rk3399_ARM-atf/plat/qti/qcs615/inc/ |
| H A D | platform_def.h | 92 #define CACHE_WRITEBACK_GRANULE (1 << ARM_CACHE_WRITEBACK_SHIFT) macro
97 #define PLAT_PERCPU_BAKERY_LOCK_SIZE (1 * CACHE_WRITEBACK_GRANULE)
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| /rk3399_ARM-atf/plat/qti/sc7180/inc/ |
| H A D | platform_def.h | 91 #define CACHE_WRITEBACK_GRANULE (1 << ARM_CACHE_WRITEBACK_SHIFT) macro
96 #define PLAT_PERCPU_BAKERY_LOCK_SIZE (1 * CACHE_WRITEBACK_GRANULE)
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| /rk3399_ARM-atf/plat/qti/kodiak/inc/ |
| H A D | kodiak_def.h | 92 #define CACHE_WRITEBACK_GRANULE (1 << ARM_CACHE_WRITEBACK_SHIFT) macro
97 #define PLAT_PERCPU_BAKERY_LOCK_SIZE (1 * CACHE_WRITEBACK_GRANULE)
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| /rk3399_ARM-atf/plat/nvidia/tegra/scat/ |
| H A D | bl31.scat | 181 __BAKERY_LOCKS__ AlignExpr(ImageLimit(__BSS__), CACHE_WRITEBACK_GRANULE) FIXED
186 …__BAKERY_LOCKS_EPILOGUE__ AlignExpr(ImageLimit(__BAKERY_LOCKS__), CACHE_WRITEBACK_GRANULE) FIXED E…
210 __PMF_TIMESTAMP__ AlignExpr(+0, CACHE_WRITEBACK_GRANULE) FIXED EMPTY CACHE_WRITEBACK_GRANULE
215 …__PMF_TIMESTAMP_EPILOGUE__ AlignExpr(ImageLimit(__PMF_TIMESTAMP__), CACHE_WRITEBACK_GRANULE) FIXED…
219 * CACHE_WRITEBACK_GRANULE boundary
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| /rk3399_ARM-atf/plat/nxp/common/plat_make_helper/ |
| H A D | soc_common_def.mk | 10 $(eval CACHE_WRITEBACK_GRANULE=$(shell echo $$((1 << $(CACHE_LINE)))))
11 $(eval $(call add_define_val,CACHE_WRITEBACK_GRANULE,$(CACHE_WRITEBACK_GRANULE)))
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| /rk3399_ARM-atf/drivers/nxp/crypto/caam/src/auth/ |
| H A D | rsa.c | 41 struct rsa_context ctx __aligned(CACHE_WRITEBACK_GRANULE); in rsa_public_verif_sec()
42 struct job_descriptor jobdesc __aligned(CACHE_WRITEBACK_GRANULE); in rsa_public_verif_sec()
155 uint8_t encoded_hash[RSA_4K_KEY_SZ_BYTES] __aligned(CACHE_WRITEBACK_GRANULE); in rsa_verify_signature()
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| /rk3399_ARM-atf/plat/mediatek/include/armv8_2/ |
| H A D | arch_def.h | 35 #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) macro
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| /rk3399_ARM-atf/plat/mediatek/include/armv9/ |
| H A D | arch_def.h | 33 #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) macro
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| /rk3399_ARM-atf/plat/common/aarch64/ |
| H A D | platform_up_stack.S | 50 PLATFORM_STACK_SIZE, 1, CACHE_WRITEBACK_GRANULE
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| H A D | platform_mp_stack.S | 61 CACHE_WRITEBACK_GRANULE
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| /rk3399_ARM-atf/plat/common/aarch32/ |
| H A D | platform_up_stack.S | 47 PLATFORM_STACK_SIZE, 1, CACHE_WRITEBACK_GRANULE
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| /rk3399_ARM-atf/plat/hisilicon/hikey/include/ |
| H A D | platform_def.h | 83 #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) macro
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| /rk3399_ARM-atf/plat/amlogic/gxl/include/ |
| H A D | platform_def.h | 54 #define CACHE_WRITEBACK_GRANULE (U(1) << CACHE_WRITEBACK_SHIFT) macro
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| /rk3399_ARM-atf/plat/amlogic/g12a/include/ |
| H A D | platform_def.h | 54 #define CACHE_WRITEBACK_GRANULE (U(1) << CACHE_WRITEBACK_SHIFT) macro
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| /rk3399_ARM-atf/plat/amlogic/gxbb/include/ |
| H A D | platform_def.h | 57 #define CACHE_WRITEBACK_GRANULE (U(1) << CACHE_WRITEBACK_SHIFT) macro
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| /rk3399_ARM-atf/plat/amlogic/axg/include/ |
| H A D | platform_def.h | 57 #define CACHE_WRITEBACK_GRANULE (U(1) << CACHE_WRITEBACK_SHIFT) macro
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| /rk3399_ARM-atf/drivers/nxp/crypto/caam/src/ |
| H A D | rng.c | 100 struct job_descriptor desc __aligned(CACHE_WRITEBACK_GRANULE); in instantiate_rng()
133 struct job_descriptor desc __aligned(CACHE_WRITEBACK_GRANULE); in hw_rng_generate()
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| H A D | sec_jr_driver.c | 32 uint8_t ip_ring[SEC_DMA_MEM_INPUT_RING_SIZE] __aligned(CACHE_WRITEBACK_GRANULE);
33 uint8_t op_ring[SEC_DMA_MEM_OUTPUT_RING_SIZE] __aligned(CACHE_WRITEBACK_GRANULE);
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| /rk3399_ARM-atf/bl1/ |
| H A D | bl1_main.c | 109 assert(CACHE_WRITEBACK_GRANULE == SIZE_FROM_LOG2_WORDS(val)); in PMF_REGISTER_SERVICE()
111 assert(CACHE_WRITEBACK_GRANULE <= MAX_CACHE_LINE_SIZE); in PMF_REGISTER_SERVICE()
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| /rk3399_ARM-atf/include/services/trp/ |
| H A D | trp_helpers.h | 33 } __aligned(CACHE_WRITEBACK_GRANULE) trp_args_t;
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| /rk3399_ARM-atf/plat/rockchip/rk3288/include/ |
| H A D | platform_def.h | 82 #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) macro
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| /rk3399_ARM-atf/plat/qti/msm8916/include/ |
| H A D | platform_def.h | 25 #define CACHE_WRITEBACK_GRANULE U(64) macro
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| /rk3399_ARM-atf/plat/imx/imx8qx/include/ |
| H A D | platform_def.h | 16 #define CACHE_WRITEBACK_GRANULE 64 macro
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| /rk3399_ARM-atf/plat/rockchip/rk3576/include/ |
| H A D | platform_def.h | 102 #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) macro
|