| #
4811168a |
| 05-Jan-2021 |
Joanna Farley <joanna.farley@arm.com> |
Merge "Plat AXG: Fix PLAT_MAX_PWR_LVL value" into integration
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| #
47f2445a |
| 29-Dec-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Plat AXG: Fix PLAT_MAX_PWR_LVL value
This patch fixes AXG platform build error:
plat/amlogic/axg/axg_pm.c: In function 'axg_pwr_domain_off':
plat/amlogic/axg/axg_pm.c:124:43: error: array subscript
Plat AXG: Fix PLAT_MAX_PWR_LVL value
This patch fixes AXG platform build error:
plat/amlogic/axg/axg_pm.c: In function 'axg_pwr_domain_off':
plat/amlogic/axg/axg_pm.c:124:43: error: array subscript 2
is above array bounds of 'const plat_local_state_t[2]'
{aka 'const unsigned char[2]'}
by changing PLAT_MAX_PWR_LVL from MPIDR_AFFLVL1 to MPIDR_AFFLVL2
in plat\amlogic\axg\include\platform_def.h.
Change-Id: I9a701e8f26231e62f844920aec5830664f3fb324
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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| #
65f6c3e9 |
| 10-Feb-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "amlogic/axg" into integration
* changes:
amlogic: axg: Add a build flag when using ATOS as BL32
amlogic: axg: Add support for the A113D (AXG) platform
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| #
afd241e7 |
| 24-Jan-2020 |
Carlo Caione <ccaione@baylibre.com> |
amlogic: axg: Add support for the A113D (AXG) platform
Introduce the preliminary support for the Amlogic A113D (AXG) SoC.
This port is a minimal implementation of BL31 capable of booting
mainline U
amlogic: axg: Add support for the A113D (AXG) platform
Introduce the preliminary support for the Amlogic A113D (AXG) SoC.
This port is a minimal implementation of BL31 capable of booting
mainline U-Boot, Linux and chainloading BL32 (ATOS).
Tested on a A113D board.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ic4548fa2f7c48d61b485b2a6517ec36c53c20809
show more ...
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