| /rk3399_ARM-atf/plat/imx/imx93/ |
| H A D | trdc.c | 24 unsigned int trdc_mgr_num = ARRAY_SIZE(trdc_mgr_blks); 28 trdc_a_mbc_glbac, ARRAY_SIZE(trdc_a_mbc_glbac), 29 trdc_a_mbc, ARRAY_SIZE(trdc_a_mbc), 30 trdc_a_mrc_glbac, ARRAY_SIZE(trdc_a_mrc_glbac), 31 trdc_a_mrc, ARRAY_SIZE(trdc_a_mrc) 34 trdc_w_mbc_glbac, ARRAY_SIZE(trdc_w_mbc_glbac), 35 trdc_w_mbc, ARRAY_SIZE(trdc_w_mbc), 36 trdc_w_mrc_glbac, ARRAY_SIZE(trdc_w_mrc_glbac), 37 trdc_w_mrc, ARRAY_SIZE(trdc_w_mrc) 40 trdc_n_mbc_glbac, ARRAY_SIZE(trdc_n_mbc_glbac), [all …]
|
| /rk3399_ARM-atf/plat/xilinx/zynqmp/pm_service/ |
| H A D | pm_api_clock.c | 835 .num_nodes = (uint8_t)ARRAY_SIZE(ignore_unused_pll_nodes), 853 .num_nodes = (uint8_t)ARRAY_SIZE(generic_pll_pre_src_nodes), 861 .num_nodes = (uint8_t)ARRAY_SIZE(generic_pll_half_nodes), 873 .num_nodes = (uint8_t)ARRAY_SIZE(generic_pll_int_nodes), 891 .num_nodes = (uint8_t)ARRAY_SIZE(generic_pll_post_src_nodes), 903 .num_nodes = (uint8_t)ARRAY_SIZE(generic_pll_system_nodes), 911 .num_nodes = (uint8_t)ARRAY_SIZE(generic_pll_nodes), 929 .num_nodes = (uint8_t)ARRAY_SIZE(generic_pll_pre_src_nodes), 937 .num_nodes = (uint8_t)ARRAY_SIZE(generic_pll_half_nodes), 949 .num_nodes = (uint8_t)ARRAY_SIZE(generic_pll_int_nodes), [all …]
|
| /rk3399_ARM-atf/plat/marvell/octeontx/otx2/t91/t9130_cex7_eval/board/ |
| H A D | marvell_plat_config.c | 38 *size = ARRAY_SIZE(amb_memory_map_cp0); in marvell_get_amb_memory_map() 42 *size = ARRAY_SIZE(amb_memory_map_cp1); in marvell_get_amb_memory_map() 109 *size = ARRAY_SIZE(io_win_memory_map); in marvell_get_io_win_memory_map() 164 *size = ARRAY_SIZE(iob_memory_map_cp0); in marvell_get_iob_memory_map() 168 *size = ARRAY_SIZE(iob_memory_map_cp1); in marvell_get_iob_memory_map() 172 *size = ARRAY_SIZE(iob_memory_map_cp2); in marvell_get_iob_memory_map() 209 *size = ARRAY_SIZE(ccu_memory_map); in marvell_get_ccu_memory_map()
|
| /rk3399_ARM-atf/plat/arm/board/fvp/ |
| H A D | fvp_gicv5.c | 20 .num_spis = ARRAY_SIZE(irs0_spis), 26 .num_wires = ARRAY_SIZE(iwb0_wires) 32 .num_irss = ARRAY_SIZE(irss), 33 .num_iwbs = ARRAY_SIZE(iwbs)
|
| /rk3399_ARM-atf/plat/marvell/octeontx/otx2/t91/t9130/board/ |
| H A D | marvell_plat_config.c | 32 *size = ARRAY_SIZE(amb_memory_map_cp0); in marvell_get_amb_memory_map() 86 *size = ARRAY_SIZE(io_win_memory_map); in marvell_get_io_win_memory_map() 133 *size = ARRAY_SIZE(iob_memory_map_cp0); in marvell_get_iob_memory_map() 137 *size = ARRAY_SIZE(iob_memory_map_cp1); in marvell_get_iob_memory_map() 141 *size = ARRAY_SIZE(iob_memory_map_cp2); in marvell_get_iob_memory_map() 177 *size = ARRAY_SIZE(ccu_memory_map); in marvell_get_ccu_memory_map()
|
| /rk3399_ARM-atf/plat/arm/board/tc/ |
| H A D | tc_sfcp.c | 34 assert(link_id < ARRAY_SIZE(sender_devices)); in sfcp_platform_get_send_device() 48 assert(link_id < ARRAY_SIZE(receiver_devices)); in sfcp_platform_get_receive_device() 56 for (uint8_t i = 1; i < ARRAY_SIZE(receiver_devices); i++) { in sfcp_platform_get_receive_link_id() 93 *routing_tables_size = ARRAY_SIZE(ap_monitor_routing_tables); in sfcp_platform_get_routing_tables()
|
| /rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv3/ |
| H A D | rdv3_sfcp.c | 34 assert(link_id < ARRAY_SIZE(sender_devices)); in sfcp_platform_get_send_device() 48 assert(link_id < ARRAY_SIZE(receiver_devices)); in sfcp_platform_get_receive_device() 56 for (uint8_t i = 1; i < ARRAY_SIZE(receiver_devices); i++) { in sfcp_platform_get_receive_link_id() 92 *routing_tables_size = ARRAY_SIZE(ap_monitor_routing_tables); in sfcp_platform_get_routing_tables()
|
| /rk3399_ARM-atf/plat/nxp/soc-ls1028a/ |
| H A D | soc.c | 193 cci_init(NXP_CCI_ADDR, cci_map, ARRAY_SIZE(cci_map)); in soc_early_init() 198 get_cluster_info(soc_list, ARRAY_SIZE(soc_list), &num_clusters, &cores_per_cluster); in soc_early_init() 291 get_cluster_info(soc_list, ARRAY_SIZE(soc_list), &num_clusters, &cores_per_cluster); in plat_get_power_domain_tree_desc() 313 get_cluster_info(soc_list, ARRAY_SIZE(soc_list), &num_clusters, &cores_per_cluster); in plat_ls_get_cluster_core_count() 342 ARRAY_SIZE(ls_interrupt_props), in soc_platform_setup() 355 get_cluster_info(soc_list, ARRAY_SIZE(soc_list), &num_clusters, &cores_per_cluster); in soc_init() 367 cci_init(NXP_CCI_ADDR, cci_map, ARRAY_SIZE(cci_map)); in soc_init() 410 get_cluster_info(soc_list, ARRAY_SIZE(soc_list), &num_clusters, &cores_per_cluster); in get_tot_num_cores() 419 get_cluster_info(soc_list, ARRAY_SIZE(soc_list), &num_clusters, &cores_per_cluster); in get_pmu_idle_cluster_mask() 428 get_cluster_info(soc_list, ARRAY_SIZE(soc_list), &num_clusters, &cores_per_cluster); in get_pmu_flush_cluster_mask()
|
| /rk3399_ARM-atf/plat/marvell/armada/a8k/a80x0_mcbin/board/ |
| H A D | marvell_plat_config.c | 67 *size = ARRAY_SIZE(amb_memory_map); in marvell_get_amb_memory_map() 102 *size = ARRAY_SIZE(io_win_memory_map); in marvell_get_io_win_memory_map() 142 *size = ARRAY_SIZE(iob_memory_map_cp0); in marvell_get_iob_memory_map() 146 *size = ARRAY_SIZE(iob_memory_map_cp1); in marvell_get_iob_memory_map() 185 *size = ARRAY_SIZE(ccu_memory_map); in marvell_get_ccu_memory_map()
|
| /rk3399_ARM-atf/plat/imx/imx8ulp/ |
| H A D | apd_context.c | 240 for (i = 0U; i < ARRAY_SIZE(pll2); i++) { in cgc1_save() 245 for (i = 0U; i < ARRAY_SIZE(pll3); i++) { in cgc1_save() 250 for (i = 0U; i < ARRAY_SIZE(cgc1); i++) { in cgc1_save() 260 for (i = 0U; i < ARRAY_SIZE(pll2); i++) { in cgc1_restore() 288 for (i = 0U; i < ARRAY_SIZE(cgc1); i++) { in cgc1_restore() 371 for (i = 0U; i < ARRAY_SIZE(cgc2); i++) { in lpav_ctx_save() 376 for (i = 0U; i < ARRAY_SIZE(pll4); i++) { in lpav_ctx_save() 381 for (i = 0U; i < ARRAY_SIZE(pcc5_0); i++) { in lpav_ctx_save() 388 for (i = 0U; i < ARRAY_SIZE(pcc5_1); i++) { in lpav_ctx_save() 396 for (i = 0U; i < ARRAY_SIZE(lpav_sim); i++) { in lpav_ctx_save() [all …]
|
| /rk3399_ARM-atf/plat/marvell/armada/a8k/a70x0_mochabin/board/ |
| H A D | marvell_plat_config.c | 35 *size = ARRAY_SIZE(amb_memory_map); in marvell_get_amb_memory_map() 66 *size = ARRAY_SIZE(io_win_memory_map); in marvell_get_io_win_memory_map() 93 *size = ARRAY_SIZE(iob_memory_map); in marvell_get_iob_memory_map() 128 *size = ARRAY_SIZE(ccu_memory_map); in marvell_get_ccu_memory_map()
|
| /rk3399_ARM-atf/plat/marvell/armada/a8k/a80x0_puzzle/board/ |
| H A D | marvell_plat_config.c | 67 *size = ARRAY_SIZE(amb_memory_map); in marvell_get_amb_memory_map() 106 *size = ARRAY_SIZE(io_win_memory_map); in marvell_get_io_win_memory_map() 146 *size = ARRAY_SIZE(iob_memory_map_cp0); in marvell_get_iob_memory_map() 150 *size = ARRAY_SIZE(iob_memory_map_cp1); in marvell_get_iob_memory_map() 186 *size = ARRAY_SIZE(ccu_memory_map); in marvell_get_ccu_memory_map()
|
| /rk3399_ARM-atf/plat/socionext/uniphier/ |
| H A D | uniphier_boot_device.c | 82 assert(boot_sel < ARRAY_SIZE(uniphier_ld11_boot_device_table)); in uniphier_ld11_get_boot_device() 110 assert(boot_sel < ARRAY_SIZE(uniphier_pxs3_boot_device_table)); in uniphier_pxs3_get_boot_device() 146 assert(soc < ARRAY_SIZE(uniphier_boot_device_info)); in uniphier_get_boot_device() 149 assert(soc < ARRAY_SIZE(uniphier_boot_device_info)); in uniphier_get_boot_device() 174 assert(soc < ARRAY_SIZE(uniphier_have_onchip_scp)); in uniphier_get_boot_master() 179 assert(soc < ARRAY_SIZE(uniphier_boot_device_info)); in uniphier_get_boot_master()
|
| H A D | uniphier_gicv3.c | 64 .interrupt_props_num = ARRAY_SIZE(uniphier_interrupt_props), 73 .interrupt_props_num = ARRAY_SIZE(uniphier_interrupt_props), 82 .interrupt_props_num = ARRAY_SIZE(uniphier_interrupt_props), 91 assert(soc < ARRAY_SIZE(uniphier_gic_driver_data)); in uniphier_gic_driver_init()
|
| /rk3399_ARM-atf/drivers/st/pmic/ |
| H A D | stpmic1.c | 443 .voltage_table_size = ARRAY_SIZE(buck1_voltage_table), 457 .voltage_table_size = ARRAY_SIZE(buck2_voltage_table), 471 .voltage_table_size = ARRAY_SIZE(buck3_voltage_table), 485 .voltage_table_size = ARRAY_SIZE(buck4_voltage_table), 499 .voltage_table_size = ARRAY_SIZE(ldo1_voltage_table), 511 .voltage_table_size = ARRAY_SIZE(ldo2_voltage_table), 523 .voltage_table_size = ARRAY_SIZE(ldo3_voltage_table), 535 .voltage_table_size = ARRAY_SIZE(ldo4_voltage_table), 547 .voltage_table_size = ARRAY_SIZE(ldo5_voltage_table), 559 .voltage_table_size = ARRAY_SIZE(ldo6_voltage_table), [all …]
|
| /rk3399_ARM-atf/plat/marvell/armada/a8k/a80x0/board/ |
| H A D | marvell_plat_config.c | 33 *size = ARRAY_SIZE(amb_memory_map); in marvell_get_amb_memory_map() 72 *size = ARRAY_SIZE(io_win_memory_map); in marvell_get_io_win_memory_map() 112 *size = ARRAY_SIZE(iob_memory_map_cp0); in marvell_get_iob_memory_map() 116 *size = ARRAY_SIZE(iob_memory_map_cp1); in marvell_get_iob_memory_map() 155 *size = ARRAY_SIZE(ccu_memory_map); in marvell_get_ccu_memory_map()
|
| /rk3399_ARM-atf/plat/imx/imx8ulp/scmi/ |
| H A D | scmi.c | 27 assert(agent_id < ARRAY_SIZE(scmi_channel)); in plat_scmi_get_channel() 54 return ARRAY_SIZE(plat_protocol_list) - 1U; in plat_scmi_protocol_count() 66 for (i = 0U; i < ARRAY_SIZE(scmi_channel); i++) { in imx8ulp_init_scmi_server()
|
| /rk3399_ARM-atf/plat/marvell/armada/a8k/a70x0/board/ |
| H A D | marvell_plat_config.c | 33 *size = ARRAY_SIZE(amb_memory_map); in marvell_get_amb_memory_map() 64 *size = ARRAY_SIZE(io_win_memory_map); in marvell_get_io_win_memory_map() 91 *size = ARRAY_SIZE(iob_memory_map); in marvell_get_iob_memory_map() 126 *size = ARRAY_SIZE(ccu_memory_map); in marvell_get_ccu_memory_map()
|
| /rk3399_ARM-atf/plat/marvell/armada/a8k/a70x0_amc/board/ |
| H A D | marvell_plat_config.c | 30 *size = ARRAY_SIZE(amb_memory_map); in marvell_get_amb_memory_map() 61 *size = ARRAY_SIZE(io_win_memory_map); in marvell_get_io_win_memory_map() 82 *size = ARRAY_SIZE(iob_memory_map); in marvell_get_iob_memory_map() 117 *size = ARRAY_SIZE(ccu_memory_map); in marvell_get_ccu_memory_map()
|
| /rk3399_ARM-atf/plat/intel/soc/agilex5/soc/ |
| H A D | agilex5_pinmux.c | 228 for (i = 0; i < ARRAY_SIZE(hoff_ptr->pinmux_sel_array); i += 2) { in config_pinmux() 234 for (i = 0; i < ARRAY_SIZE(hoff_ptr->pinmux_io_array); i += 2) { in config_pinmux() 245 for (i = 0; i < (ARRAY_SIZE(hoff_ptr->pinmux_fpga_array) - 4); i += 2) { in config_pinmux() 251 for (i = 0; i < ARRAY_SIZE(hoff_ptr->pinmux_iodelay_array); i += 2) { in config_pinmux()
|
| /rk3399_ARM-atf/plat/nxp/soc-ls1088a/ |
| H A D | soc.c | 69 get_cluster_info(soc_list, ARRAY_SIZE(soc_list), &num_clusters, &cores_per_cluster); in plat_get_power_domain_tree_desc() 105 get_cluster_info(soc_list, ARRAY_SIZE(soc_list), &num_clusters, &cores_per_cluster); in get_tot_num_cores() 117 get_cluster_info(soc_list, ARRAY_SIZE(soc_list), &num_clusters, &cores_per_cluster); in get_pmu_idle_cluster_mask() 129 get_cluster_info(soc_list, ARRAY_SIZE(soc_list), &num_clusters, &cores_per_cluster); in get_pmu_flush_cluster_mask() 331 ARRAY_SIZE(ls_interrupt_props), in soc_platform_setup() 356 cci_init(NXP_CCI_ADDR, cci_map, ARRAY_SIZE(cci_map)); in soc_init() 361 get_cluster_info(soc_list, ARRAY_SIZE(soc_list), &num_clusters, &cores_per_cluster); in soc_init()
|
| /rk3399_ARM-atf/plat/arm/common/ |
| H A D | arm_nor_psci_mem_protect.c | 105 ARRAY_SIZE(arm_ram_ranges), in arm_nor_psci_do_dyn_mem_protect() 125 ARRAY_SIZE(arm_ram_ranges)); in arm_nor_psci_do_static_mem_protect() 136 ARRAY_SIZE(arm_ram_ranges), in arm_psci_mem_protect_chk()
|
| /rk3399_ARM-atf/plat/rockchip/common/scmi/ |
| H A D | scmi.c | 55 assert(agent_id < ARRAY_SIZE(rockchip_scmi_protocol_table)); in plat_scmi_protocol_list() 76 assert(agent_id < ARRAY_SIZE(scmi_channel)); in plat_scmi_get_channel() 87 for (i = 0U; i < ARRAY_SIZE(scmi_channel); i++) in rockchip_init_scmi_server()
|
| /rk3399_ARM-atf/plat/rockchip/rk3576/drivers/pmu/ |
| H A D | pm_pd_regs.c | 345 rockchip_reg_rgn_save(pd_usb2phy_reg_rgns, ARRAY_SIZE(pd_usb2phy_reg_rgns)); in pd_usb2phy_save() 350 rockchip_reg_rgn_restore(pd_usb2phy_reg_rgns, ARRAY_SIZE(pd_usb2phy_reg_rgns)); in pd_usb2phy_restore() 361 rockchip_reg_rgn_save(pd_bcore_reg_rgns, ARRAY_SIZE(pd_bcore_reg_rgns)); in pd_bcore_save() 374 rockchip_reg_rgn_restore(pd_bcore_reg_rgns, ARRAY_SIZE(pd_bcore_reg_rgns)); in pd_bcore_restore() 401 rockchip_reg_rgn_save(pd_core_reg_rgns, ARRAY_SIZE(pd_core_reg_rgns)); in pd_core_save() 410 rockchip_reg_rgn_restore(pd_core_reg_rgns, ARRAY_SIZE(pd_core_reg_rgns)); in pd_core_restore() 436 rockchip_reg_rgn_save(pd_php_reg_rgns, ARRAY_SIZE(pd_php_reg_rgns)); in pd_php_save() 441 rockchip_reg_rgn_restore(pd_php_reg_rgns, ARRAY_SIZE(pd_php_reg_rgns)); in pd_php_restore() 446 rockchip_alloc_region_mem(qos_reg_rgns, ARRAY_SIZE(qos_reg_rgns)); in pm_reg_rgns_init() 447 rockchip_alloc_region_mem(pd_bcore_reg_rgns, ARRAY_SIZE(pd_bcore_reg_rgns)); in pm_reg_rgns_init() [all …]
|
| /rk3399_ARM-atf/plat/st/stm32mp1/ |
| H A D | stm32mp1_scmi.c | 68 assert(agent_id < ARRAY_SIZE(scmi_channel)); in plat_scmi_get_channel() 140 .clock_count = ARRAY_SIZE(stm32_scmi0_clock), 142 .rstd_count = ARRAY_SIZE(stm32_scmi0_reset_domain), 146 .clock_count = ARRAY_SIZE(stm32_scmi1_clock), 152 assert(agent_id < ARRAY_SIZE(agent_resources)); in find_resource() 163 for (n = 0U; n < ARRAY_SIZE(agent_resources); n++) { in plat_scmi_protocol_count_paranoid() 170 for (n = 0U; n < ARRAY_SIZE(agent_resources); n++) { in plat_scmi_protocol_count_paranoid() 203 const size_t count = ARRAY_SIZE(plat_protocol_list) - 1U; in plat_scmi_protocol_count() 213 (ARRAY_SIZE(plat_protocol_list) - 1U)); in plat_scmi_protocol_list() 450 for (i = 0U; i < ARRAY_SIZE(scmi_channel); i++) { in stm32mp1_init_scmi_server() [all …]
|