| #
88b2d813 |
| 06-Sep-2023 |
Yann Gautier <yann.gautier@st.com> |
Merge "fix(scmi): add parameter for plat_scmi_clock_rates_array" into integration
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| #
ca9d6edc |
| 26-Jun-2023 |
XiaoDong Huang <derrick.huang@rock-chips.com> |
fix(scmi): add parameter for plat_scmi_clock_rates_array
Pass "start_idx" to plat_scmi_clock_rates_array.
This parameter is required to obtain the rate table
a second time.
Signed-off-by: XiaoDong
fix(scmi): add parameter for plat_scmi_clock_rates_array
Pass "start_idx" to plat_scmi_clock_rates_array.
This parameter is required to obtain the rate table
a second time.
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: I97c6751e7d34c839ced8f22bddc39fb534978cc4
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|
| #
0ca4b4b7 |
| 22-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "clock_framework" into integration
* changes:
feat(st): use newly introduced clock framework
feat(clk): add a minimal clock framework
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| #
33667d29 |
| 30-Aug-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
feat(st): use newly introduced clock framework
Replace calls to stm32mp_clk_enable() / stm32mp_clk_disable() /
stm32mp_clk_get_rate() with clk_enable() / clk_disable() /
clk_get_rate().
Change-Id:
feat(st): use newly introduced clock framework
Replace calls to stm32mp_clk_enable() / stm32mp_clk_disable() /
stm32mp_clk_get_rate() with clk_enable() / clk_disable() /
clk_get_rate().
Change-Id: I15d2ce57b9499211fa522a1b53eeee9cf584c111
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
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| #
26dccba6 |
| 27-Jan-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "scmi-msg" into integration
* changes:
doc: maintainers: add scmi server
drivers: move scmi-msg out of st
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| #
b4734308 |
| 20-Jan-2021 |
Peng Fan <peng.fan@nxp.com> |
drivers: move scmi-msg out of st
Make the scmi-msg driver reused by others.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Change-Id: I5bc35fd4dab70f45c09b8aab65af4209cf23b124
|
| #
43f7d887 |
| 22-Jul-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "stm32-scmi" into integration
* changes:
stm32mp1: SCMI clock and reset service in SP_MIN
dts: bindings: stm32mp1: define SCMI clock and reset domain IDs
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| #
fdaaaeb4 |
| 16-Jul-2020 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: SCMI clock and reset service in SP_MIN
This change implements platform services for stm32mp1 to expose clock
and reset controllers over SCMI clock and reset domain protocols
in sp_min firm
stm32mp1: SCMI clock and reset service in SP_MIN
This change implements platform services for stm32mp1 to expose clock
and reset controllers over SCMI clock and reset domain protocols
in sp_min firmware.
Requests execution use a fastcall SMC context using a SiP function ID.
The setup allows the create SCMI channels by assigning a specific
SiP SMC function ID for each channel/agent identifier defined. In this
change, stm32mp1 exposes a single channel and hence expects single
agent at a time.
The input payload in copied in secure memory before the message
in passed through the SCMI server drivers. BL32/sp_min is invoked
for a single SCMI message processing and always returns with a
synchronous response message passed back to the caller agent.
This change fixes and updates STM32_COMMON_SIP_NUM_CALLS that was
previously wrongly set 4 whereas only 1 SiP SMC function ID was to
be counted. STM32_COMMON_SIP_NUM_CALLS is now set to 3 since the
2 added SiP SMC function IDs for SCMI services.
Change-Id: Icb428775856b9aec00538172aea4cf11e609b033
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
show more ...
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