Searched refs:bus2 (Results 1 – 18 of 18) sorted by relevance
25 bus2 = await MessageBus(bus_type=BusType.SYSTEM).connect()32 introspection = await bus2.introspect(bus_name, '/test/path')34 obj = bus2.get_proxy_object(bus_name, '/test/path', introspection)
471 gmac0_rx_bus2: gmac0-rx-bus2 {480 gmac0_tx_bus2: gmac0-tx-bus2 {526 gmac1m0_rx_bus2: gmac1m0-rx-bus2 {535 gmac1m0_tx_bus2: gmac1m0-tx-bus2 {579 gmac1m1_rx_bus2: gmac1m1-rx-bus2 {588 gmac1m1_tx_bus2: gmac1m1-tx-bus2 {2176 gmac0_tx_bus2_level3: gmac0-tx-bus2-level3 {2196 gmac1m0_tx_bus2_level3: gmac1m0-tx-bus2-level3 {2216 gmac1m1_tx_bus2_level3: gmac1m1-tx-bus2-level3 {
70 gmac0_rx_bus2: gmac0-rx-bus2 {80 gmac0_tx_bus2: gmac0-tx-bus2 {
415 gmac1_rx_bus2: gmac1-rx-bus2 {425 gmac1_tx_bus2: gmac1-tx-bus2 {
175 soc-bus2 {
78 gmac0_rx_bus2: gmac0-rx-bus2 {89 gmac0_tx_bus2: gmac0-tx-bus2 {
592 gmac0_rx_bus2: gmac0-rx-bus2 {603 gmac0_tx_bus2: gmac0-tx-bus2 {661 gmac1m0_rx_bus2: gmac1m0-rx-bus2 {672 gmac1m0_tx_bus2: gmac1m0-tx-bus2 {728 gmac1m1_rx_bus2: gmac1m1-rx-bus2 {739 gmac1m1_tx_bus2: gmac1m1-tx-bus2 {3011 gmac0_tx_bus2_level3: gmac0-tx-bus2-level3 {3035 gmac1m0_tx_bus2_level3: gmac1m0-tx-bus2-level3 {3059 gmac1m1_tx_bus2_level3: gmac1m1-tx-bus2-level3 {
453 gmac1_rx_bus2: gmac1-rx-bus2 {464 gmac1_tx_bus2: gmac1-tx-bus2 {
223 soc-bus2 {
371 soc-bus2 {
29 and "samsung,exynos5433-cmu-bus2" - clock controller compatible for CMU_BUS119 Input clocks for bus2 clock controller:344 compatible = "samsung,exynos5433-cmu-bus2";
26 bus_gscl: bus2 {
412 compatible = "samsung,exynos5433-cmu-bus2";
1058 rgmiim0_bus2: rgmiim0-bus2 {1110 rgmiim1_bus2: rgmiim1-bus2 {1915 rmiim0_bus2: rmiim0-bus2 {1939 rmiim1_bus2: rmiim1-bus2 {
249 soc-bus2 {
659 u8 bus2; member
3595 For example, to override I2C bus2: