xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Samsung's Exynos5433 SoC Memory interface and AMBA bus device tree source
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2016 Samsung Electronics Co., Ltd.
6*4882a593Smuzhiyun * Chanwoo Choi <cw00.choi@samsung.com>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun&soc {
10*4882a593Smuzhiyun	bus_g2d_400: bus0 {
11*4882a593Smuzhiyun		compatible = "samsung,exynos-bus";
12*4882a593Smuzhiyun		clocks = <&cmu_top CLK_ACLK_G2D_400>;
13*4882a593Smuzhiyun		clock-names = "bus";
14*4882a593Smuzhiyun		operating-points-v2 = <&bus_g2d_400_opp_table>;
15*4882a593Smuzhiyun		status = "disabled";
16*4882a593Smuzhiyun	};
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	bus_g2d_266: bus1 {
19*4882a593Smuzhiyun		compatible = "samsung,exynos-bus";
20*4882a593Smuzhiyun		clocks = <&cmu_top CLK_ACLK_G2D_266>;
21*4882a593Smuzhiyun		clock-names = "bus";
22*4882a593Smuzhiyun		operating-points-v2 = <&bus_g2d_266_opp_table>;
23*4882a593Smuzhiyun		status = "disabled";
24*4882a593Smuzhiyun	};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun	bus_gscl: bus2 {
27*4882a593Smuzhiyun		compatible = "samsung,exynos-bus";
28*4882a593Smuzhiyun		clocks = <&cmu_top CLK_ACLK_GSCL_333>;
29*4882a593Smuzhiyun		clock-names = "bus";
30*4882a593Smuzhiyun		operating-points-v2 = <&bus_gscl_opp_table>;
31*4882a593Smuzhiyun		status = "disabled";
32*4882a593Smuzhiyun	};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun	bus_hevc: bus3 {
35*4882a593Smuzhiyun		compatible = "samsung,exynos-bus";
36*4882a593Smuzhiyun		clocks = <&cmu_top CLK_ACLK_HEVC_400>;
37*4882a593Smuzhiyun		clock-names = "bus";
38*4882a593Smuzhiyun		operating-points-v2 = <&bus_hevc_opp_table>;
39*4882a593Smuzhiyun		status = "disabled";
40*4882a593Smuzhiyun	};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun	bus_jpeg: bus4 {
43*4882a593Smuzhiyun		compatible = "samsung,exynos-bus";
44*4882a593Smuzhiyun		clocks = <&cmu_top CLK_SCLK_JPEG_MSCL>;
45*4882a593Smuzhiyun		clock-names = "bus";
46*4882a593Smuzhiyun		operating-points-v2 = <&bus_g2d_400_opp_table>;
47*4882a593Smuzhiyun		status = "disabled";
48*4882a593Smuzhiyun	};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun	bus_mfc: bus5 {
51*4882a593Smuzhiyun		compatible = "samsung,exynos-bus";
52*4882a593Smuzhiyun		clocks = <&cmu_top CLK_ACLK_MFC_400>;
53*4882a593Smuzhiyun		clock-names = "bus";
54*4882a593Smuzhiyun		operating-points-v2 = <&bus_g2d_400_opp_table>;
55*4882a593Smuzhiyun		status = "disabled";
56*4882a593Smuzhiyun	};
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun	bus_mscl: bus6 {
59*4882a593Smuzhiyun		compatible = "samsung,exynos-bus";
60*4882a593Smuzhiyun		clocks = <&cmu_top CLK_ACLK_MSCL_400>;
61*4882a593Smuzhiyun		clock-names = "bus";
62*4882a593Smuzhiyun		operating-points-v2 = <&bus_g2d_400_opp_table>;
63*4882a593Smuzhiyun		status = "disabled";
64*4882a593Smuzhiyun	};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun	bus_noc0: bus7 {
67*4882a593Smuzhiyun		compatible = "samsung,exynos-bus";
68*4882a593Smuzhiyun		clocks = <&cmu_top CLK_ACLK_BUS0_400>;
69*4882a593Smuzhiyun		clock-names = "bus";
70*4882a593Smuzhiyun		operating-points-v2 = <&bus_hevc_opp_table>;
71*4882a593Smuzhiyun		status = "disabled";
72*4882a593Smuzhiyun	};
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun	bus_noc1: bus8 {
75*4882a593Smuzhiyun		compatible = "samsung,exynos-bus";
76*4882a593Smuzhiyun		clocks = <&cmu_top CLK_ACLK_BUS1_400>;
77*4882a593Smuzhiyun		clock-names = "bus";
78*4882a593Smuzhiyun		operating-points-v2 = <&bus_hevc_opp_table>;
79*4882a593Smuzhiyun		status = "disabled";
80*4882a593Smuzhiyun	};
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun	bus_noc2: bus9 {
83*4882a593Smuzhiyun		compatible = "samsung,exynos-bus";
84*4882a593Smuzhiyun		clocks = <&cmu_mif CLK_ACLK_BUS2_400>;
85*4882a593Smuzhiyun		clock-names = "bus";
86*4882a593Smuzhiyun		operating-points-v2 = <&bus_noc2_opp_table>;
87*4882a593Smuzhiyun		status = "disabled";
88*4882a593Smuzhiyun	};
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun	bus_g2d_400_opp_table: opp_table2 {
91*4882a593Smuzhiyun		compatible = "operating-points-v2";
92*4882a593Smuzhiyun		opp-shared;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun		opp-400000000 {
95*4882a593Smuzhiyun			opp-hz = /bits/ 64 <400000000>;
96*4882a593Smuzhiyun			opp-microvolt = <1075000>;
97*4882a593Smuzhiyun		};
98*4882a593Smuzhiyun		opp-267000000 {
99*4882a593Smuzhiyun			opp-hz = /bits/ 64 <267000000>;
100*4882a593Smuzhiyun			opp-microvolt = <1000000>;
101*4882a593Smuzhiyun		};
102*4882a593Smuzhiyun		opp-200000000 {
103*4882a593Smuzhiyun			opp-hz = /bits/ 64 <200000000>;
104*4882a593Smuzhiyun			opp-microvolt = <975000>;
105*4882a593Smuzhiyun		};
106*4882a593Smuzhiyun		opp-160000000 {
107*4882a593Smuzhiyun			opp-hz = /bits/ 64 <160000000>;
108*4882a593Smuzhiyun			opp-microvolt = <962500>;
109*4882a593Smuzhiyun		};
110*4882a593Smuzhiyun		opp-134000000 {
111*4882a593Smuzhiyun			opp-hz = /bits/ 64 <134000000>;
112*4882a593Smuzhiyun			opp-microvolt = <950000>;
113*4882a593Smuzhiyun		};
114*4882a593Smuzhiyun		opp-100000000 {
115*4882a593Smuzhiyun			opp-hz = /bits/ 64 <100000000>;
116*4882a593Smuzhiyun			opp-microvolt = <937500>;
117*4882a593Smuzhiyun		};
118*4882a593Smuzhiyun	};
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun	bus_g2d_266_opp_table: opp_table3 {
121*4882a593Smuzhiyun		compatible = "operating-points-v2";
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun		opp-267000000 {
124*4882a593Smuzhiyun			opp-hz = /bits/ 64 <267000000>;
125*4882a593Smuzhiyun		};
126*4882a593Smuzhiyun		opp-200000000 {
127*4882a593Smuzhiyun			opp-hz = /bits/ 64 <200000000>;
128*4882a593Smuzhiyun		};
129*4882a593Smuzhiyun		opp-160000000 {
130*4882a593Smuzhiyun			opp-hz = /bits/ 64 <160000000>;
131*4882a593Smuzhiyun		};
132*4882a593Smuzhiyun		opp-134000000 {
133*4882a593Smuzhiyun			opp-hz = /bits/ 64 <134000000>;
134*4882a593Smuzhiyun		};
135*4882a593Smuzhiyun		opp-100000000 {
136*4882a593Smuzhiyun			opp-hz = /bits/ 64 <100000000>;
137*4882a593Smuzhiyun		};
138*4882a593Smuzhiyun	};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun	bus_gscl_opp_table: opp_table4 {
141*4882a593Smuzhiyun		compatible = "operating-points-v2";
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun		opp-333000000 {
144*4882a593Smuzhiyun			opp-hz = /bits/ 64 <333000000>;
145*4882a593Smuzhiyun		};
146*4882a593Smuzhiyun		opp-222000000 {
147*4882a593Smuzhiyun			opp-hz = /bits/ 64 <222000000>;
148*4882a593Smuzhiyun		};
149*4882a593Smuzhiyun		opp-166500000 {
150*4882a593Smuzhiyun			opp-hz = /bits/ 64 <166500000>;
151*4882a593Smuzhiyun		};
152*4882a593Smuzhiyun	};
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun	bus_hevc_opp_table: opp_table5 {
155*4882a593Smuzhiyun		compatible = "operating-points-v2";
156*4882a593Smuzhiyun		opp-shared;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun		opp-400000000 {
159*4882a593Smuzhiyun			opp-hz = /bits/ 64 <400000000>;
160*4882a593Smuzhiyun		};
161*4882a593Smuzhiyun		opp-267000000 {
162*4882a593Smuzhiyun			opp-hz = /bits/ 64 <267000000>;
163*4882a593Smuzhiyun		};
164*4882a593Smuzhiyun		opp-200000000 {
165*4882a593Smuzhiyun			opp-hz = /bits/ 64 <200000000>;
166*4882a593Smuzhiyun		};
167*4882a593Smuzhiyun		opp-160000000 {
168*4882a593Smuzhiyun			opp-hz = /bits/ 64 <160000000>;
169*4882a593Smuzhiyun		};
170*4882a593Smuzhiyun		opp-134000000 {
171*4882a593Smuzhiyun			opp-hz = /bits/ 64 <134000000>;
172*4882a593Smuzhiyun		};
173*4882a593Smuzhiyun		opp-100000000 {
174*4882a593Smuzhiyun			opp-hz = /bits/ 64 <100000000>;
175*4882a593Smuzhiyun		};
176*4882a593Smuzhiyun	};
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun	bus_noc2_opp_table: opp_table6 {
179*4882a593Smuzhiyun		compatible = "operating-points-v2";
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun		opp-400000000 {
182*4882a593Smuzhiyun			opp-hz = /bits/ 64 <400000000>;
183*4882a593Smuzhiyun		};
184*4882a593Smuzhiyun		opp-200000000 {
185*4882a593Smuzhiyun			opp-hz = /bits/ 64 <200000000>;
186*4882a593Smuzhiyun		};
187*4882a593Smuzhiyun		opp-134000000 {
188*4882a593Smuzhiyun			opp-hz = /bits/ 64 <134000000>;
189*4882a593Smuzhiyun		};
190*4882a593Smuzhiyun		opp-100000000 {
191*4882a593Smuzhiyun			opp-hz = /bits/ 64 <100000000>;
192*4882a593Smuzhiyun		};
193*4882a593Smuzhiyun	};
194*4882a593Smuzhiyun};
195