arm/dts/rk3568-pinctrl.dtsi

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
 */

#include <dt-bindings/pinctrl/rockchip.h>
#include "rockchip-pinconf.dtsi"

/*
 * This file is auto generated by pin2dts tool, please keep these code
 * by adding changes at end of this file.
 */
&pinctrl {
	acodec {
		acodec_pins: acodec-pins {
			rockchip,pins =
				/* acodec_adc_sync */
				<1 RK_PB1 5 &pcfg_pull_none>,
				/* acodec_adcclk */
				<1 RK_PA1 5 &pcfg_pull_none>,
				/* acodec_adcdata */
				<1 RK_PA0 5 &pcfg_pull_none>,
				/* acodec_dac_datal */
				<1 RK_PA7 5 &pcfg_pull_none>,
				/* acodec_dac_datar */
				<1 RK_PB0 5 &pcfg_pull_none>,
				/* acodec_dacclk */
				<1 RK_PA3 5 &pcfg_pull_none>,
				/* acodec_dacsync */
				<1 RK_PA5 5 &pcfg_pull_none>;
		};
	};
	audiopwmout {
		audiopwmout_pins: audiopwmout-pins {
			rockchip,pins =
				/* audiopwmlout */
				<1 RK_PA0 4 &pcfg_pull_none>,
				/* audiopwmrout */
				<1 RK_PA1 4 &pcfg_pull_none>;
		};
	};
	audiopwmoutdiff {
		audiopwmoutdiff_pins: audiopwmoutdiff-pins {
			rockchip,pins =
				/* audiopwmloutn */
				<1 RK_PA1 6 &pcfg_pull_none>,
				/* audiopwmloutp */
				<1 RK_PA0 6 &pcfg_pull_none>,
				/* audiopwmroutn */
				<1 RK_PA7 4 &pcfg_pull_none>,
				/* audiopwmroutp */
				<1 RK_PA6 4 &pcfg_pull_none>;
		};
	};
	bt656 {
		bt656m0_pins: bt656m0-pins {
			rockchip,pins =
				/* bt656_clkm0 */
				<3 RK_PA0 2 &pcfg_pull_none>,
				/* bt656_d0m0 */
				<2 RK_PD0 2 &pcfg_pull_none>,
				/* bt656_d1m0 */
				<2 RK_PD1 2 &pcfg_pull_none>,
				/* bt656_d2m0 */
				<2 RK_PD2 2 &pcfg_pull_none>,
				/* bt656_d3m0 */
				<2 RK_PD3 2 &pcfg_pull_none>,
				/* bt656_d4m0 */
				<2 RK_PD4 2 &pcfg_pull_none>,
				/* bt656_d5m0 */
				<2 RK_PD5 2 &pcfg_pull_none>,
				/* bt656_d6m0 */
				<2 RK_PD6 2 &pcfg_pull_none>,
				/* bt656_d7m0 */
				<2 RK_PD7 2 &pcfg_pull_none>;
		};
		bt656m1_pins: bt656m1-pins {
			rockchip,pins =
				/* bt656_clkm1 */
				<4 RK_PB4 5 &pcfg_pull_none>,
				/* bt656_d0m1 */
				<3 RK_PC6 5 &pcfg_pull_none>,
				/* bt656_d1m1 */
				<3 RK_PC7 5 &pcfg_pull_none>,
				/* bt656_d2m1 */
				<3 RK_PD0 5 &pcfg_pull_none>,
				/* bt656_d3m1 */
				<3 RK_PD1 5 &pcfg_pull_none>,
				/* bt656_d4m1 */
				<3 RK_PD2 5 &pcfg_pull_none>,
				/* bt656_d5m1 */
				<3 RK_PD3 5 &pcfg_pull_none>,
				/* bt656_d6m1 */
				<3 RK_PD4 5 &pcfg_pull_none>,
				/* bt656_d7m1 */
				<3 RK_PD5 5 &pcfg_pull_none>;
		};
	};
	bt1120 {
		bt1120_pins: bt1120-pins {
			rockchip,pins =
				/* bt1120_clk */
				<3 RK_PA6 2 &pcfg_pull_none>,
				/* bt1120_d0 */
				<3 RK_PA1 2 &pcfg_pull_none>,
				/* bt1120_d1 */
				<3 RK_PA2 2 &pcfg_pull_none>,
				/* bt1120_d2 */
				<3 RK_PA3 2 &pcfg_pull_none>,
				/* bt1120_d3 */
				<3 RK_PA4 2 &pcfg_pull_none>,
				/* bt1120_d4 */
				<3 RK_PA5 2 &pcfg_pull_none>,
				/* bt1120_d5 */
				<3 RK_PA7 2 &pcfg_pull_none>,
				/* bt1120_d6 */
				<3 RK_PB0 2 &pcfg_pull_none>,
				/* bt1120_d7 */
				<3 RK_PB1 2 &pcfg_pull_none>,
				/* bt1120_d8 */
				<3 RK_PB2 2 &pcfg_pull_none>,
				/* bt1120_d9 */
				<3 RK_PB3 2 &pcfg_pull_none>,
				/* bt1120_d10 */
				<3 RK_PB4 2 &pcfg_pull_none>,
				/* bt1120_d11 */
				<3 RK_PB5 2 &pcfg_pull_none>,
				/* bt1120_d12 */
				<3 RK_PB6 2 &pcfg_pull_none>,
				/* bt1120_d13 */
				<3 RK_PC1 2 &pcfg_pull_none>,
				/* bt1120_d14 */
				<3 RK_PC2 2 &pcfg_pull_none>,
				/* bt1120_d15 */
				<3 RK_PC3 2 &pcfg_pull_none>;
		};
	};
	cam {
		cam_pins: cam-pins {
			rockchip,pins =
				/* cam_clkout0 */
				<4 RK_PA7 1 &pcfg_pull_none>,
				/* cam_clkout1 */
				<4 RK_PB0 1 &pcfg_pull_none>;
		};
	};
	can0 {
		can0m0_pins: can0m0-pins {
			rockchip,pins =
				/* can0_rxm0 */
				<0 RK_PB4 2 &pcfg_pull_none>,
				/* can0_txm0 */
				<0 RK_PB3 2 &pcfg_pull_none>;
		};
		can0m1_pins: can0m1-pins {
			rockchip,pins =
				/* can0_rxm1 */
				<2 RK_PA2 4 &pcfg_pull_none>,
				/* can0_txm1 */
				<2 RK_PA1 4 &pcfg_pull_none>;
		};
	};
	can1 {
		can1m0_pins: can1m0-pins {
			rockchip,pins =
				/* can1_rxm0 */
				<1 RK_PA0 3 &pcfg_pull_none>,
				/* can1_txm0 */
				<1 RK_PA1 3 &pcfg_pull_none>;
		};
		can1m1_pins: can1m1-pins {
			rockchip,pins =
				/* can1_rxm1 */
				<4 RK_PC2 3 &pcfg_pull_none>,
				/* can1_txm1 */
				<4 RK_PC3 3 &pcfg_pull_none>;
		};
	};
	can2 {
		can2m0_pins: can2m0-pins {
			rockchip,pins =
				/* can2_rxm0 */
				<4 RK_PB4 3 &pcfg_pull_none>,
				/* can2_txm0 */
				<4 RK_PB5 3 &pcfg_pull_none>;
		};
		can2m1_pins: can2m1-pins {
			rockchip,pins =
				/* can2_rxm1 */
				<2 RK_PB1 4 &pcfg_pull_none>,
				/* can2_txm1 */
				<2 RK_PB2 4 &pcfg_pull_none>;
		};
	};
	cif {
		cif_dvp_ctl: cif-dvp_ctl {
			rockchip,pins =
				/* cif_clkin */
				<4 RK_PC1 1 &pcfg_pull_none>,
				/* cif_clkout */
				<4 RK_PC0 1 &pcfg_pull_none>,
				/* cif_d0 */
				<3 RK_PC6 1 &pcfg_pull_none>,
				/* cif_d1 */
				<3 RK_PC7 1 &pcfg_pull_none>,
				/* cif_d2 */
				<3 RK_PD0 1 &pcfg_pull_none>,
				/* cif_d3 */
				<3 RK_PD1 1 &pcfg_pull_none>,
				/* cif_d4 */
				<3 RK_PD2 1 &pcfg_pull_none>,
				/* cif_d5 */
				<3 RK_PD3 1 &pcfg_pull_none>,
				/* cif_d6 */
				<3 RK_PD4 1 &pcfg_pull_none>,
				/* cif_d7 */
				<3 RK_PD5 1 &pcfg_pull_none>,
				/* cif_d8 */
				<3 RK_PD6 1 &pcfg_pull_none>,
				/* cif_d9 */
				<3 RK_PD7 1 &pcfg_pull_none>,
				/* cif_d10 */
				<4 RK_PA0 1 &pcfg_pull_none>,
				/* cif_d11 */
				<4 RK_PA1 1 &pcfg_pull_none>,
				/* cif_d12 */
				<4 RK_PA2 1 &pcfg_pull_none>,
				/* cif_d13 */
				<4 RK_PA3 1 &pcfg_pull_none>,
				/* cif_d14 */
				<4 RK_PA4 1 &pcfg_pull_none>,
				/* cif_d15 */
				<4 RK_PA5 1 &pcfg_pull_none>,
				/* cif_href */
				<4 RK_PB6 1 &pcfg_pull_none>,
				/* cif_vsync */
				<4 RK_PB7 1 &pcfg_pull_none>;
		};
	};
	clk32k {
		clk32k_pins: clk32k-pins {
			rockchip,pins =
				/* clk32k_in */
				<0 RK_PB0 1 &pcfg_pull_none>,
				/* clk32k_out0 */
				<0 RK_PB0 2 &pcfg_pull_none>,
				/* clk32k_out1 */
				<2 RK_PC6 1 &pcfg_pull_none>;
		};
	};
	cpu {
		cpu_pins: cpu-pins {
			rockchip,pins =
				/* cpu_avs */
				<0 RK_PB7 2 &pcfg_pull_none>;
		};
	};
	ebc {
		ebc_pins: ebc-pins {
			rockchip,pins =
				/* ebc_gdclk */
				<4 RK_PC0 2 &pcfg_pull_none>,
				/* ebc_gdoe */
				<4 RK_PB3 2 &pcfg_pull_none>,
				/* ebc_gdsp */
				<4 RK_PB4 2 &pcfg_pull_none>,
				/* ebc_sdce0 */
				<4 RK_PA6 2 &pcfg_pull_none>,
				/* ebc_sdce1 */
				<4 RK_PA7 2 &pcfg_pull_none>,
				/* ebc_sdce2 */
				<4 RK_PB0 2 &pcfg_pull_none>,
				/* ebc_sdce3 */
				<4 RK_PB1 2 &pcfg_pull_none>,
				/* ebc_sdclk */
				<4 RK_PC1 2 &pcfg_pull_none>,
				/* ebc_sddo0 */
				<3 RK_PC6 2 &pcfg_pull_none>,
				/* ebc_sddo1 */
				<3 RK_PC7 2 &pcfg_pull_none>,
				/* ebc_sddo2 */
				<3 RK_PD0 2 &pcfg_pull_none>,
				/* ebc_sddo3 */
				<3 RK_PD1 2 &pcfg_pull_none>,
				/* ebc_sddo4 */
				<3 RK_PD2 2 &pcfg_pull_none>,
				/* ebc_sddo5 */
				<3 RK_PD3 2 &pcfg_pull_none>,
				/* ebc_sddo6 */
				<3 RK_PD4 2 &pcfg_pull_none>,
				/* ebc_sddo7 */
				<3 RK_PD5 2 &pcfg_pull_none>,
				/* ebc_sddo8 */
				<3 RK_PD6 2 &pcfg_pull_none>,
				/* ebc_sddo9 */
				<3 RK_PD7 2 &pcfg_pull_none>,
				/* ebc_sddo10 */
				<4 RK_PA0 2 &pcfg_pull_none>,
				/* ebc_sddo11 */
				<4 RK_PA1 2 &pcfg_pull_none>,
				/* ebc_sddo12 */
				<4 RK_PA2 2 &pcfg_pull_none>,
				/* ebc_sddo13 */
				<4 RK_PA3 2 &pcfg_pull_none>,
				/* ebc_sddo14 */
				<4 RK_PA4 2 &pcfg_pull_none>,
				/* ebc_sddo15 */
				<4 RK_PA5 2 &pcfg_pull_none>,
				/* ebc_sdle */
				<4 RK_PB6 2 &pcfg_pull_none>,
				/* ebc_sdoe */
				<4 RK_PB7 2 &pcfg_pull_none>,
				/* ebc_sdshr */
				<4 RK_PB5 2 &pcfg_pull_none>,
				/* ebc_vcom */
				<4 RK_PB2 2 &pcfg_pull_none>;
		};
	};
	edpdp {
		edpdpm0_pins: edpdpm0-pins {
			rockchip,pins =
				/* edpdp_hpdinm0 */
				<4 RK_PC4 1 &pcfg_pull_none>;
		};
		edpdpm1_pins: edpdpm1-pins {
			rockchip,pins =
				/* edpdp_hpdinm1 */
				<0 RK_PC2 2 &pcfg_pull_none>;
		};
	};
	emmc {
		emmc_rstnout: emmc-rstnout {
			rockchip,pins =
				/* emmc_rstn */
				<1 RK_PC7 1 &pcfg_pull_none>;
		};
		emmc_bus8: emmc-bus8 {
			rockchip,pins =
				/* emmc_d0 */
				<1 RK_PB4 1 &pcfg_pull_up_drv_level_2>,
				/* emmc_d1 */
				<1 RK_PB5 1 &pcfg_pull_up_drv_level_2>,
				/* emmc_d2 */
				<1 RK_PB6 1 &pcfg_pull_up_drv_level_2>,
				/* emmc_d3 */
				<1 RK_PB7 1 &pcfg_pull_up_drv_level_2>,
				/* emmc_d4 */
				<1 RK_PC0 1 &pcfg_pull_up_drv_level_2>,
				/* emmc_d5 */
				<1 RK_PC1 1 &pcfg_pull_up_drv_level_2>,
				/* emmc_d6 */
				<1 RK_PC2 1 &pcfg_pull_up_drv_level_2>,
				/* emmc_d7 */
				<1 RK_PC3 1 &pcfg_pull_up_drv_level_2>;
		};
		emmc_clk: emmc-clk {
			rockchip,pins =
				/* emmc_clkout */
				<1 RK_PC5 1 &pcfg_pull_up_drv_level_2>;
		};
		emmc_cmd: emmc-cmd {
			rockchip,pins =
				/* emmc_cmd */
				<1 RK_PC4 1 &pcfg_pull_up_drv_level_2>;
		};
		emmc_datastrobe: emmc-datastrobe {
			rockchip,pins =
				<1 RK_PC6 1 &pcfg_pull_none>;
		};
	};
	eth0 {
		eth0_clkout_pins: eth0-clkout-pins {
			rockchip,pins =
				/* eth0_refclko25m */
				<2 RK_PC1 2 &pcfg_pull_none>;
		};
	};
	eth1 {
		eth1m0_clkout_pins: eth1m0-clkout-pins {
			rockchip,pins =
				/* eth1_refclko25mm0 */
				<3 RK_PB0 3 &pcfg_pull_none>;
		};
		eth1m1_clkout_pins: eth1m1-clkout-pins {
			rockchip,pins =
				/* eth1_refclko25mm1 */
				<4 RK_PB3 3 &pcfg_pull_none>;
		};
	};
	flash {
		flash_pins: flash-pins {
			rockchip,pins =
				/* flash_ale */
				<1 RK_PD0 2 &pcfg_pull_none>,
				/* flash_cle */
				<1 RK_PC6 3 &pcfg_pull_none>,
				/* flash_cs0n */
				<1 RK_PD3 2 &pcfg_pull_none>,
				/* flash_cs1n */
				<1 RK_PD4 2 &pcfg_pull_none>,
				/* flash_d0 */
				<1 RK_PB4 2 &pcfg_pull_none>,
				/* flash_d1 */
				<1 RK_PB5 2 &pcfg_pull_none>,
				/* flash_d2 */
				<1 RK_PB6 2 &pcfg_pull_none>,
				/* flash_d3 */
				<1 RK_PB7 2 &pcfg_pull_none>,
				/* flash_d4 */
				<1 RK_PC0 2 &pcfg_pull_none>,
				/* flash_d5 */
				<1 RK_PC1 2 &pcfg_pull_none>,
				/* flash_d6 */
				<1 RK_PC2 2 &pcfg_pull_none>,
				/* flash_d7 */
				<1 RK_PC3 2 &pcfg_pull_none>,
				/* flash_dqs */
				<1 RK_PC5 2 &pcfg_pull_none>,
				/* flash_rdn */
				<1 RK_PD2 2 &pcfg_pull_none>,
				/* flash_rdy */
				<1 RK_PD1 2 &pcfg_pull_none>,
				/* flash_volsel */
				<0 RK_PA7 1 &pcfg_pull_none>,
				/* flash_wpn */
				<1 RK_PC7 3 &pcfg_pull_none>,
				/* flash_wrn */
				<1 RK_PC4 2 &pcfg_pull_none>;
		};
	};
	fspi {
		fspi_pins: fspi-pins {
			rockchip,pins =
				/* fspi_clk */
				<1 RK_PD0 1 &pcfg_pull_none>,
				/* fspi_cs0n */
				<1 RK_PD3 1 &pcfg_pull_none>,
				/* fspi_d0 */
				<1 RK_PD1 1 &pcfg_pull_none>,
				/* fspi_d1 */
				<1 RK_PD2 1 &pcfg_pull_none>,
				/* fspi_d2 */
				<1 RK_PC7 2 &pcfg_pull_none>,
				/* fspi_d3 */
				<1 RK_PD4 1 &pcfg_pull_none>;
		};
		fspi_cs1: fspi-cs1 {
			rockchip,pins =
				/* fspi_cs1n */
				<1 RK_PC6 2 &pcfg_pull_up>;
		};
	};
	gmac0 {
		gmac0_miim: gmac0-miim {
			rockchip,pins =
				/* gmac0_mdc */
				<2 RK_PC3 2 &pcfg_pull_none>,
				/* gmac0_mdio */
				<2 RK_PC4 2 &pcfg_pull_none>;
		};
		gmac0_clkinout: gmac0-clkinout {
			rockchip,pins =
				/* gmac0_mclkinout */
				<2 RK_PC2 2 &pcfg_pull_none>;
		};
		gmac0_rx_er: gmac0-rx-er {
			rockchip,pins =
				/* gmac0_rxer */
				<2 RK_PC5 2 &pcfg_pull_none>;
		};
		gmac0_rx_bus2: gmac0-rx-bus2 {
			rockchip,pins =
				/* gmac0_rxd0 */
				<2 RK_PB6 1 &pcfg_pull_none>,
				/* gmac0_rxd1 */
				<2 RK_PB7 2 &pcfg_pull_none>,
				/* gmac0_rxdvcrs */
				<2 RK_PC0 2 &pcfg_pull_none>;
		};
		gmac0_tx_bus2: gmac0-tx-bus2 {
			rockchip,pins =
				/* gmac0_txd0 */
				<2 RK_PB3 1 &pcfg_pull_none_drv_level_2>,
				/* gmac0_txd1 */
				<2 RK_PB4 1 &pcfg_pull_none_drv_level_2>,
				/* gmac0_txen */
				<2 RK_PB5 1 &pcfg_pull_none>;
		};
		gmac0_rgmii_clk: gmac0-rgmii-clk {
			rockchip,pins =
				/* gmac0_rxclk */
				<2 RK_PA5 2 &pcfg_pull_none>,
				/* gmac0_txclk */
				<2 RK_PB0 2 &pcfg_pull_none_drv_level_1>;
		};
		gmac0_rgmii_bus: gmac0-rgmii-bus {
			rockchip,pins =
				/* gmac0_rxd2 */
				<2 RK_PA3 2 &pcfg_pull_none>,
				/* gmac0_rxd3 */
				<2 RK_PA4 2 &pcfg_pull_none>,
				/* gmac0_txd2 */
				<2 RK_PA6 2 &pcfg_pull_none_drv_level_2>,
				/* gmac0_txd3 */
				<2 RK_PA7 2 &pcfg_pull_none_drv_level_2>;
		};
	};
	gmac1 {
		gmac1m0_miim: gmac1m0-miim {
			rockchip,pins =
				/* gmac1_mdcm0 */
				<3 RK_PC4 3 &pcfg_pull_none>,
				/* gmac1_mdiom0 */
				<3 RK_PC5 3 &pcfg_pull_none>;
		};
		gmac1m0_clkinout: gmac1m0-clkinout {
			rockchip,pins =
				/* gmac1_mclkinoutm0 */
				<3 RK_PC0 3 &pcfg_pull_none>;
		};
		gmac1m0_rx_er: gmac1m0-rx-er {
			rockchip,pins =
				/* gmac1_rxerm0 */
				<3 RK_PB4 3 &pcfg_pull_none>;
		};
		gmac1m0_rx_bus2: gmac1m0-rx-bus2 {
			rockchip,pins =
				/* gmac1_rxd0m0 */
				<3 RK_PB1 3 &pcfg_pull_none>,
				/* gmac1_rxd1m0 */
				<3 RK_PB2 3 &pcfg_pull_none>,
				/* gmac1_rxdvcrsm0 */
				<3 RK_PB3 3 &pcfg_pull_none>;
		};
		gmac1m0_tx_bus2: gmac1m0-tx-bus2 {
			rockchip,pins =
				/* gmac1_txd0m0 */
				<3 RK_PB5 3 &pcfg_pull_none_drv_level_2>,
				/* gmac1_txd1m0 */
				<3 RK_PB6 3 &pcfg_pull_none_drv_level_2>,
				/* gmac1_txenm0 */
				<3 RK_PB7 3 &pcfg_pull_none>;
		};
		gmac1m0_rgmii_clk: gmac1m0-rgmii-clk {
			rockchip,pins =
				/* gmac1_rxclkm0 */
				<3 RK_PA7 3 &pcfg_pull_none>,
				/* gmac1_txclkm0 */
				<3 RK_PA6 3 &pcfg_pull_none_drv_level_1>;
		};
		gmac1m0_rgmii_bus: gmac1m0-rgmii-bus {
			rockchip,pins =
				/* gmac1_rxd2m0 */
				<3 RK_PA4 3 &pcfg_pull_none>,
				/* gmac1_rxd3m0 */
				<3 RK_PA5 3 &pcfg_pull_none>,
				/* gmac1_txd2m0 */
				<3 RK_PA2 3 &pcfg_pull_none_drv_level_2>,
				/* gmac1_txd3m0 */
				<3 RK_PA3 3 &pcfg_pull_none_drv_level_2>;
		};
		gmac1m1_miim: gmac1m1-miim {
			rockchip,pins =
				/* gmac1_mdcm1 */
				<4 RK_PB6 3 &pcfg_pull_none>,
				/* gmac1_mdiom1 */
				<4 RK_PB7 3 &pcfg_pull_none>;
		};
		gmac1m1_clkinout: gmac1m1-clkinout {
			rockchip,pins =
				/* gmac1_mclkinoutm1 */
				<4 RK_PC1 3 &pcfg_pull_none>;
		};
		gmac1m1_rx_er: gmac1m1-rx-er {
			rockchip,pins =
				/* gmac1_rxerm1 */
				<4 RK_PB2 3 &pcfg_pull_none>;
		};
		gmac1m1_rx_bus2: gmac1m1-rx-bus2 {
			rockchip,pins =
				/* gmac1_rxd0m1 */
				<4 RK_PA7 3 &pcfg_pull_none>,
				/* gmac1_rxd1m1 */
				<4 RK_PB0 3 &pcfg_pull_none>,
				/* gmac1_rxdvcrsm1 */
				<4 RK_PB1 3 &pcfg_pull_none>;
		};
		gmac1m1_tx_bus2: gmac1m1-tx-bus2 {
			rockchip,pins =
				/* gmac1_txd0m1 */
				<4 RK_PA4 3 &pcfg_pull_none_drv_level_2>,
				/* gmac1_txd1m1 */
				<4 RK_PA5 3 &pcfg_pull_none_drv_level_2>,
				/* gmac1_txenm1 */
				<4 RK_PA6 3 &pcfg_pull_none>;
		};
		gmac1m1_rgmii_clk: gmac1m1-rgmii-clk {
			rockchip,pins =
				/* gmac1_rxclkm1 */
				<4 RK_PA3 3 &pcfg_pull_none>,
				/* gmac1_txclkm1 */
				<4 RK_PA0 3 &pcfg_pull_none_drv_level_1>;
		};
		gmac1m1_rgmii_bus: gmac1m1-rgmii-bus {
			rockchip,pins =
				/* gmac1_rxd2m1 */
				<4 RK_PA1 3 &pcfg_pull_none>,
				/* gmac1_rxd3m1 */
				<4 RK_PA2 3 &pcfg_pull_none>,
				/* gmac1_txd2m1 */
				<3 RK_PD6 3 &pcfg_pull_none_drv_level_2>,
				/* gmac1_txd3m1 */
				<3 RK_PD7 3 &pcfg_pull_none_drv_level_2>;
		};
	};
	gpu {
		gpu_pins: gpu-pins {
			rockchip,pins =
				/* gpu_avs */
				<0 RK_PC0 2 &pcfg_pull_none>,
				/* gpu_pwren */
				<0 RK_PA6 4 &pcfg_pull_none>;
		};
	};
	hdmitx {
		hdmitxm0_cec: hdmitxm0-cec {
			rockchip,pins =
				/* hdmitx_cecm0 */
				<4 RK_PD1 1 &pcfg_pull_none>;
		};
		hdmitxm1_cec: hdmitxm1-cec {
			rockchip,pins =
				/* hdmitx_cecm1 */
				<0 RK_PC7 1 &pcfg_pull_none>;
		};
		hdmitx_scl: hdmitx-scl {
			rockchip,pins =
				<4 RK_PC7 1 &pcfg_pull_none>;
		};
		hdmitx_sda: hdmitx-sda {
			rockchip,pins =
				<4 RK_PD0 1 &pcfg_pull_none>;
		};
	};
	i2c0 {
		i2c0_xfer: i2c0-xfer {
			rockchip,pins =
				/* i2c0_scl */
				<0 RK_PB1 1 &pcfg_pull_none_smt>,
				/* i2c0_sda */
				<0 RK_PB2 1 &pcfg_pull_none_smt>;
		};
	};
	i2c1 {
		i2c1_xfer: i2c1-xfer {
			rockchip,pins =
				/* i2c1_scl */
				<0 RK_PB3 1 &pcfg_pull_none_smt>,
				/* i2c1_sda */
				<0 RK_PB4 1 &pcfg_pull_none_smt>;
		};
	};
	i2c2 {
		i2c2m0_xfer: i2c2m0-xfer {
			rockchip,pins =
				/* i2c2_sclm0 */
				<0 RK_PB5 1 &pcfg_pull_none_smt>,
				/* i2c2_sdam0 */
				<0 RK_PB6 1 &pcfg_pull_none_smt>;
		};
		i2c2m1_xfer: i2c2m1-xfer {
			rockchip,pins =
				/* i2c2_sclm1 */
				<4 RK_PB5 1 &pcfg_pull_none_smt>,
				/* i2c2_sdam1 */
				<4 RK_PB4 1 &pcfg_pull_none_smt>;
		};
	};
	i2c3 {
		i2c3m0_xfer: i2c3m0-xfer {
			rockchip,pins =
				/* i2c3_sclm0 */
				<1 RK_PA1 1 &pcfg_pull_none_smt>,
				/* i2c3_sdam0 */
				<1 RK_PA0 1 &pcfg_pull_none_smt>;
		};
		i2c3m1_xfer: i2c3m1-xfer {
			rockchip,pins =
				/* i2c3_sclm1 */
				<3 RK_PB5 4 &pcfg_pull_none_smt>,
				/* i2c3_sdam1 */
				<3 RK_PB6 4 &pcfg_pull_none_smt>;
		};
	};
	i2c4 {
		i2c4m0_xfer: i2c4m0-xfer {
			rockchip,pins =
				/* i2c4_sclm0 */
				<4 RK_PB3 1 &pcfg_pull_none_smt>,
				/* i2c4_sdam0 */
				<4 RK_PB2 1 &pcfg_pull_none_smt>;
		};
		i2c4m1_xfer: i2c4m1-xfer {
			rockchip,pins =
				/* i2c4_sclm1 */
				<2 RK_PB2 2 &pcfg_pull_none_smt>,
				/* i2c4_sdam1 */
				<2 RK_PB1 2 &pcfg_pull_none_smt>;
		};
	};
	i2c5 {
		i2c5m0_xfer: i2c5m0-xfer {
			rockchip,pins =
				/* i2c5_sclm0 */
				<3 RK_PB3 4 &pcfg_pull_none_smt>,
				/* i2c5_sdam0 */
				<3 RK_PB4 4 &pcfg_pull_none_smt>;
		};
		i2c5m1_xfer: i2c5m1-xfer {
			rockchip,pins =
				/* i2c5_sclm1 */
				<4 RK_PC7 2 &pcfg_pull_none_smt>,
				/* i2c5_sdam1 */
				<4 RK_PD0 2 &pcfg_pull_none_smt>;
		};
	};
	i2s1 {
		i2s1lrckrxm0: i2s1lrckrxm0 {
			rockchip,pins =
				<1 RK_PA6 1 &pcfg_pull_none>;
		};
		i2s1lrcktxm0: i2s1lrcktxm0 {
			rockchip,pins =
				<1 RK_PA5 1 &pcfg_pull_none>;
		};
		i2s1mclkm0: i2s1mclkm0 {
			rockchip,pins =
				<1 RK_PA2 1 &pcfg_pull_none>;
		};
		i2s1sclkrxm0: i2s1sclkrxm0 {
			rockchip,pins =
				<1 RK_PA4 1 &pcfg_pull_none>;
		};
		i2s1sclktxm0: i2s1sclktxm0 {
			rockchip,pins =
				<1 RK_PA3 1 &pcfg_pull_none>;
		};
		i2s1sdi0m0: i2s1sdi0m0 {
			rockchip,pins =
				<1 RK_PB3 1 &pcfg_pull_none>;
		};
		i2s1sdi1m0: i2s1sdi1m0 {
			rockchip,pins =
				<1 RK_PB2 2 &pcfg_pull_none>;
		};
		i2s1sdi2m0: i2s1sdi2m0 {
			rockchip,pins =
				<1 RK_PB1 2 &pcfg_pull_none>;
		};
		i2s1sdi3m0: i2s1sdi3m0 {
			rockchip,pins =
				<1 RK_PB0 2 &pcfg_pull_none>;
		};
		i2s1sdo0m0: i2s1sdo0m0 {
			rockchip,pins =
				<1 RK_PA7 1 &pcfg_pull_none>;
		};
		i2s1sdo1m0: i2s1sdo1m0 {
			rockchip,pins =
				<1 RK_PB0 1 &pcfg_pull_none>;
		};
		i2s1sdo2m0: i2s1sdo2m0 {
			rockchip,pins =
				<1 RK_PB1 1 &pcfg_pull_none>;
		};
		i2s1sdo3m0: i2s1sdo3m0 {
			rockchip,pins =
				<1 RK_PB2 1 &pcfg_pull_none>;
		};
		i2s1lrckrxm1: i2s1lrckrxm1 {
			rockchip,pins =
				<4 RK_PA7 5 &pcfg_pull_none>;
		};
		i2s1lrcktxm1: i2s1lrcktxm1 {
			rockchip,pins =
				<3 RK_PD0 4 &pcfg_pull_none>;
		};
		i2s1mclkm1: i2s1mclkm1 {
			rockchip,pins =
				<3 RK_PC6 4 &pcfg_pull_none>;
		};
		i2s1sclkrxm1: i2s1sclkrxm1 {
			rockchip,pins =
				<4 RK_PA6 5 &pcfg_pull_none>;
		};
		i2s1sclktxm1: i2s1sclktxm1 {
			rockchip,pins =
				<3 RK_PC7 4 &pcfg_pull_none>;
		};
		i2s1sdi0m1: i2s1sdi0m1 {
			rockchip,pins =
				<3 RK_PD2 4 &pcfg_pull_none>;
		};
		i2s1sdi1m1: i2s1sdi1m1 {
			rockchip,pins =
				<3 RK_PD3 4 &pcfg_pull_none>;
		};
		i2s1sdi2m1: i2s1sdi2m1 {
			rockchip,pins =
				<3 RK_PD4 4 &pcfg_pull_none>;
		};
		i2s1sdi3m1: i2s1sdi3m1 {
			rockchip,pins =
				<3 RK_PD5 4 &pcfg_pull_none>;
		};
		i2s1sdo0m1: i2s1sdo0m1 {
			rockchip,pins =
				<3 RK_PD1 4 &pcfg_pull_none>;
		};
		i2s1sdo1m1: i2s1sdo1m1 {
			rockchip,pins =
				<4 RK_PB0 5 &pcfg_pull_none>;
		};
		i2s1sdo2m1: i2s1sdo2m1 {
			rockchip,pins =
				<4 RK_PB1 4 &pcfg_pull_none>;
		};
		i2s1lrckrxm2: i2s1lrckrxm2 {
			rockchip,pins =
				<3 RK_PC5 5 &pcfg_pull_none>;
		};
		i2s1lrcktxm2: i2s1lrcktxm2 {
			rockchip,pins =
				<2 RK_PD2 5 &pcfg_pull_none>;
		};
		i2s1mclkm2: i2s1mclkm2 {
			rockchip,pins =
				<2 RK_PD0 5 &pcfg_pull_none>;
		};
		i2s1sclktxm2: i2s1sclktxm2 {
			rockchip,pins =
				<2 RK_PD1 5 &pcfg_pull_none>;
		};
		i2s1sdi0m2: i2s1sdi0m2 {
			rockchip,pins =
				<2 RK_PD3 5 &pcfg_pull_none>;
		};
		i2s1sdi1m2: i2s1sdi1m2 {
			rockchip,pins =
				<2 RK_PD4 5 &pcfg_pull_none>;
		};
		i2s1sdi2m2: i2s1sdi2m2 {
			rockchip,pins =
				<2 RK_PD5 5 &pcfg_pull_none>;
		};
		i2s1sdi3m2: i2s1sdi3m2 {
			rockchip,pins =
				<2 RK_PD6 5 &pcfg_pull_none>;
		};
		i2s1sdo0m2: i2s1sdo0m2 {
			rockchip,pins =
				<2 RK_PD7 5 &pcfg_pull_none>;
		};
		i2s1sdo1m2: i2s1sdo1m2 {
			rockchip,pins =
				<3 RK_PA0 5 &pcfg_pull_none>;
		};
		i2s1sdo2m2: i2s1sdo2m2 {
			rockchip,pins =
				<3 RK_PC1 5 &pcfg_pull_none>;
		};
		i2s1sdo3m2: i2s1sdo3m2 {
			rockchip,pins =
				<3 RK_PC2 5 &pcfg_pull_none>;
		};
		i2s1_sclkrxm: i2s1-sclkrxm {
			rockchip,pins =
				<3 RK_PC3 5 &pcfg_pull_none>;
		};
		i2s1_sdo3m: i2s1-sdo3m {
			rockchip,pins =
				<4 RK_PB5 4 &pcfg_pull_none>;
		};
	};
	i2s2 {
		i2s2lrckrxm0: i2s2lrckrxm0 {
			rockchip,pins =
				<2 RK_PC0 1 &pcfg_pull_none>;
		};
		i2s2lrcktxm0: i2s2lrcktxm0 {
			rockchip,pins =
				<2 RK_PC3 1 &pcfg_pull_none>;
		};
		i2s2mclkm0: i2s2mclkm0 {
			rockchip,pins =
				<2 RK_PC1 1 &pcfg_pull_none>;
		};
		i2s2sclkrxm0: i2s2sclkrxm0 {
			rockchip,pins =
				<2 RK_PB7 1 &pcfg_pull_none>;
		};
		i2s2sclktxm0: i2s2sclktxm0 {
			rockchip,pins =
				<2 RK_PC2 1 &pcfg_pull_none>;
		};
		i2s2sdim0: i2s2sdim0 {
			rockchip,pins =
				<2 RK_PC5 1 &pcfg_pull_none>;
		};
		i2s2sdom0: i2s2sdom0 {
			rockchip,pins =
				<2 RK_PC4 1 &pcfg_pull_none>;
		};
		i2s2lrckrxm1: i2s2lrckrxm1 {
			rockchip,pins =
				<4 RK_PA5 5 &pcfg_pull_none>;
		};
		i2s2lrcktxm1: i2s2lrcktxm1 {
			rockchip,pins =
				<4 RK_PA4 5 &pcfg_pull_none>;
		};
		i2s2mclkm1: i2s2mclkm1 {
			rockchip,pins =
				<4 RK_PB6 5 &pcfg_pull_none>;
		};
		i2s2sclkrxm1: i2s2sclkrxm1 {
			rockchip,pins =
				<4 RK_PC1 5 &pcfg_pull_none>;
		};
		i2s2sclktxm1: i2s2sclktxm1 {
			rockchip,pins =
				<4 RK_PB7 4 &pcfg_pull_none>;
		};
		i2s2sdim1: i2s2sdim1 {
			rockchip,pins =
				<4 RK_PB2 5 &pcfg_pull_none>;
		};
		i2s2sdom1: i2s2sdom1 {
			rockchip,pins =
				<4 RK_PB3 5 &pcfg_pull_none>;
		};
	};
	i2s3 {
		i2s3lrckm0: i2s3lrckm0 {
			rockchip,pins =
				<3 RK_PA4 4 &pcfg_pull_none>;
		};
		i2s3mclkm0: i2s3mclkm0 {
			rockchip,pins =
				<3 RK_PA2 4 &pcfg_pull_none>;
		};
		i2s3sclkm0: i2s3sclkm0 {
			rockchip,pins =
				<3 RK_PA3 4 &pcfg_pull_none>;
		};
		i2s3sdim0: i2s3sdim0 {
			rockchip,pins =
				<3 RK_PA6 4 &pcfg_pull_none>;
		};
		i2s3sdom0: i2s3sdom0 {
			rockchip,pins =
				<3 RK_PA5 4 &pcfg_pull_none>;
		};
		i2s3lrckm1: i2s3lrckm1 {
			rockchip,pins =
				<4 RK_PC4 5 &pcfg_pull_none>;
		};
		i2s3mclkm1: i2s3mclkm1 {
			rockchip,pins =
				<4 RK_PC2 5 &pcfg_pull_none>;
		};
		i2s3sclkm1: i2s3sclkm1 {
			rockchip,pins =
				<4 RK_PC3 5 &pcfg_pull_none>;
		};
		i2s3sdim1: i2s3sdim1 {
			rockchip,pins =
				<4 RK_PC6 5 &pcfg_pull_none>;
		};
		i2s3sdom1: i2s3sdom1 {
			rockchip,pins =
				<4 RK_PC5 5 &pcfg_pull_none>;
		};
	};
	isp {
		isp_pins: isp-pins {
			rockchip,pins =
				/* isp_flashtrigin */
				<4 RK_PB4 4 &pcfg_pull_none>,
				/* isp_flashtrigout */
				<4 RK_PA6 1 &pcfg_pull_none>,
				/* isp_prelighttrig */
				<4 RK_PB1 1 &pcfg_pull_none>;
		};
	};
	jtag {
		jtag_pins: jtag-pins {
			rockchip,pins =
				/* jtag_tck */
				<1 RK_PD7 2 &pcfg_pull_none>,
				/* jtag_tms */
				<2 RK_PA0 2 &pcfg_pull_none>;
		};
	};
	lcdc {
		lcdc_ctl: lcdc-ctl {
			rockchip,pins =
				/* lcdc_clk */
				<3 RK_PA0 1 &pcfg_pull_none>,
				/* lcdc_d0 */
				<2 RK_PD0 1 &pcfg_pull_none>,
				/* lcdc_d1 */
				<2 RK_PD1 1 &pcfg_pull_none>,
				/* lcdc_d2 */
				<2 RK_PD2 1 &pcfg_pull_none>,
				/* lcdc_d3 */
				<2 RK_PD3 1 &pcfg_pull_none>,
				/* lcdc_d4 */
				<2 RK_PD4 1 &pcfg_pull_none>,
				/* lcdc_d5 */
				<2 RK_PD5 1 &pcfg_pull_none>,
				/* lcdc_d6 */
				<2 RK_PD6 1 &pcfg_pull_none>,
				/* lcdc_d7 */
				<2 RK_PD7 1 &pcfg_pull_none>,
				/* lcdc_d8 */
				<3 RK_PA1 1 &pcfg_pull_none>,
				/* lcdc_d9 */
				<3 RK_PA2 1 &pcfg_pull_none>,
				/* lcdc_d10 */
				<3 RK_PA3 1 &pcfg_pull_none>,
				/* lcdc_d11 */
				<3 RK_PA4 1 &pcfg_pull_none>,
				/* lcdc_d12 */
				<3 RK_PA5 1 &pcfg_pull_none>,
				/* lcdc_d13 */
				<3 RK_PA6 1 &pcfg_pull_none>,
				/* lcdc_d14 */
				<3 RK_PA7 1 &pcfg_pull_none>,
				/* lcdc_d15 */
				<3 RK_PB0 1 &pcfg_pull_none>,
				/* lcdc_d16 */
				<3 RK_PB1 1 &pcfg_pull_none>,
				/* lcdc_d17 */
				<3 RK_PB2 1 &pcfg_pull_none>,
				/* lcdc_d18 */
				<3 RK_PB3 1 &pcfg_pull_none>,
				/* lcdc_d19 */
				<3 RK_PB4 1 &pcfg_pull_none>,
				/* lcdc_d20 */
				<3 RK_PB5 1 &pcfg_pull_none>,
				/* lcdc_d21 */
				<3 RK_PB6 1 &pcfg_pull_none>,
				/* lcdc_d22 */
				<3 RK_PB7 1 &pcfg_pull_none>,
				/* lcdc_d23 */
				<3 RK_PC0 1 &pcfg_pull_none>,
				/* lcdc_den */
				<3 RK_PC3 1 &pcfg_pull_none>,
				/* lcdc_hsync */
				<3 RK_PC1 1 &pcfg_pull_none>,
				/* lcdc_vsync */
				<3 RK_PC2 1 &pcfg_pull_none>;
		};
	};
	mcu {
		mcu_pins: mcu-pins {
			rockchip,pins =
				/* mcu_jtagtck */
				<0 RK_PB4 4 &pcfg_pull_none>,
				/* mcu_jtagtdi */
				<0 RK_PC1 4 &pcfg_pull_none>,
				/* mcu_jtagtdo */
				<0 RK_PB3 4 &pcfg_pull_none>,
				/* mcu_jtagtms */
				<0 RK_PC2 4 &pcfg_pull_none>,
				/* mcu_jtagtrstn */
				<0 RK_PC3 4 &pcfg_pull_none>;
		};
	};
	npu {
		npu_pins: npu-pins {
			rockchip,pins =
				/* npu_avs */
				<0 RK_PC1 2 &pcfg_pull_none>;
		};
	};
	pcie20 {
		pcie20m0_pins: pcie20m0-pins {
			rockchip,pins =
				/* pcie20_clkreqnm0 */
				<0 RK_PA5 3 &pcfg_pull_none>,
				/* pcie20_perstnm0 */
				<0 RK_PB6 3 &pcfg_pull_none>,
				/* pcie20_wakenm0 */
				<0 RK_PB5 3 &pcfg_pull_none>;
		};
		pcie20m1_pins: pcie20m1-pins {
			rockchip,pins =
				/* pcie20_clkreqnm1 */
				<2 RK_PD0 4 &pcfg_pull_none>,
				/* pcie20_perstnm1 */
				<3 RK_PC1 4 &pcfg_pull_none>,
				/* pcie20_wakenm1 */
				<2 RK_PD1 4 &pcfg_pull_none>;
		};
		pcie20m2_pins: pcie20m2-pins {
			rockchip,pins =
				/* pcie20_clkreqnm2 */
				<1 RK_PB0 4 &pcfg_pull_none>,
				/* pcie20_perstnm2 */
				<1 RK_PB2 4 &pcfg_pull_none>,
				/* pcie20_wakenm2 */
				<1 RK_PB1 4 &pcfg_pull_none>;
		};
		pcie20_buttonrstn: pcie20-buttonrstn {
			rockchip,pins =
				<0 RK_PB4 3 &pcfg_pull_none>;
		};
	};
	pcie30x1 {
		pcie30x1m0_pins: pcie30x1m0-pins {
			rockchip,pins =
				/* pcie30x1_clkreqnm0 */
				<0 RK_PA4 3 &pcfg_pull_none>,
				/* pcie30x1_perstnm0 */
				<0 RK_PC3 3 &pcfg_pull_none>,
				/* pcie30x1_wakenm0 */
				<0 RK_PC2 3 &pcfg_pull_none>;
		};
		pcie30x1m1_pins: pcie30x1m1-pins {
			rockchip,pins =
				/* pcie30x1_clkreqnm1 */
				<2 RK_PD2 4 &pcfg_pull_none>,
				/* pcie30x1_perstnm1 */
				<3 RK_PA1 4 &pcfg_pull_none>,
				/* pcie30x1_wakenm1 */
				<2 RK_PD3 4 &pcfg_pull_none>;
		};
		pcie30x1m2_pins: pcie30x1m2-pins {
			rockchip,pins =
				/* pcie30x1_clkreqnm2 */
				<1 RK_PA5 4 &pcfg_pull_none>,
				/* pcie30x1_perstnm2 */
				<1 RK_PA2 4 &pcfg_pull_none>,
				/* pcie30x1_wakenm2 */
				<1 RK_PA3 4 &pcfg_pull_none>;
		};
		pcie30x1_buttonrstn: pcie30x1-buttonrstn {
			rockchip,pins =
				<0 RK_PB3 3 &pcfg_pull_none>;
		};
	};
	pcie30x2 {
		pcie30x2m0_pins: pcie30x2m0-pins {
			rockchip,pins =
				/* pcie30x2_clkreqnm0 */
				<0 RK_PA6 2 &pcfg_pull_none>,
				/* pcie30x2_perstnm0 */
				<0 RK_PC6 3 &pcfg_pull_none>,
				/* pcie30x2_wakenm0 */
				<0 RK_PC5 3 &pcfg_pull_none>;
		};
		pcie30x2m1_pins: pcie30x2m1-pins {
			rockchip,pins =
				/* pcie30x2_clkreqnm1 */
				<2 RK_PD4 4 &pcfg_pull_none>,
				/* pcie30x2_perstnm1 */
				<2 RK_PD6 4 &pcfg_pull_none>,
				/* pcie30x2_wakenm1 */
				<2 RK_PD5 4 &pcfg_pull_none>;
		};
		pcie30x2m2_pins: pcie30x2m2-pins {
			rockchip,pins =
				/* pcie30x2_clkreqnm2 */
				<4 RK_PC2 4 &pcfg_pull_none>,
				/* pcie30x2_perstnm2 */
				<4 RK_PC4 4 &pcfg_pull_none>,
				/* pcie30x2_wakenm2 */
				<4 RK_PC3 4 &pcfg_pull_none>;
		};
		pcie30x2_buttonrstn: pcie30x2-buttonrstn {
			rockchip,pins =
				<0 RK_PB0 3 &pcfg_pull_none>;
		};
	};
	pdm {
		pdmm0_clk: pdmm0-clk {
			rockchip,pins =
				/* pdm_clk0m0 */
				<1 RK_PA6 3 &pcfg_pull_none>;
		};
		pdmclk1m0: pdmclk1m0 {
			rockchip,pins =
				<1 RK_PA4 3 &pcfg_pull_none>;
		};
		pdmsdi0m0: pdmsdi0m0 {
			rockchip,pins =
				<1 RK_PB3 2 &pcfg_pull_none>;
		};
		pdmsdi1m0: pdmsdi1m0 {
			rockchip,pins =
				<1 RK_PB2 3 &pcfg_pull_none>;
		};
		pdmsdi2m0: pdmsdi2m0 {
			rockchip,pins =
				<1 RK_PB1 3 &pcfg_pull_none>;
		};
		pdmsdi3m0: pdmsdi3m0 {
			rockchip,pins =
				<1 RK_PB0 3 &pcfg_pull_none>;
		};
		pdmm1_clk: pdmm1-clk {
			rockchip,pins =
				/* pdm_clk0m1 */
				<3 RK_PD6 5 &pcfg_pull_none>;
		};
		pdmclk1m1: pdmclk1m1 {
			rockchip,pins =
				<4 RK_PA0 4 &pcfg_pull_none>;
		};
		pdmsdi0m1: pdmsdi0m1 {
			rockchip,pins =
				<3 RK_PD7 5 &pcfg_pull_none>;
		};
		pdmsdi1m1: pdmsdi1m1 {
			rockchip,pins =
				<4 RK_PA1 4 &pcfg_pull_none>;
		};
		pdmsdi2m1: pdmsdi2m1 {
			rockchip,pins =
				<4 RK_PA2 5 &pcfg_pull_none>;
		};
		pdmsdi3m1: pdmsdi3m1 {
			rockchip,pins =
				<4 RK_PA3 5 &pcfg_pull_none>;
		};
		pdmclk1m2: pdmclk1m2 {
			rockchip,pins =
				<3 RK_PC4 5 &pcfg_pull_none>;
		};
		pdmsdi0m2: pdmsdi0m2 {
			rockchip,pins =
				<3 RK_PB3 5 &pcfg_pull_none>;
		};
		pdmsdi1m2: pdmsdi1m2 {
			rockchip,pins =
				<3 RK_PB4 5 &pcfg_pull_none>;
		};
		pdmsdi2m2: pdmsdi2m2 {
			rockchip,pins =
				<3 RK_PB7 5 &pcfg_pull_none>;
		};
		pdmsdi3m2: pdmsdi3m2 {
			rockchip,pins =
				<3 RK_PC0 5 &pcfg_pull_none>;
		};
	};
	pmic {
		pmic_pins: pmic-pins {
			rockchip,pins =
				/* pmic_sleep */
				<0 RK_PA2 1 &pcfg_pull_none>;
		};
	};
	pmu {
		pmu_pins: pmu-pins {
			rockchip,pins =
				/* pmu_debug0 */
				<0 RK_PA5 4 &pcfg_pull_none>,
				/* pmu_debug1 */
				<0 RK_PA6 3 &pcfg_pull_none>,
				/* pmu_debug2 */
				<0 RK_PC4 4 &pcfg_pull_none>,
				/* pmu_debug3 */
				<0 RK_PC5 4 &pcfg_pull_none>,
				/* pmu_debug4 */
				<0 RK_PC6 4 &pcfg_pull_none>,
				/* pmu_debug5 */
				<0 RK_PC7 4 &pcfg_pull_none>;
		};
	};
	pwm0 {
		pwm0m0_pins: pwm0m0-pins {
			rockchip,pins =
				/* pwm0_m0 */
				<0 RK_PB7 1 &pcfg_pull_none>;
		};
		pwm0m1_pins: pwm0m1-pins {
			rockchip,pins =
				/* pwm0_m1 */
				<0 RK_PC7 2 &pcfg_pull_none>;
		};
	};
	pwm1 {
		pwm1m0_pins: pwm1m0-pins {
			rockchip,pins =
				/* pwm1_m0 */
				<0 RK_PC0 1 &pcfg_pull_none>;
		};
		pwm1m1_pins: pwm1m1-pins {
			rockchip,pins =
				/* pwm1_m1 */
				<0 RK_PB5 4 &pcfg_pull_none>;
		};
	};
	pwm2 {
		pwm2m0_pins: pwm2m0-pins {
			rockchip,pins =
				/* pwm2_m0 */
				<0 RK_PC1 1 &pcfg_pull_none>;
		};
		pwm2m1_pins: pwm2m1-pins {
			rockchip,pins =
				/* pwm2_m1 */
				<0 RK_PB6 4 &pcfg_pull_none>;
		};
	};
	pwm3 {
		pwm3_pins: pwm3-pins {
			rockchip,pins =
				/* pwm3_ir */
				<0 RK_PC2 1 &pcfg_pull_none>;
		};
	};
	pwm4 {
		pwm4_pins: pwm4-pins {
			rockchip,pins =
				/* pwm4 */
				<0 RK_PC3 1 &pcfg_pull_none>;
		};
	};
	pwm5 {
		pwm5_pins: pwm5-pins {
			rockchip,pins =
				/* pwm5 */
				<0 RK_PC4 1 &pcfg_pull_none>;
		};
	};
	pwm6 {
		pwm6_pins: pwm6-pins {
			rockchip,pins =
				/* pwm6 */
				<0 RK_PC5 1 &pcfg_pull_none>;
		};
	};
	pwm7 {
		pwm7_pins: pwm7-pins {
			rockchip,pins =
				/* pwm7_ir */
				<0 RK_PC6 1 &pcfg_pull_none>;
		};
	};
	pwm8 {
		pwm8m0_pins: pwm8m0-pins {
			rockchip,pins =
				/* pwm8_m0 */
				<3 RK_PB1 5 &pcfg_pull_none>;
		};
		pwm8m1_pins: pwm8m1-pins {
			rockchip,pins =
				/* pwm8_m1 */
				<1 RK_PD5 4 &pcfg_pull_none>;
		};
	};
	pwm9 {
		pwm9m0_pins: pwm9m0-pins {
			rockchip,pins =
				/* pwm9_m0 */
				<3 RK_PB2 5 &pcfg_pull_none>;
		};
		pwm9m1_pins: pwm9m1-pins {
			rockchip,pins =
				/* pwm9_m1 */
				<1 RK_PD6 4 &pcfg_pull_none>;
		};
	};
	pwm10 {
		pwm10m0_pins: pwm10m0-pins {
			rockchip,pins =
				/* pwm10_m0 */
				<3 RK_PB5 5 &pcfg_pull_none>;
		};
		pwm10m1_pins: pwm10m1-pins {
			rockchip,pins =
				/* pwm10_m1 */
				<2 RK_PA1 2 &pcfg_pull_none>;
		};
	};
	pwm11 {
		pwm11m0_pins: pwm11m0-pins {
			rockchip,pins =
				/* pwm11_irm0 */
				<3 RK_PB6 5 &pcfg_pull_none>;
		};
		pwm11m1_pins: pwm11m1-pins {
			rockchip,pins =
				/* pwm11_irm1 */
				<4 RK_PC0 3 &pcfg_pull_none>;
		};
	};
	pwm12 {
		pwm12m0_pins: pwm12m0-pins {
			rockchip,pins =
				/* pwm12_m0 */
				<3 RK_PB7 2 &pcfg_pull_none>;
		};
		pwm12m1_pins: pwm12m1-pins {
			rockchip,pins =
				/* pwm12_m1 */
				<4 RK_PC5 1 &pcfg_pull_none>;
		};
	};
	pwm13 {
		pwm13m0_pins: pwm13m0-pins {
			rockchip,pins =
				/* pwm13_m0 */
				<3 RK_PC0 2 &pcfg_pull_none>;
		};
		pwm13m1_pins: pwm13m1-pins {
			rockchip,pins =
				/* pwm13_m1 */
				<4 RK_PC6 1 &pcfg_pull_none>;
		};
	};
	pwm14 {
		pwm14m0_pins: pwm14m0-pins {
			rockchip,pins =
				/* pwm14_m0 */
				<3 RK_PC4 1 &pcfg_pull_none>;
		};
		pwm14m1_pins: pwm14m1-pins {
			rockchip,pins =
				/* pwm14_m1 */
				<4 RK_PC2 1 &pcfg_pull_none>;
		};
	};
	pwm15 {
		pwm15m0_pins: pwm15m0-pins {
			rockchip,pins =
				/* pwm15_irm0 */
				<3 RK_PC5 1 &pcfg_pull_none>;
		};
		pwm15m1_pins: pwm15m1-pins {
			rockchip,pins =
				/* pwm15_irm1 */
				<4 RK_PC3 1 &pcfg_pull_none>;
		};
	};
	refclk {
		refclk_pins: refclk-pins {
			rockchip,pins =
				/* refclk_ou */
				<0 RK_PA0 1 &pcfg_pull_none>;
		};
	};
	sata {
		sata_pins: sata-pins {
			rockchip,pins =
				/* sata_cpdet */
				<0 RK_PA4 2 &pcfg_pull_none>,
				/* sata_cppod */
				<0 RK_PA6 1 &pcfg_pull_none>,
				/* sata_mpswitch */
				<0 RK_PA5 2 &pcfg_pull_none>;
		};
	};
	sata0 {
		sata0_pins: sata0-pins {
			rockchip,pins =
				/* sata0_actled */
				<4 RK_PC6 3 &pcfg_pull_none>;
		};
	};
	sata1 {
		sata1_pins: sata1-pins {
			rockchip,pins =
				/* sata1_actled */
				<4 RK_PC5 3 &pcfg_pull_none>;
		};
	};
	sata2 {
		sata2_pins: sata2-pins {
			rockchip,pins =
				/* sata2_actled */
				<4 RK_PC4 3 &pcfg_pull_none>;
		};
	};
	scr {
		scr_pins: scr-pins {
			rockchip,pins =
				/* scr_clk */
				<1 RK_PA2 3 &pcfg_pull_none>,
				/* scr_det */
				<1 RK_PA7 3 &pcfg_pull_none>,
				/* scr_io */
				<1 RK_PA3 3 &pcfg_pull_none>,
				/* scr_rst */
				<1 RK_PA5 3 &pcfg_pull_none>;
		};
	};
	sdmmc0_pins: sdmmc0_pins {
		sdmmc0_bus4: sdmmc0-bus4 {
			rockchip,pins =
				/* sdmmc0_d0 */
				<1 RK_PD5 1 &pcfg_pull_up_drv_level_2>,
				/* sdmmc0_d1 */
				<1 RK_PD6 1 &pcfg_pull_up_drv_level_2>,
				/* sdmmc0_d2 */
				<1 RK_PD7 1 &pcfg_pull_up_drv_level_2>,
				/* sdmmc0_d3 */
				<2 RK_PA0 1 &pcfg_pull_up_drv_level_2>;
		};
		sdmmc0_clk: sdmmc0-clk {
			rockchip,pins =
				/* sdmmc0_clk */
				<2 RK_PA2 1 &pcfg_pull_up_drv_level_2>;
		};
		sdmmc0_cmd: sdmmc0-cmd {
			rockchip,pins =
				/* sdmmc0_cmd */
				<2 RK_PA1 1 &pcfg_pull_up_drv_level_2>;
		};
		sdmmc0_det: sdmmc0-det {
			rockchip,pins =
				<0 RK_PA4 1 &pcfg_pull_up>;
		};
		sdmmc0_pwren: sdmmc0-pwren {
			rockchip,pins =
				<0 RK_PA5 1 &pcfg_pull_none>;
		};
	};
	sdmmc1 {
		sdmmc1_bus4: sdmmc1-bus4 {
			rockchip,pins =
				/* sdmmc1_d0 */
				<2 RK_PA3 1 &pcfg_pull_up_drv_level_5>,
				/* sdmmc1_d1 */
				<2 RK_PA4 1 &pcfg_pull_up_drv_level_5>,
				/* sdmmc1_d2 */
				<2 RK_PA5 1 &pcfg_pull_up_drv_level_5>,
				/* sdmmc1_d3 */
				<2 RK_PA6 1 &pcfg_pull_up_drv_level_5>;
		};
		sdmmc1_clk: sdmmc1-clk {
			rockchip,pins =
				/* sdmmc1_clk */
				<2 RK_PB0 1 &pcfg_pull_up_drv_level_5>;
		};
		sdmmc1_cmd: sdmmc1-cmd {
			rockchip,pins =
				/* sdmmc1_cmd */
				<2 RK_PA7 1 &pcfg_pull_up_drv_level_5>;
		};
		sdmmc1_det: sdmmc1-det {
			rockchip,pins =
				<2 RK_PB2 1 &pcfg_pull_none>;
		};
		sdmmc1_pwren: sdmmc1-pwren {
			rockchip,pins =
				<2 RK_PB1 1 &pcfg_pull_none>;
		};
	};
	sdmmc2 {
		sdmmc2m0_bus4: sdmmc2m0-bus4 {
			rockchip,pins =
				/* sdmmc2_d0m0 */
				<3 RK_PC6 3 &pcfg_pull_up_drv_level_5>,
				/* sdmmc2_d1m0 */
				<3 RK_PC7 3 &pcfg_pull_up_drv_level_5>,
				/* sdmmc2_d2m0 */
				<3 RK_PD0 3 &pcfg_pull_up_drv_level_5>,
				/* sdmmc2_d3m0 */
				<3 RK_PD1 3 &pcfg_pull_up_drv_level_5>;
		};
		sdmmc2m0_clk: sdmmc2m0-clk {
			rockchip,pins =
				/* sdmmc2_clkm0 */
				<3 RK_PD3 3 &pcfg_pull_up_drv_level_5>;
		};
		sdmmc2m0_cmd: sdmmc2m0-cmd {
			rockchip,pins =
				/* sdmmc2_cmdm0 */
				<3 RK_PD2 3 &pcfg_pull_up_drv_level_5>;
		};
		sdmmc2detm0: sdmmc2detm0 {
			rockchip,pins =
				<3 RK_PD4 3 &pcfg_pull_none>;
		};
		sdmmc2pwrenm0: sdmmc2pwrenm0 {
			rockchip,pins =
				<3 RK_PD5 3 &pcfg_pull_none>;
		};
		sdmmc2m1_bus4: sdmmc2m1-bus4 {
			rockchip,pins =
				/* sdmmc2_d0m1 */
				<3 RK_PA1 5 &pcfg_pull_up_drv_level_5>,
				/* sdmmc2_d1m1 */
				<3 RK_PA2 5 &pcfg_pull_up_drv_level_5>,
				/* sdmmc2_d2m1 */
				<3 RK_PA3 5 &pcfg_pull_up_drv_level_5>,
				/* sdmmc2_d3m1 */
				<3 RK_PA4 5 &pcfg_pull_up_drv_level_5>;
		};
		sdmmc2m1_clk: sdmmc2m1-clk {
			rockchip,pins =
				/* sdmmc2_clkm1 */
				<3 RK_PA6 5 &pcfg_pull_up_drv_level_5>;
		};
		sdmmc2m1_cmd: sdmmc2m1-cmd {
			rockchip,pins =
				/* sdmmc2_cmdm1 */
				<3 RK_PA5 5 &pcfg_pull_up_drv_level_5>;
		};
		sdmmc2detm1: sdmmc2detm1 {
			rockchip,pins =
				<3 RK_PA7 4 &pcfg_pull_none>;
		};
		sdmmc2pwrenm1: sdmmc2pwrenm1 {
			rockchip,pins =
				<3 RK_PB0 4 &pcfg_pull_none>;
		};
	};
	spdif {
		spdifm0_pins: spdifm0-pins {
			rockchip,pins =
				/* spdif_txm0 */
				<1 RK_PA4 4 &pcfg_pull_none>;
		};
		spdifm1_pins: spdifm1-pins {
			rockchip,pins =
				/* spdif_txm1 */
				<3 RK_PC5 2 &pcfg_pull_none>;
		};
		spdifm2_pins: spdifm2-pins {
			rockchip,pins =
				/* spdif_txm2 */
				<4 RK_PC4 2 &pcfg_pull_none>;
		};
	};
	spi0 {
		spi0clkm0: spi0clkm0 {
			rockchip,pins =
				<0 RK_PB5 2 &pcfg_pull_none>;
		};
		spi0cs0m0: spi0cs0m0 {
			rockchip,pins =
				<0 RK_PC6 2 &pcfg_pull_none>;
		};
		spi0cs1m0: spi0cs1m0 {
			rockchip,pins =
				<0 RK_PC4 2 &pcfg_pull_none>;
		};
		spi0misom0: spi0misom0 {
			rockchip,pins =
				<0 RK_PC5 2 &pcfg_pull_none>;
		};
		spi0mosim0: spi0mosim0 {
			rockchip,pins =
				<0 RK_PB6 2 &pcfg_pull_none>;
		};
		spi0clkm0_hs: spi0clkm0-hs {
			rockchip,pins =
				<0 RK_PB5 2 &pcfg_pull_up_drv_level_1>;
		};
		spi0misom0_hs: spi0misom0-hs {
			rockchip,pins =
				<0 RK_PC5 2 &pcfg_pull_up_drv_level_1>;
		};
		spi0mosim0_hs: spi0mosim0-hs {
			rockchip,pins =
				<0 RK_PB6 2 &pcfg_pull_up_drv_level_1>;
		};
		spi0clkm1: spi0clkm1 {
			rockchip,pins =
				<2 RK_PD3 3 &pcfg_pull_none>;
		};
		spi0cs0m1: spi0cs0m1 {
			rockchip,pins =
				<2 RK_PD2 3 &pcfg_pull_none>;
		};
		spi0misom1: spi0misom1 {
			rockchip,pins =
				<2 RK_PD0 3 &pcfg_pull_none>;
		};
		spi0mosim1: spi0mosim1 {
			rockchip,pins =
				<2 RK_PD1 3 &pcfg_pull_none>;
		};
		spi0clkm1_hs: spi0clkm1-hs {
			rockchip,pins =
				<2 RK_PD3 3 &pcfg_pull_up_drv_level_1>;
		};
		spi0misom1_hs: spi0misom1-hs {
			rockchip,pins =
				<2 RK_PD0 3 &pcfg_pull_up_drv_level_1>;
		};
		spi0mosim1_hs: spi0mosim1-hs {
			rockchip,pins =
				<2 RK_PD1 3 &pcfg_pull_up_drv_level_1>;
		};
	};
	spi1 {
		spi1clkm0: spi1clkm0 {
			rockchip,pins =
				<2 RK_PB5 3 &pcfg_pull_none>;
		};
		spi1cs0m0: spi1cs0m0 {
			rockchip,pins =
				<2 RK_PC0 4 &pcfg_pull_none>;
		};
		spi1cs1m0: spi1cs1m0 {
			rockchip,pins =
				<2 RK_PC6 3 &pcfg_pull_none>;
		};
		spi1misom0: spi1misom0 {
			rockchip,pins =
				<2 RK_PB6 3 &pcfg_pull_none>;
		};
		spi1mosim0: spi1mosim0 {
			rockchip,pins =
				<2 RK_PB7 4 &pcfg_pull_none>;
		};
		spi1clkm0_hs: spi1clkm0-hs {
			rockchip,pins =
				<2 RK_PB5 3 &pcfg_pull_up_drv_level_1>;
		};
		spi1misom0_hs: spi1misom0-hs {
			rockchip,pins =
				<2 RK_PB6 3 &pcfg_pull_up_drv_level_1>;
		};
		spi1mosim0_hs: spi1mosim0-hs {
			rockchip,pins =
				<2 RK_PB7 4 &pcfg_pull_up_drv_level_1>;
		};
		spi1clkm1: spi1clkm1 {
			rockchip,pins =
				<3 RK_PC3 3 &pcfg_pull_none>;
		};
		spi1cs0m1: spi1cs0m1 {
			rockchip,pins =
				<3 RK_PA1 3 &pcfg_pull_none>;
		};
		spi1misom1: spi1misom1 {
			rockchip,pins =
				<3 RK_PC2 3 &pcfg_pull_none>;
		};
		spi1mosim1: spi1mosim1 {
			rockchip,pins =
				<3 RK_PC1 3 &pcfg_pull_none>;
		};
		spi1clkm1_hs: spi1clkm1-hs {
			rockchip,pins =
				<3 RK_PC3 3 &pcfg_pull_up_drv_level_1>;
		};
		spi1misom1_hs: spi1misom1-hs {
			rockchip,pins =
				<3 RK_PC2 3 &pcfg_pull_up_drv_level_1>;
		};
		spi1mosim1_hs: spi1mosim1-hs {
			rockchip,pins =
				<3 RK_PC1 3 &pcfg_pull_up_drv_level_1>;
		};
	};
	spi2 {
		spi2clkm0: spi2clkm0 {
			rockchip,pins =
				<2 RK_PC1 4 &pcfg_pull_none>;
		};
		spi2cs0m0: spi2cs0m0 {
			rockchip,pins =
				<2 RK_PC4 4 &pcfg_pull_none>;
		};
		spi2cs1m0: spi2cs1m0 {
			rockchip,pins =
				<2 RK_PC5 4 &pcfg_pull_none>;
		};
		spi2misom0: spi2misom0 {
			rockchip,pins =
				<2 RK_PC2 4 &pcfg_pull_none>;
		};
		spi2mosim0: spi2mosim0 {
			rockchip,pins =
				<2 RK_PC3 4 &pcfg_pull_none>;
		};
		spi2clkm0_hs: spi2clkm0-hs {
			rockchip,pins =
				<2 RK_PC1 4 &pcfg_pull_up_drv_level_1>;
		};
		spi2misom0_hs: spi2misom0-hs {
			rockchip,pins =
				<2 RK_PC2 4 &pcfg_pull_up_drv_level_1>;
		};
		spi2mosim0_hs: spi2mosim0-hs {
			rockchip,pins =
				<2 RK_PC3 4 &pcfg_pull_up_drv_level_1>;
		};
		spi2clkm1: spi2clkm1 {
			rockchip,pins =
				<3 RK_PA0 3 &pcfg_pull_none>;
		};
		spi2cs0m1: spi2cs0m1 {
			rockchip,pins =
				<2 RK_PD5 3 &pcfg_pull_none>;
		};
		spi2cs1m1: spi2cs1m1 {
			rockchip,pins =
				<2 RK_PD4 3 &pcfg_pull_none>;
		};
		spi2misom1: spi2misom1 {
			rockchip,pins =
				<2 RK_PD7 3 &pcfg_pull_none>;
		};
		spi2mosim1: spi2mosim1 {
			rockchip,pins =
				<2 RK_PD6 3 &pcfg_pull_none>;
		};
		spi2clkm1_hs: spi2clkm1-hs {
			rockchip,pins =
				<3 RK_PA0 3 &pcfg_pull_up_drv_level_1>;
		};
		spi2misom1_hs: spi2misom1-hs {
			rockchip,pins =
				<2 RK_PD7 3 &pcfg_pull_up_drv_level_1>;
		};
		spi2mosim1_hs: spi2mosim1-hs {
			rockchip,pins =
				<2 RK_PD6 3 &pcfg_pull_up_drv_level_1>;
		};
	};
	spi3 {
		spi3clkm0: spi3clkm0 {
			rockchip,pins =
				<4 RK_PB3 4 &pcfg_pull_none>;
		};
		spi3cs0m0: spi3cs0m0 {
			rockchip,pins =
				<4 RK_PA6 4 &pcfg_pull_none>;
		};
		spi3cs1m0: spi3cs1m0 {
			rockchip,pins =
				<4 RK_PA7 4 &pcfg_pull_none>;
		};
		spi3misom0: spi3misom0 {
			rockchip,pins =
				<4 RK_PB0 4 &pcfg_pull_none>;
		};
		spi3mosim0: spi3mosim0 {
			rockchip,pins =
				<4 RK_PB2 4 &pcfg_pull_none>;
		};
		spi3clkm0_hs: spi3clkm0-hs {
			rockchip,pins =
				<4 RK_PB3 4 &pcfg_pull_up_drv_level_1>;
		};
		spi3misom0_hs: spi3misom0-hs {
			rockchip,pins =
				<4 RK_PB0 4 &pcfg_pull_up_drv_level_1>;
		};
		spi3mosim0_hs: spi3mosim0-hs {
			rockchip,pins =
				<4 RK_PB2 4 &pcfg_pull_up_drv_level_1>;
		};
		spi3clkm1: spi3clkm1 {
			rockchip,pins =
				<4 RK_PC2 2 &pcfg_pull_none>;
		};
		spi3cs0m1: spi3cs0m1 {
			rockchip,pins =
				<4 RK_PC6 2 &pcfg_pull_none>;
		};
		spi3cs1m1: spi3cs1m1 {
			rockchip,pins =
				<4 RK_PD1 2 &pcfg_pull_none>;
		};
		spi3misom1: spi3misom1 {
			rockchip,pins =
				<4 RK_PC5 2 &pcfg_pull_none>;
		};
		spi3mosim1: spi3mosim1 {
			rockchip,pins =
				<4 RK_PC3 2 &pcfg_pull_none>;
		};
		spi3clkm1_hs: spi3clkm1-hs {
			rockchip,pins =
				<4 RK_PC2 2 &pcfg_pull_up_drv_level_1>;
		};
		spi3misom1_hs: spi3misom1-hs {
			rockchip,pins =
				<4 RK_PC5 2 &pcfg_pull_up_drv_level_1>;
		};
		spi3mosim1_hs: spi3mosim1-hs {
			rockchip,pins =
				<4 RK_PC3 2 &pcfg_pull_up_drv_level_1>;
		};
	};
	tsadc {
		tsadc_gpio: tsadc-gpio {
			rockchip,pins = <0 RK_PA1 0 &pcfg_pull_none>;
		};
		tsadcm0_pins: tsadcm0-pins {
			rockchip,pins =
				/* tsadc_shutm0 */
				<0 RK_PA1 1 &pcfg_pull_none>;
		};
		tsadcm1_pins: tsadcm1-pins {
			rockchip,pins =
				/* tsadc_shutm1 */
				<0 RK_PA2 2 &pcfg_pull_none>;
		};
		tsadc_shutorg: tsadc-shutorg {
			rockchip,pins =
				<0 RK_PA1 2 &pcfg_pull_none>;
		};
	};
	uart0 {
		uart0_xfer: uart0-xfer {
			rockchip,pins =
				/* uart0_rx */
				<0 RK_PC0 3 &pcfg_pull_up>,
				/* uart0_tx */
				<0 RK_PC1 3 &pcfg_pull_up>;
		};
		uart0_ctsn: uart0-ctsn {
			rockchip,pins =
				<0 RK_PC7 3 &pcfg_pull_none>;
		};
		uart0_rtsn: uart0-rtsn {
			rockchip,pins =
				<0 RK_PC4 3 &pcfg_pull_none>;
		};
	};
	uart1 {
		uart1m0_xfer: uart1m0-xfer {
			rockchip,pins =
				/* uart1_rxm0 */
				<2 RK_PB3 2 &pcfg_pull_up>,
				/* uart1_txm0 */
				<2 RK_PB4 2 &pcfg_pull_up>;
		};
		uart1ctsnm0: uart1ctsnm0 {
			rockchip,pins =
				<2 RK_PB6 2 &pcfg_pull_none>;
		};
		uart1rtsnm0: uart1rtsnm0 {
			rockchip,pins =
				<2 RK_PB5 2 &pcfg_pull_none>;
		};
		uart1m1_xfer: uart1m1-xfer {
			rockchip,pins =
				/* uart1_rxm1 */
				<3 RK_PD7 4 &pcfg_pull_up>,
				/* uart1_txm1 */
				<3 RK_PD6 4 &pcfg_pull_up>;
		};
		uart1ctsnm1: uart1ctsnm1 {
			rockchip,pins =
				<4 RK_PC1 4 &pcfg_pull_none>;
		};
		uart1rtsnm1: uart1rtsnm1 {
			rockchip,pins =
				<4 RK_PB6 4 &pcfg_pull_none>;
		};
	};
	uart2 {
		uart2m0_xfer: uart2m0-xfer {
			rockchip,pins =
				/* uart2_rxm0 */
				<0 RK_PD0 1 &pcfg_pull_up>,
				/* uart2_txm0 */
				<0 RK_PD1 1 &pcfg_pull_up>;
		};
		uart2m1_xfer: uart2m1-xfer {
			rockchip,pins =
				/* uart2_rxm1 */
				<1 RK_PD6 2 &pcfg_pull_up>,
				/* uart2_txm1 */
				<1 RK_PD5 2 &pcfg_pull_up>;
		};
	};
	uart3 {
		uart3m0_xfer: uart3m0-xfer {
			rockchip,pins =
				/* uart3_rxm0 */
				<1 RK_PA0 2 &pcfg_pull_up>,
				/* uart3_txm0 */
				<1 RK_PA1 2 &pcfg_pull_up>;
		};
		uart3ctsnm0: uart3ctsnm0 {
			rockchip,pins =
				<1 RK_PA3 2 &pcfg_pull_none>;
		};
		uart3rtsnm0: uart3rtsnm0 {
			rockchip,pins =
				<1 RK_PA2 2 &pcfg_pull_none>;
		};
		uart3m1_xfer: uart3m1-xfer {
			rockchip,pins =
				/* uart3_rxm1 */
				<3 RK_PC0 4 &pcfg_pull_up>,
				/* uart3_txm1 */
				<3 RK_PB7 4 &pcfg_pull_up>;
		};
	};
	uart4 {
		uart4m0_xfer: uart4m0-xfer {
			rockchip,pins =
				/* uart4_rxm0 */
				<1 RK_PA4 2 &pcfg_pull_up>,
				/* uart4_txm0 */
				<1 RK_PA6 2 &pcfg_pull_up>;
		};
		uart4ctsnm0: uart4ctsnm0 {
			rockchip,pins =
				<1 RK_PA7 2 &pcfg_pull_none>;
		};
		uart4rtsnm0: uart4rtsnm0 {
			rockchip,pins =
				<1 RK_PA5 2 &pcfg_pull_none>;
		};
		uart4m1_xfer: uart4m1-xfer {
			rockchip,pins =
				/* uart4_rxm1 */
				<3 RK_PB1 4 &pcfg_pull_up>,
				/* uart4_txm1 */
				<3 RK_PB2 4 &pcfg_pull_up>;
		};
	};
	uart5 {
		uart5m0_xfer: uart5m0-xfer {
			rockchip,pins =
				/* uart5_rxm0 */
				<2 RK_PA1 3 &pcfg_pull_up>,
				/* uart5_txm0 */
				<2 RK_PA2 3 &pcfg_pull_up>;
		};
		uart5ctsnm0: uart5ctsnm0 {
			rockchip,pins =
				<1 RK_PD7 3 &pcfg_pull_none>;
		};
		uart5rtsnm0: uart5rtsnm0 {
			rockchip,pins =
				<2 RK_PA0 3 &pcfg_pull_none>;
		};
		uart5m1_xfer: uart5m1-xfer {
			rockchip,pins =
				/* uart5_rxm1 */
				<3 RK_PC3 4 &pcfg_pull_up>,
				/* uart5_txm1 */
				<3 RK_PC2 4 &pcfg_pull_up>;
		};
	};
	uart6 {
		uart6m0_xfer: uart6m0-xfer {
			rockchip,pins =
				/* uart6_rxm0 */
				<2 RK_PA3 3 &pcfg_pull_up>,
				/* uart6_txm0 */
				<2 RK_PA4 3 &pcfg_pull_up>;
		};
		uart6ctsnm0: uart6ctsnm0 {
			rockchip,pins =
				<2 RK_PC0 3 &pcfg_pull_none>;
		};
		uart6rtsnm0: uart6rtsnm0 {
			rockchip,pins =
				<2 RK_PB7 3 &pcfg_pull_none>;
		};
		uart6m1_xfer: uart6m1-xfer {
			rockchip,pins =
				/* uart6_rxm1 */
				<1 RK_PD6 3 &pcfg_pull_up>,
				/* uart6_txm1 */
				<1 RK_PD5 3 &pcfg_pull_up>;
		};
	};
	uart7 {
		uart7m0_xfer: uart7m0-xfer {
			rockchip,pins =
				/* uart7_rxm0 */
				<2 RK_PA5 3 &pcfg_pull_up>,
				/* uart7_txm0 */
				<2 RK_PA6 3 &pcfg_pull_up>;
		};
		uart7ctsnm0: uart7ctsnm0 {
			rockchip,pins =
				<2 RK_PC2 3 &pcfg_pull_none>;
		};
		uart7rtsnm0: uart7rtsnm0 {
			rockchip,pins =
				<2 RK_PC1 3 &pcfg_pull_none>;
		};
		uart7m1_xfer: uart7m1-xfer {
			rockchip,pins =
				/* uart7_rxm1 */
				<3 RK_PC5 4 &pcfg_pull_up>,
				/* uart7_txm1 */
				<3 RK_PC4 4 &pcfg_pull_up>;
		};
		uart7m2_xfer: uart7m2-xfer {
			rockchip,pins =
				/* uart7_rxm2 */
				<4 RK_PA3 4 &pcfg_pull_up>,
				/* uart7_txm2 */
				<4 RK_PA2 4 &pcfg_pull_up>;
		};
	};
	uart8 {
		uart8m0_xfer: uart8m0-xfer {
			rockchip,pins =
				/* uart8_rxm0 */
				<2 RK_PC6 2 &pcfg_pull_up>,
				/* uart8_txm0 */
				<2 RK_PC5 3 &pcfg_pull_up>;
		};
		uart8ctsnm0: uart8ctsnm0 {
			rockchip,pins =
				<2 RK_PB2 3 &pcfg_pull_none>;
		};
		uart8rtsnm0: uart8rtsnm0 {
			rockchip,pins =
				<2 RK_PB1 3 &pcfg_pull_none>;
		};
		uart8m1_xfer: uart8m1-xfer {
			rockchip,pins =
				/* uart8_rxm1 */
				<3 RK_PA0 4 &pcfg_pull_up>,
				/* uart8_txm1 */
				<2 RK_PD7 4 &pcfg_pull_up>;
		};
	};
	uart9 {
		uart9m0_xfer: uart9m0-xfer {
			rockchip,pins =
				/* uart9_rxm0 */
				<2 RK_PA7 3 &pcfg_pull_up>,
				/* uart9_txm0 */
				<2 RK_PB0 3 &pcfg_pull_up>;
		};
		uart9ctsnm0: uart9ctsnm0 {
			rockchip,pins =
				<2 RK_PC4 3 &pcfg_pull_none>;
		};
		uart9rtsnm0: uart9rtsnm0 {
			rockchip,pins =
				<2 RK_PC3 3 &pcfg_pull_none>;
		};
		uart9m1_xfer: uart9m1-xfer {
			rockchip,pins =
				/* uart9_rxm1 */
				<4 RK_PC6 4 &pcfg_pull_up>,
				/* uart9_txm1 */
				<4 RK_PC5 4 &pcfg_pull_up>;
		};
		uart9m2_xfer: uart9m2-xfer {
			rockchip,pins =
				/* uart9_rxm2 */
				<4 RK_PA5 4 &pcfg_pull_up>,
				/* uart9_txm2 */
				<4 RK_PA4 4 &pcfg_pull_up>;
		};
	};
	vop {
		vopm0_pins: vopm0-pins {
			rockchip,pins =
				/* vop_pwmm0 */
				<0 RK_PC3 2 &pcfg_pull_none>;
		};
		vopm1_pins: vopm1-pins {
			rockchip,pins =
				/* vop_pwmm1 */
				<3 RK_PC4 2 &pcfg_pull_none>;
		};
	};
	gmac-txd-level3 {
		gmac0_tx_bus2_level3: gmac0-tx-bus2-level3 {
			rockchip,pins =
				/* gmac0_txd0 */
				<2 RK_PB3 1 &pcfg_pull_none_drv_level_3>,
				/* gmac0_txd1 */
				<2 RK_PB4 1 &pcfg_pull_none_drv_level_3>,
				/* gmac0_txen */
				<2 RK_PB5 1 &pcfg_pull_none>;
		};
		gmac0_rgmii_bus_level3: gmac0-rgmii-bus-level3 {
			rockchip,pins =
				/* gmac0_rxd2 */
				<2 RK_PA3 2 &pcfg_pull_none>,
				/* gmac0_rxd3 */
				<2 RK_PA4 2 &pcfg_pull_none>,
				/* gmac0_txd2 */
				<2 RK_PA6 2 &pcfg_pull_none_drv_level_3>,
				/* gmac0_txd3 */
				<2 RK_PA7 2 &pcfg_pull_none_drv_level_3>;
		};
		gmac1m0_tx_bus2_level3: gmac1m0-tx-bus2-level3 {
			rockchip,pins =
				/* gmac1_txd0m0 */
				<3 RK_PB5 3 &pcfg_pull_none_drv_level_3>,
				/* gmac1_txd1m0 */
				<3 RK_PB6 3 &pcfg_pull_none_drv_level_3>,
				/* gmac1_txenm0 */
				<3 RK_PB7 3 &pcfg_pull_none>;
		};
		gmac1m0_rgmii_bus_level3: gmac1m0-rgmii-bus-level3 {
			rockchip,pins =
				/* gmac1_rxd2m0 */
				<3 RK_PA4 3 &pcfg_pull_none>,
				/* gmac1_rxd3m0 */
				<3 RK_PA5 3 &pcfg_pull_none>,
				/* gmac1_txd2m0 */
				<3 RK_PA2 3 &pcfg_pull_none_drv_level_3>,
				/* gmac1_txd3m0 */
				<3 RK_PA3 3 &pcfg_pull_none_drv_level_3>;
		};
		gmac1m1_tx_bus2_level3: gmac1m1-tx-bus2-level3 {
			rockchip,pins =
				/* gmac1_txd0m1 */
				<4 RK_PA4 3 &pcfg_pull_none_drv_level_3>,
				/* gmac1_txd1m1 */
				<4 RK_PA5 3 &pcfg_pull_none_drv_level_3>,
				/* gmac1_txenm1 */
				<4 RK_PA6 3 &pcfg_pull_none>;
		};
		gmac1m1_rgmii_bus_level3: gmac1m1-rgmii-bus-level3 {
			rockchip,pins =
				/* gmac1_rxd2m1 */
				<4 RK_PA1 3 &pcfg_pull_none>,
				/* gmac1_rxd3m1 */
				<4 RK_PA2 3 &pcfg_pull_none>,
				/* gmac1_txd2m1 */
				<3 RK_PD6 3 &pcfg_pull_none_drv_level_3>,
				/* gmac1_txd3m1 */
				<3 RK_PD7 3 &pcfg_pull_none_drv_level_3>;
		};
	};
	gmac-txc-level2 {
		gmac0_rgmii_clk_level2: gmac0-rgmii-clk-level2 {
			rockchip,pins =
				/* gmac0_rxclk */
				<2 RK_PA5 2 &pcfg_pull_none>,
				/* gmac0_txclk */
				<2 RK_PB0 2 &pcfg_pull_none_drv_level_2>;
		};
		gmac1m0_rgmii_clk_level2: gmac1m0-rgmii-clk-level2 {
			rockchip,pins =
				/* gmac1_rxclkm0 */
				<3 RK_PA7 3 &pcfg_pull_none>,
				/* gmac1_txclkm0 */
				<3 RK_PA6 3 &pcfg_pull_none_drv_level_2>;
		};
		gmac1m1_rgmii_clk_level2: gmac1m1-rgmii-clk-level2 {
			rockchip,pins =
				/* gmac1_rxclkm1 */
				<4 RK_PA3 3 &pcfg_pull_none>,
				/* gmac1_txclkm1 */
				<4 RK_PA0 3 &pcfg_pull_none_drv_level_2>;
		};
	};
};