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Searched refs:Reset (Results 1 – 25 of 419) sorted by relevance

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/OK3568_Linux_fs/u-boot/board/toradex/colibri_imx6/
H A Dpf0100_otp.inc73 {pmic_i2c, 0xF1, 0x00}, // Reset Bank 1 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
74 {pmic_i2c, 0xF2, 0x00}, // Reset Bank 2 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
75 {pmic_i2c, 0xF3, 0x00}, // Reset Bank 3 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
76 {pmic_i2c, 0xF4, 0x00}, // Reset Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
77 {pmic_i2c, 0xF5, 0x00}, // Reset Bank 5 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
78 {pmic_i2c, 0xF6, 0x00}, // Reset Bank 6 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
79 {pmic_i2c, 0xF7, 0x00}, // Reset Bank 7 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
80 {pmic_i2c, 0xF8, 0x00}, // Reset Bank 8 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
81 {pmic_i2c, 0xF9, 0x00}, // Reset Bank 9 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
82 {pmic_i2c, 0xFA, 0x00}, // Reset Bank 10 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
[all …]
/OK3568_Linux_fs/u-boot/board/toradex/apalis_imx6/
H A Dpf0100_otp.inc75 {pmic_i2c, 0xF1, 0x00}, // Reset Bank 1 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
76 {pmic_i2c, 0xF2, 0x00}, // Reset Bank 2 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
77 {pmic_i2c, 0xF3, 0x00}, // Reset Bank 3 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
78 {pmic_i2c, 0xF4, 0x00}, // Reset Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
79 {pmic_i2c, 0xF5, 0x00}, // Reset Bank 5 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
80 {pmic_i2c, 0xF6, 0x00}, // Reset Bank 6 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
81 {pmic_i2c, 0xF7, 0x00}, // Reset Bank 7 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
82 {pmic_i2c, 0xF8, 0x00}, // Reset Bank 8 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
83 {pmic_i2c, 0xF9, 0x00}, // Reset Bank 9 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
84 {pmic_i2c, 0xFA, 0x00}, // Reset Bank 10 ANTIFUSE_RW and ANTIFUSE_BYPASS bits
[all …]
/OK3568_Linux_fs/kernel/drivers/reset/
H A DKconfig6 bool "Reset Controller Support"
9 Generic Reset Controller support.
19 tristate "Altera Arria10 System Resource Reset"
26 bool "AR71xx Reset Driver" if COMPILE_TEST
33 bool "AXS10x Reset Driver" if COMPILE_TEST
39 bool "Berlin Reset Driver" if COMPILE_TEST
62 bool "Synopsys HSDK Reset Driver"
69 tristate "i.MX7/8 Reset Driver"
78 bool "Intel Reset Controller Driver"
88 bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
[all …]
/OK3568_Linux_fs/kernel/Documentation/hwmon/
H A Dltc3815.rst44 in1_reset_history Reset input voltage history.
50 in2_reset_history Reset output voltage history.
55 temp1_reset_history Reset temperature history.
60 curr1_reset_history Reset input current history.
66 curr2_reset_history Reset output current history.
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/watchdog/
H A Daspeed-wdt.txt16 Reset behavior - Whenever a timeout occurs the watchdog can be programmed
26 Reset types:
28 - cpu: Reset CPU on watchdog timeout
30 - soc: Reset 'System on Chip' on watchdog timeout
32 - system: Reset system on watchdog timeout
/OK3568_Linux_fs/u-boot/drivers/reset/
H A DKconfig1 menu "Reset Controller Support"
48 direct register access to the Tegra CAR (Clock And Reset controller).
58 bool "Reset controller driver for BCM6345"
64 bool "Reset controller driver for UniPhier SoCs"
73 bool "Reset controller driver for AST2500 SoCs"
83 bool "Reset controller driver for Rockchip SoCs"
91 bool "Reset controller driver for Rockchip SoCs in SPL"
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/reset/
H A Dnxp,lpc1850-rgu.txt1 NXP LPC1850 Reset Generation Unit (RGU)
18 Reset Peripheral
64 Reset provider example:
73 Reset consumer example:
H A Dzynq-reset.txt1 Xilinx Zynq Reset Manager
14 The Zynq Reset Manager needs to be a childnode of the SLCR.
24 Reset outputs:
H A Dti-syscon-reset.txt1 TI SysCon Reset Controller
12 A SysCon Reset Controller node defines a device that uses a syscon node
16 SysCon Reset Controller Node
49 SysCon Reset Consumer Nodes
H A Dreset.txt1 = Reset Signal Device Tree Bindings =
4 internally in most IC (SoC, FPGA, ...) designs. Reset signals for whole
32 = Reset providers =
45 = Reset consumers =
H A Dti,sci-reset.txt1 Texas Instruments System Control Interface (TI-SCI) Reset Controller
12 TI-SCI Reset Controller Node
24 TI-SCI Reset Consumer Nodes
/OK3568_Linux_fs/tools/windows/RKDevTool/RKDevTool_Release/Language/
H A DEnglish.ini178 IDS_RESETDEVICE_START=Reset Device Start
179 IDS_RESETDEVICE_FAIL=Reset Device Fail
180 IDS_RESETDEVICE_PASS=Reset Device Success
181 IDS_SETRESETFLAG_START=Reset Device To Msc Start
182 IDS_SETRESETFLAG_FAIL=Reset Device To Msc Fail
183 IDS_SETRESETFLAG_PASS=Reset Device To Msc Success
205 IDS_RESETMSC_START=Reset MSC Start
206 IDS_RESETMSC_FAIL=Reset MSC Fail
207 IDS_RESETMSC_PASS=Reset MSC Success
226 IDS_MUTEXRESETDEVICE_START=Mutex Reset Device Start
[all …]
/OK3568_Linux_fs/kernel/drivers/reset/hisilicon/
H A DKconfig3 tristate "Hi3660 Reset Driver"
10 tristate "Hi6220 Reset Driver"
/OK3568_Linux_fs/yocto/poky/meta/recipes-devtools/go/go-1.18/
H A DCVE-2022-41723.patch127 - buf.Reset() // don't trust others
130 - buf.Reset()
143 + buf.Reset() // don't trust others
148 - buf.Reset() // be nice to GC
151 + buf.Reset() // be nice to GC
/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/reset/
H A Dreset.txt1 = Reset Signal Device Tree Bindings =
4 internally in most IC (SoC, FPGA, ...) designs. Reset signals for whole
32 = Reset providers =
45 = Reset consumers =
/OK3568_Linux_fs/kernel/init/
H A Dinitramfs.c192 Reset enumerator
328 next_state = Reset; in do_name()
400 next_state = Reset; in do_symlink()
412 [Reset] = do_reset,
441 state = Reset; in flush_buffer()
504 if (state != Reset) in unpack_to_rootfs()
/OK3568_Linux_fs/u-boot/arch/arm/lib/
H A Dvectors_m.S39 .long CONFIG_SYS_INIT_SP_ADDR @ 0 - Reset stack pointer
40 .long reset @ 1 - Reset
/OK3568_Linux_fs/external/xserver/os/
H A Dauth.c58 AuthRstCFunc Reset; /* delete all authorization data entries */ member
232 if (protocols[i].Reset) in ResetAuthorization()
233 (*protocols[i].Reset) (); in ResetAuthorization()
/OK3568_Linux_fs/buildroot/package/qt5/qt5wayland/
H A D0013-qwaylandwindow-Fix-losing-parent-relationship-after-.patch7 Reset all children to reflush the parent relationship.
23 + // Reset all children to reflush parent relationship
/OK3568_Linux_fs/kernel/Documentation/driver-api/mmc/
H A Dmmc-tools.rst26 - Permanently enable the eMMC H/W Reset feature.
27 - Permanently disable the eMMC H/W Reset feature.
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Dnvidia,tegra210-car.txt1 NVIDIA Tegra210 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
H A Dnvidia,tegra114-car.txt1 NVIDIA Tegra114 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
H A Dnvidia,tegra20-car.txt1 NVIDIA Tegra20 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
H A Dnvidia,tegra30-car.txt1 NVIDIA Tegra30 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mfd/
H A Daltera-a10sr.txt20 a10sr_rst Reset Controller
30 Arria10 Peripheral PHY Reset

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