1menu "Reset Controller Support" 2 3config DM_RESET 4 bool "Enable reset controllers using Driver Model" 5 depends on DM && OF_CONTROL 6 help 7 Enable support for the reset controller driver class. Many hardware 8 modules are equipped with a reset signal, typically driven by some 9 reset controller hardware module within the chip. In U-Boot, reset 10 controller drivers allow control over these reset signals. In some 11 cases this API is applicable to chips outside the CPU as well, 12 although driving such reset isgnals using GPIOs may be more 13 appropriate in this case. 14 15config SPL_DM_RESET 16 bool "Enable reset controllers using Driver Model in SPL" 17 depends on SPL_DM && OF_CONTROL 18 help 19 Enable support for the reset controller driver class. Many hardware 20 modules are equipped with a reset signal, typically driven by some 21 reset controller hardware module within the chip. In U-Boot, reset 22 controller drivers allow control over these reset signals. In some 23 cases this API is applicable to chips outside the CPU as well, 24 although driving such reset isgnals using GPIOs may be more 25 appropriate in this case. 26 27config SANDBOX_RESET 28 bool "Enable the sandbox reset test driver" 29 depends on DM_MAILBOX && SANDBOX 30 help 31 Enable support for a test reset controller implementation, which 32 simply accepts requests to reset various HW modules without actually 33 doing anything beyond a little error checking. 34 35config STI_RESET 36 bool "Enable the STi reset" 37 depends on ARCH_STI 38 help 39 Support for reset controllers on STMicroelectronics STiH407 family SoCs. 40 Say Y if you want to control reset signals provided by system config 41 block. 42 43config TEGRA_CAR_RESET 44 bool "Enable Tegra CAR-based reset driver" 45 depends on TEGRA_CAR 46 help 47 Enable support for manipulating Tegra's on-SoC reset signals via 48 direct register access to the Tegra CAR (Clock And Reset controller). 49 50config TEGRA186_RESET 51 bool "Enable Tegra186 BPMP-based reset driver" 52 depends on TEGRA186_BPMP 53 help 54 Enable support for manipulating Tegra's on-SoC reset signals via IPC 55 requests to the BPMP (Boot and Power Management Processor). 56 57config RESET_BCM6345 58 bool "Reset controller driver for BCM6345" 59 depends on DM_RESET && ARCH_BMIPS 60 help 61 Support reset controller on BCM6345. 62 63config RESET_UNIPHIER 64 bool "Reset controller driver for UniPhier SoCs" 65 depends on ARCH_UNIPHIER 66 default y 67 help 68 Support for reset controllers on UniPhier SoCs. 69 Say Y if you want to control reset signals provided by System Control 70 block, Media I/O block, Peripheral Block. 71 72config AST2500_RESET 73 bool "Reset controller driver for AST2500 SoCs" 74 depends on DM_RESET && WDT_ASPEED 75 default y if ASPEED_AST2500 76 help 77 Support for reset controller on AST2500 SoC. This controller uses 78 watchdog to reset different peripherals and thus only supports 79 resets that are supported by watchdog. The main limitation though 80 is that some reset signals, like I2C or MISC reset multiple devices. 81 82config RESET_ROCKCHIP 83 bool "Reset controller driver for Rockchip SoCs" 84 depends on DM_RESET && CLK 85 default y 86 help 87 Support for reset controller on rockchip SoC. The main limitation though 88 is that some reset signals, like I2C or MISC reset multiple devices. 89 90config SPL_RESET_ROCKCHIP 91 bool "Reset controller driver for Rockchip SoCs in SPL" 92 depends on SPL_DM_RESET && SPL_CLK 93 help 94 Support for reset controller on rockchip SoC. The main limitation though 95 is that some reset signals, like I2C or MISC reset multiple devices. 96 97config RESET_SCMI 98 bool "Enable SCMI reset domain driver" 99 select SCMI_FIRMWARE 100 help 101 Enable this option if you want to support reset controller 102 devices exposed by a SCMI agent based on SCMI reset domain 103 protocol communication with a SCMI server. 104endmenu 105