1*4882a593Smuzhiyun= Reset Signal Device Tree Bindings = 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis binding is intended to represent the hardware reset signals present 4*4882a593Smuzhiyuninternally in most IC (SoC, FPGA, ...) designs. Reset signals for whole 5*4882a593Smuzhiyunstandalone chips are most likely better represented as GPIOs, although there 6*4882a593Smuzhiyunare likely to be exceptions to this rule. 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunHardware blocks typically receive a reset signal. This signal is generated by 9*4882a593Smuzhiyuna reset provider (e.g. power management or clock module) and received by a 10*4882a593Smuzhiyunreset consumer (the module being reset, or a module managing when a sub- 11*4882a593Smuzhiyunordinate module is reset). This binding exists to represent the provider and 12*4882a593Smuzhiyunconsumer, and provide a way to couple the two together. 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunA reset signal is represented by the phandle of the provider, plus a reset 15*4882a593Smuzhiyunspecifier - a list of DT cells that represents the reset signal within the 16*4882a593Smuzhiyunprovider. The length (number of cells) and semantics of the reset specifier 17*4882a593Smuzhiyunare dictated by the binding of the reset provider, although common schemes 18*4882a593Smuzhiyunare described below. 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunA word on where to place reset signal consumers in device tree: It is possible 21*4882a593Smuzhiyunin hardware for a reset signal to affect multiple logically separate HW blocks 22*4882a593Smuzhiyunat once. In this case, it would be unwise to represent this reset signal in 23*4882a593Smuzhiyunthe DT node of each affected HW block, since if activated, an unrelated block 24*4882a593Smuzhiyunmay be reset. Instead, reset signals should be represented in the DT node 25*4882a593Smuzhiyunwhere it makes most sense to control it; this may be a bus node if all 26*4882a593Smuzhiyunchildren of the bus are affected by the reset signal, or an individual HW 27*4882a593Smuzhiyunblock node for dedicated reset signals. The intent of this binding is to give 28*4882a593Smuzhiyunappropriate software access to the reset signals in order to manage the HW, 29*4882a593Smuzhiyunrather than to slavishly enumerate the reset signal that affects each HW 30*4882a593Smuzhiyunblock. 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun= Reset providers = 33*4882a593Smuzhiyun 34*4882a593SmuzhiyunRequired properties: 35*4882a593Smuzhiyun#reset-cells: Number of cells in a reset specifier; Typically 0 for nodes 36*4882a593Smuzhiyun with a single reset output and 1 for nodes with multiple 37*4882a593Smuzhiyun reset outputs. 38*4882a593Smuzhiyun 39*4882a593SmuzhiyunFor example: 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun rst: reset-controller { 42*4882a593Smuzhiyun #reset-cells = <1>; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun= Reset consumers = 46*4882a593Smuzhiyun 47*4882a593SmuzhiyunRequired properties: 48*4882a593Smuzhiyunresets: List of phandle and reset specifier pairs, one pair 49*4882a593Smuzhiyun for each reset signal that affects the device, or that the 50*4882a593Smuzhiyun device manages. Note: if the reset provider specifies '0' for 51*4882a593Smuzhiyun #reset-cells, then only the phandle portion of the pair will 52*4882a593Smuzhiyun appear. 53*4882a593Smuzhiyun 54*4882a593SmuzhiyunOptional properties: 55*4882a593Smuzhiyunreset-names: List of reset signal name strings sorted in the same order as 56*4882a593Smuzhiyun the resets property. Consumers drivers will use reset-names to 57*4882a593Smuzhiyun match reset signal names with reset specifiers. 58*4882a593Smuzhiyun 59*4882a593SmuzhiyunFor example: 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun device { 62*4882a593Smuzhiyun resets = <&rst 20>; 63*4882a593Smuzhiyun reset-names = "reset"; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593SmuzhiyunThis represents a device with a single reset signal named "reset". 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun bus { 69*4882a593Smuzhiyun resets = <&rst 10> <&rst 11> <&rst 12> <&rst 11>; 70*4882a593Smuzhiyun reset-names = "i2s1", "i2s2", "dma", "mixer"; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593SmuzhiyunThis represents a bus that controls the reset signal of each of four sub- 74*4882a593Smuzhiyunordinate devices. Consider for example a bus that fails to operate unless no 75*4882a593Smuzhiyunchild device has reset asserted. 76