| /OK3568_Linux_fs/u-boot/include/dt-bindings/clock/ |
| H A D | ast2500-scu.h | 9 #define PLL_DPLL 2 macro
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| H A D | rk3036-cru.h | 13 #define PLL_DPLL 2 macro
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| H A D | rk3188-cru-common.h | 13 #define PLL_DPLL 2 macro
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| H A D | rk3128-cru.h | 12 #define PLL_DPLL 2 macro
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| H A D | rk3228-cru.h | 12 #define PLL_DPLL 2 macro
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| H A D | rv1108-cru.h | 12 #define PLL_DPLL 1 macro
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| H A D | rk3308-cru.h | 21 #define PLL_DPLL 2 macro
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| H A D | px30-cru.h | 21 #define PLL_DPLL 2 macro
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| H A D | rk3368-cru.h | 21 #define PLL_DPLL 3 macro
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| H A D | rk3288-cru.h | 10 #define PLL_DPLL 2 macro
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| H A D | rk3328-cru.h | 12 #define PLL_DPLL 2 macro
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| /OK3568_Linux_fs/kernel/include/dt-bindings/clock/ |
| H A D | rk3036-cru.h | 12 #define PLL_DPLL 2 macro
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| H A D | rk3188-cru-common.h | 12 #define PLL_DPLL 2 macro
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| H A D | rk3128-cru.h | 12 #define PLL_DPLL 2 macro
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| H A D | rk3228-cru.h | 12 #define PLL_DPLL 2 macro
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| H A D | rv1108-cru.h | 12 #define PLL_DPLL 1 macro
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| H A D | rk3328-cru.h | 12 #define PLL_DPLL 2 macro
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| H A D | rk3288-cru.h | 12 #define PLL_DPLL 2 macro
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| H A D | px30-cru.h | 8 #define PLL_DPLL 2 macro
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| H A D | rk3308-cru.h | 12 #define PLL_DPLL 2 macro
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| H A D | rk3368-cru.h | 12 #define PLL_DPLL 3 macro
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| /OK3568_Linux_fs/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3128.c | 67 RK3128_CLK_DUMP(PLL_DPLL, "dpll", true),
83 [DPLL] = PLL(pll_rk3036, PLL_DPLL, RK2928_PLL_CON(4),
536 case PLL_DPLL: in rk3128_clk_get_rate()
600 case PLL_DPLL: in rk3128_clk_set_rate()
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| H A D | clk_rk322x.c | 68 RK322x_CLK_DUMP(PLL_DPLL, "dpll", true),
84 [DPLL] = PLL(pll_rk3036, PLL_DPLL, RK2928_PLL_CON(3),
583 case PLL_DPLL: in rk322x_clk_get_rate()
644 case PLL_DPLL: in rk322x_clk_set_rate()
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| H A D | clk_rk3308.c | 62 RK3308_CLK_DUMP(PLL_DPLL, "dpll"),
78 [DPLL] = PLL(pll_rk3328, PLL_DPLL, RK3308_PLL_CON(8),
942 case PLL_DPLL: in rk3308_clk_get_rate()
1023 case PLL_DPLL: in rk3308_clk_set_rate()
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| H A D | clk_rk3328.c | 91 RK3328_CLK_DUMP(PLL_DPLL, "dpll", true),
108 [DPLL] = PLL(pll_rk3328, PLL_DPLL, RK3328_PLL_CON(8),
801 case PLL_DPLL: in rk3328_clk_get_rate()
874 case PLL_DPLL: in rk3328_clk_set_rate()
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