| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/ |
| H A D | si_enums.h | 192 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| H A D | soc15d.h | 99 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| H A D | nvd.h | 76 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| H A D | vid.h | 131 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| H A D | cikd.h | 249 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| H A D | gfx_v7_0.c | 2336 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_ring_emit_cntxcntl()
2549 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_0_cp_gfx_start()
3991 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_0_get_csb_buffer()
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| H A D | sid.h | 1687 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| H A D | gfx_v6_0.c | 2887 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v6_0_get_csb_buffer()
2976 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v6_ring_emit_cntxcntl()
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| H A D | gfx_v8_0.c | 1258 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_0_get_csb_buffer()
4197 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_0_cp_gfx_start()
6353 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v8_ring_emit_cntxcntl()
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| H A D | gfx_v9_0.c | 1727 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_0_get_csb_buffer()
3221 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_0_cp_gfx_start()
5536 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_ring_emit_cntxcntl()
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| H A D | gfx_v10_0.c | 3992 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_get_csb_buffer()
5783 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_cp_gfx_start()
7977 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_ring_emit_cntxcntl()
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/ |
| H A D | nid.h | 1179 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| H A D | sid.h | 1624 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| H A D | cikd.h | 1717 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| H A D | evergreen_cs.c | 1827 case PACKET3_CONTEXT_CONTROL: in evergreen_packet3_check()
3377 case PACKET3_CONTEXT_CONTROL: in evergreen_vm_packet3_check()
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| H A D | evergreend.h | 1564 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| H A D | si.c | 4557 case PACKET3_CONTEXT_CONTROL: in si_vm_packet3_gfx_check()
4670 case PACKET3_CONTEXT_CONTROL: in si_vm_packet3_compute_check()
5729 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in si_get_csb_buffer()
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| H A D | r600d.h | 1600 #define PACKET3_CONTEXT_CONTROL 0x28 macro
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| H A D | r600_cs.c | 1686 case PACKET3_CONTEXT_CONTROL: in r600_packet3_check()
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| H A D | cik.c | 4009 radeon_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in cik_cp_gfx_start()
6724 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in cik_get_csb_buffer()
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