Searched refs:CONFIG_SYS_DDR_TIMING_5 (Results 1 – 18 of 18) sorted by relevance
| /OK3568_Linux_fs/u-boot/board/freescale/corenet_ds/ |
| H A D | p4080ds_ddr.c | 68 #define CONFIG_SYS_DDR_TIMING_5 0x02401400 macro
103 .timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5,
135 .timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5,
167 .timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5,
199 .timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5,
231 .timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5,
263 .timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5,
295 .timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5,
327 .timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5,
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| /OK3568_Linux_fs/u-boot/include/configs/ |
| H A D | BSC9132QDS.h | 189 #define CONFIG_SYS_DDR_TIMING_5 CONFIG_SYS_DDR_TIMING_5_800 macro
195 #define CONFIG_SYS_DDR_TIMING_5 CONFIG_SYS_DDR_TIMING_5_1333 macro
201 #define CONFIG_SYS_DDR_TIMING_5 CONFIG_SYS_DDR_TIMING_5_800 macro
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| H A D | BSC9131RDB.h | 104 #define CONFIG_SYS_DDR_TIMING_5 0x02401400 macro
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| H A D | p1_twr.h | 110 #define CONFIG_SYS_DDR_TIMING_5 0x03402400 macro
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| H A D | MPC8569MDS.h | 110 #define CONFIG_SYS_DDR_TIMING_5 0x03402400 macro
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| H A D | UCP1020.h | 193 #define CONFIG_SYS_DDR_TIMING_5 0x03402400 macro
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| H A D | P1022DS.h | 173 #define CONFIG_SYS_DDR_TIMING_5 0x02401400 macro
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| H A D | P1010RDB.h | 253 #define CONFIG_SYS_DDR_TIMING_5 0x03402400 macro
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| H A D | p1_p2_rdb_pc.h | 344 #define CONFIG_SYS_DDR_TIMING_5 0x03402400 macro
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| /OK3568_Linux_fs/u-boot/board/freescale/bsc9132qds/ |
| H A D | ddr.c | 39 .timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5,
66 .timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5,
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| /OK3568_Linux_fs/u-boot/board/freescale/p1010rdb/ |
| H A D | ddr.c | 40 .timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5,
67 .timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5,
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| /OK3568_Linux_fs/u-boot/board/freescale/p1_twr/ |
| H A D | ddr.c | 46 .timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5, in fixed_sdram()
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| /OK3568_Linux_fs/u-boot/board/freescale/bsc9131rdb/ |
| H A D | spl_minimal.c | 47 __raw_writel(CONFIG_SYS_DDR_TIMING_5, &ddr->timing_cfg_5); in sdram_init()
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| H A D | ddr.c | 40 .timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5,
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| /OK3568_Linux_fs/u-boot/board/Arcturus/ucp1020/ |
| H A D | ddr.c | 106 .timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5, in fixed_sdram()
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| /OK3568_Linux_fs/u-boot/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 238 .timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5, in fixed_sdram()
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| /OK3568_Linux_fs/u-boot/board/freescale/mpc8569mds/ |
| H A D | mpc8569mds.c | 253 out_be32(&ddr->timing_cfg_5, CONFIG_SYS_DDR_TIMING_5); in fixed_sdram()
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| /OK3568_Linux_fs/u-boot/scripts/ |
| H A D | config_whitelist.txt | 2768 CONFIG_SYS_DDR_TIMING_5
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