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Searched refs:CLK_TOP_APLL12_DIV0 (Results 1 – 10 of 10) sorted by relevance

/OK3568_Linux_fs/kernel/sound/soc/mediatek/mt8183/
H A Dmt8183-afe-clk.c44 CLK_TOP_APLL12_DIV0, enumerator
83 [CLK_TOP_APLL12_DIV0] = "top_apll12_div0",
514 .div_clk_id = CLK_TOP_APLL12_DIV0,
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dmt8516-clk.h151 #define CLK_TOP_APLL12_DIV0 119 macro
H A Dmt6765-clk.h113 #define CLK_TOP_APLL12_DIV0 78 macro
H A Dmt8183-clk.h158 #define CLK_TOP_APLL12_DIV0 122 macro
H A Dmt6779-clk.h138 #define CLK_TOP_APLL12_DIV0 128 macro
/OK3568_Linux_fs/kernel/drivers/clk/mediatek/
H A Dclk-mt8516.c666 GATE_TOP5(CLK_TOP_APLL12_DIV0, "apll12_div0", "apll12_ck_div0", 0),
H A Dclk-mt8167.c912 GATE_TOP5(CLK_TOP_APLL12_DIV0, "apll12_div0", "apll12_ck_div0", 0),
H A Dclk-mt6779.c827 DIV_GATE(CLK_TOP_APLL12_DIV0, "apll12_div0", "i2s0_m_ck_sel",
H A Dclk-mt6765.c531 GATE_TOP2(CLK_TOP_APLL12_DIV0, "apll12_div0", "aud_1_ck", 2),
H A Dclk-mt8183.c736 DIV_GATE(CLK_TOP_APLL12_DIV0, "apll12_div0", "apll_i2s0_sel",