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Searched refs:CLK_SDMMC1 (Results 1 – 16 of 16) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/clk/zte/
H A Dclk-zx296702.c35 #define CLK_SDMMC1 (lsp0crpm_base + 0x0c) macro
604 ARRAY_SIZE(sdmmc1_wclk_sel), CLK_SDMMC1, 4, 1); in zx296702_lsp0_clocks_init()
606 zx_div("sdmmc1_wclk_div", "sdmmc1_wclk_mux", CLK_SDMMC1, 12, 4); in zx296702_lsp0_clocks_init()
608 zx_gate("sdmmc1_wclk", "sdmmc1_wclk_div", CLK_SDMMC1, 1); in zx296702_lsp0_clocks_init()
610 zx_gate("sdmmc1_pclk", "lsp0_apb_pclk", CLK_SDMMC1, 0); in zx296702_lsp0_clocks_init()
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dexynos5250.h84 #define CLK_SDMMC1 281 macro
H A Dexynos4.h136 #define CLK_SDMMC1 298 macro
H A Dexynos3250.h204 #define CLK_SDMMC1 198 macro
H A Drk3568-cru.h242 #define CLK_SDMMC1 179 macro
/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Drk3568-cru.h242 #define CLK_SDMMC1 179 macro
/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk3568.c1429 case CLK_SDMMC1: in rk3568_sdmmc_get_clk()
1498 case CLK_SDMMC1: in rk3568_sdmmc_set_clk()
2579 case CLK_SDMMC1: in rk3568_clk_get_rate()
2765 case CLK_SDMMC1: in rk3568_clk_set_rate()
/OK3568_Linux_fs/kernel/drivers/clk/samsung/
H A Dclk-exynos5250.c562 GATE(CLK_SDMMC1, "sdmmc1", "div_aclk200", GATE_IP_FSYS, 13, 0, 0),
H A Dclk-exynos3250.c644 GATE(CLK_SDMMC1, "sdmmc1", "div_aclk_200", GATE_IP_FSYS, 6, 0, 0),
H A Dclk-exynos4.c841 GATE(CLK_SDMMC1, "sdmmc1", "aclk133", GATE_IP_FSYS, 6,
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dexynos3250.dtsi383 clocks = <&cmu CLK_SDMMC1>, <&cmu CLK_SCLK_MMC1>;
H A Dexynos4.dtsi332 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
H A Dexynos5250.dtsi550 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-rk3568.c920 COMPOSITE_NODIV(CLK_SDMMC1, "clk_sdmmc1", clk_sdmmc_p, 0,
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drk3568.dtsi1836 clocks = <&cru HCLK_SDMMC1>, <&cru CLK_SDMMC1>,
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3568.dtsi2600 clocks = <&cru HCLK_SDMMC1>, <&cru CLK_SDMMC1>,