Home
last modified time | relevance | path

Searched refs:BIT_2 (Results 1 – 25 of 26) sorted by relevance

12

/OK3568_Linux_fs/kernel/drivers/scsi/
H A Dqla1280.h19 #define BIT_2 0x4 macro
122 #define ISP_CFG0_1040 BIT_2 /* ISP1040 */
131 #define ISP_CFG1_BENAB BIT_2 /* Global Bus burst enable */
136 #define ISP_EN_RISC BIT_2 /* ISP enable RISC interrupts. */
141 #define RISC_INT BIT_2 /* RISC interrupt */
148 #define NV_DATA_OUT BIT_2
158 #define CDMA_CONF_RIRQ BIT_2 /* RISC interrupt enable */
175 #define DDMA_CONF_RIRQ BIT_2 /* RISC interrupt enable */
325 #define NV_START_BIT BIT_2
569 #define RF_BAD_HEADER BIT_2 /* Bad header. */
H A Dqla1280.c1124 mr = BIT_3 | BIT_2 | BIT_1 | BIT_0; in qla1280_set_target_parameters()
1690 err = qla1280_mailbox_command(ha, BIT_0 | BIT_1 | BIT_2, mb); in qla1280_load_firmware_pio()
1704 #define CMD_ARGS (BIT_7 | BIT_6 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0)
1708 #define CMD_ARGS (BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0)
1909 BIT_3 | BIT_2 | BIT_1 | BIT_0, in qla1280_init_rings()
1923 BIT_3 | BIT_2 | BIT_1 | BIT_0, in qla1280_init_rings()
2216 BIT_7 | BIT_3 | BIT_2 | BIT_1 | BIT_0); in qla1280_nvram_config()
2250 status |= qla1280_mailbox_command(ha, BIT_7 | BIT_6 | BIT_2 | in qla1280_nvram_config()
2257 status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]); in qla1280_nvram_config()
2271 status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb); in qla1280_nvram_config()
[all …]
/OK3568_Linux_fs/kernel/drivers/scsi/qla2xxx/
H A Dqla_fw.h493 #define CF_DATA_SEG_DESCR_ENABLE BIT_2
535 #define TMF_DSD_LIST_ENABLE BIT_2
964 #define TCF_CLEAR_TASK_SET BIT_2
1166 #define CSRX_64BIT_SLOT BIT_2 /* PCI 64-Bit Bus Slot. */
1229 #define GPDX_LED_COLOR_MASK (BIT_4|BIT_3|BIT_2)
1233 #define GPDX_LED_YELLOW_ON BIT_2
1432 #define CS_VF_SET_HOPS_OF_VPORTS BIT_2
1720 #define FSTATE_IS_DIAG_FW BIT_2
1736 #define VCO_DONT_RESET_UPDATE BIT_2
H A Dqla_def.h83 #define BIT_2 0x4 macro
205 #define IDC_NIC_FW_REPORTED_FAILURE BIT_2
368 #define SRB_CRC_CTX_DMA_VALID BIT_2 /* DIF: context DMA valid */
482 #define SRB_LOGIN_SKIP_PRLI BIT_2
527 #define SRB_FXDISC_REQ_DWRD_VALID BIT_2
731 #define NVR_DATA_OUT BIT_2
990 #define IOCTL_CMD BIT_2
1003 #define IOCTL_CMD BIT_2
1305 #define MBX_2 BIT_2
1414 #define QLA_ZIO_MODE_6 (BIT_2 | BIT_1)
[all …]
H A Dqla_nvme.h59 #define CF_DATA_SEG_DESCR_ENABLE BIT_2
H A Dqla_init.c1128 mb[1] = BIT_2 | BIT_3; in qla24xx_async_gnl()
3857 (ha->fw_attributes & BIT_2)) { in qla2x00_setup_chip()
3991 if (ha->fw_seriallink_options[3] & BIT_2) { in qla2x00_update_fw_options()
3995 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); in qla2x00_update_fw_options()
3999 (BIT_3 | BIT_2 | BIT_1 | BIT_0); in qla2x00_update_fw_options()
4017 (BIT_3 | BIT_2 | BIT_1 | BIT_0); in qla2x00_update_fw_options()
4744 nv->firmware_options[0] = BIT_2 | BIT_1; in qla2x00_nvram_config()
4751 nv->firmware_options[0] = BIT_2 | BIT_1; in qla2x00_nvram_config()
4778 nv->host_p[1] = BIT_2; in qla2x00_nvram_config()
4799 nv->firmware_options[0] |= BIT_2; in qla2x00_nvram_config()
[all …]
H A Dqla_target.h468 #define CTIO7_FLAGS_DSD_PTR BIT_2
831 TRC_DO_WORK_ERR = BIT_2,
H A Dqla_mbx.c768 (BIT_0 | BIT_1 | BIT_2); in qla2x00_execute_fw()
5673 mcp->mb[2] = BIT_2; in qla24xx_set_fcp_prio()
6264 if (subcode & BIT_2) { in qla83xx_access_control()
6272 if (!(subcode & (BIT_2 | BIT_5))) in qla83xx_access_control()
6884 if (options & BIT_2) { in ql26xx_led_config()
H A Dqla_attr.c1386 options |= BIT_3|BIT_2|BIT_1; in qla2x00_beacon_config_store()
1398 options |= BIT_2; in qla2x00_beacon_config_store()
/OK3568_Linux_fs/kernel/drivers/net/ethernet/realtek/r8168/
H A Dr8168_dash.h185 #define TXS_CC3_0 (BIT_0|BIT_1|BIT_2|BIT_3)
223 #define ISRIMR_DASH_TYPE2_TOK BIT_2
H A Dr8168_n.c4076 if (tp->org_pci_offset_99 & BIT_2) in rtl8168_check_link_status()
4280 if (tp->org_pci_offset_99 & BIT_2) in rtl8168_enable_pci_offset_99()
4294 if (tp->org_pci_offset_99 & BIT_2) { in rtl8168_init_pci_offset_99()
4336 if (tp->org_pci_offset_99 & BIT_2) { in rtl8168_init_pci_offset_99()
4347 if (tp->org_pci_offset_99 & BIT_2) in rtl8168_init_pci_offset_99()
4400 if (tp->org_pci_offset_99 & BIT_2) in rtl8168_init_pci_offset_99()
4425 csi_tmp &= ~BIT_2; in rtl8168_disable_pci_offset_180()
4477 csi_tmp |= BIT_2; in rtl8168_enable_pci_offset_180()
8855 … rtl8168_mac_ocp_write(tp, 0xE63E, rtl8168_mac_ocp_read( tp, 0xE63E) & ~(BIT_3 | BIT_2 | BIT_1)); in rtl8168_hw_init()
8877 RTL_W8(tp, 0xF2, (RTL_R8(tp, 0xF2) & ~(BIT_2 | BIT_1 | BIT_0))); in rtl8168_hw_init()
[all …]
H A Dr8168.h1392 BIT_2 = (1 << 2), enumerator
1792 #define HW_PATCH_SAMSUNG_LAN_DONGLE (BIT_2)
/OK3568_Linux_fs/kernel/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_ctx.c1342 arg1 &= ~(BIT_2 | BIT_3); in qlcnic_config_switch_port()
1348 arg2 |= (BIT_2 | BIT_3); in qlcnic_config_switch_port()
1358 arg2 &= ~(BIT_1 | BIT_2 | BIT_3); in qlcnic_config_switch_port()
1360 arg2 &= ~BIT_2; in qlcnic_config_switch_port()
1361 if (!(esw_cfg->offload_flags & BIT_2)) in qlcnic_config_switch_port()
1366 arg1 |= (BIT_2 | BIT_5); in qlcnic_config_switch_port()
H A Dqlcnic_hdr.h197 #define BIT_2 0x4 macro
494 #define TA_CTL_WRITE BIT_2
H A Dqlcnic.h921 #define QLCNIC_FW_CAPABILITY_2_LRO_MAX_TCP_SEG BIT_2
1316 #define QLCNIC_SWITCH_VLAN_FILTERING BIT_2
H A Dqlcnic_83xx_hw.c749 val = BIT_2 | ((adapter->ahw->num_msix - 1) << 8); in qlcnic_83xx_enable_mbx_interrupt()
751 val = BIT_2; in qlcnic_83xx_enable_mbx_interrupt()
2023 lro_bit_mask = (mode ? (BIT_0 | BIT_1 | BIT_2 | BIT_3) : 0); in qlcnic_83xx_config_hw_lro()
3548 cmd.req.arg[1] = BIT_2 | (adapter->portnum << 16); in qlcnic_83xx_get_stats()
H A Dqlcnic_dcb.c551 if (mbx_out & BIT_2) in qlcnic_83xx_dcb_get_hw_capability()
H A Dqlcnic_hw.c1042 if (!(offload_flags & BIT_2)) in qlcnic_process_flags()
H A Dqlcnic_minidump.c25 #define QLCNIC_DUMP_ANDCRB BIT_2
H A Dqlcnic_83xx_init.c1023 #define QLC_83XX_MATCH_ENCAP_ID BIT_2
H A Dqlcnic_sriov_common.c382 if (status & BIT_2) in qlcnic_sriov_get_vf_vport_info()
H A Dqlcnic_io.c364 #define QLCNIC_ENCAP_INNER_L3_IP6 BIT_2
H A Dqlcnic_main.c1505 esw_cfg.offload_flags |= (BIT_1 | BIT_2); in qlcnic_set_default_offload_settings()
/OK3568_Linux_fs/kernel/drivers/scsi/qla4xxx/
H A Dql4_def.h83 #define BIT_2 0x4 macro
H A Dql4_os.c3553 conn->tcp_timer_scale |= BIT_2; in qla4xxx_copy_from_fwddb_param()
3681 SET_BITVAL(conn->tcp_timer_scale & BIT_2, options, BIT_3); in qla4xxx_copy_to_fwddb_param()
3682 SET_BITVAL(conn->tcp_timer_scale & BIT_1, options, BIT_2); in qla4xxx_copy_to_fwddb_param()
3790 conn->tcp_timer_scale |= BIT_2; in qla4xxx_copy_to_sess_conn_params()

12