1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2004 - 2010 Vladislav Bolkhovitin <vst@vlnb.net>
4*4882a593Smuzhiyun * Copyright (C) 2004 - 2005 Leonid Stoljar
5*4882a593Smuzhiyun * Copyright (C) 2006 Nathaniel Clark <nate@misrule.us>
6*4882a593Smuzhiyun * Copyright (C) 2007 - 2010 ID7 Ltd.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Forward port and refactoring to modern qla2xxx and target/configfs
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Copyright (C) 2010-2011 Nicholas A. Bellinger <nab@kernel.org>
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * Additional file for the target driver support.
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun /*
15*4882a593Smuzhiyun * This is the global def file that is useful for including from the
16*4882a593Smuzhiyun * target portion.
17*4882a593Smuzhiyun */
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #ifndef __QLA_TARGET_H
20*4882a593Smuzhiyun #define __QLA_TARGET_H
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #include "qla_def.h"
23*4882a593Smuzhiyun #include "qla_dsd.h"
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun /*
26*4882a593Smuzhiyun * Must be changed on any change in any initiator visible interfaces or
27*4882a593Smuzhiyun * data in the target add-on
28*4882a593Smuzhiyun */
29*4882a593Smuzhiyun #define QLA2XXX_TARGET_MAGIC 269
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /*
32*4882a593Smuzhiyun * Must be changed on any change in any target visible interfaces or
33*4882a593Smuzhiyun * data in the initiator
34*4882a593Smuzhiyun */
35*4882a593Smuzhiyun #define QLA2XXX_INITIATOR_MAGIC 57222
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #define QLA2XXX_INI_MODE_STR_EXCLUSIVE "exclusive"
38*4882a593Smuzhiyun #define QLA2XXX_INI_MODE_STR_DISABLED "disabled"
39*4882a593Smuzhiyun #define QLA2XXX_INI_MODE_STR_ENABLED "enabled"
40*4882a593Smuzhiyun #define QLA2XXX_INI_MODE_STR_DUAL "dual"
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun #define QLA2XXX_INI_MODE_EXCLUSIVE 0
43*4882a593Smuzhiyun #define QLA2XXX_INI_MODE_DISABLED 1
44*4882a593Smuzhiyun #define QLA2XXX_INI_MODE_ENABLED 2
45*4882a593Smuzhiyun #define QLA2XXX_INI_MODE_DUAL 3
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #define QLA2XXX_COMMAND_COUNT_INIT 250
48*4882a593Smuzhiyun #define QLA2XXX_IMMED_NOTIFY_COUNT_INIT 250
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /*
51*4882a593Smuzhiyun * Used to mark which completion handles (for RIO Status's) are for CTIO's
52*4882a593Smuzhiyun * vs. regular (non-target) info. This is checked for in
53*4882a593Smuzhiyun * qla2x00_process_response_queue() to see if a handle coming back in a
54*4882a593Smuzhiyun * multi-complete should come to the tgt driver or be handled there by qla2xxx
55*4882a593Smuzhiyun */
56*4882a593Smuzhiyun #define CTIO_COMPLETION_HANDLE_MARK BIT_29
57*4882a593Smuzhiyun #if (CTIO_COMPLETION_HANDLE_MARK <= DEFAULT_OUTSTANDING_COMMANDS)
58*4882a593Smuzhiyun #error "CTIO_COMPLETION_HANDLE_MARK not larger than "
59*4882a593Smuzhiyun "DEFAULT_OUTSTANDING_COMMANDS"
60*4882a593Smuzhiyun #endif
61*4882a593Smuzhiyun #define HANDLE_IS_CTIO_COMP(h) (h & CTIO_COMPLETION_HANDLE_MARK)
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /* Used to mark CTIO as intermediate */
64*4882a593Smuzhiyun #define CTIO_INTERMEDIATE_HANDLE_MARK BIT_30
65*4882a593Smuzhiyun #define QLA_TGT_NULL_HANDLE 0
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun #define QLA_TGT_HANDLE_MASK 0xF0000000
68*4882a593Smuzhiyun #define QLA_QPID_HANDLE_MASK 0x00FF0000 /* qpair id mask */
69*4882a593Smuzhiyun #define QLA_CMD_HANDLE_MASK 0x0000FFFF
70*4882a593Smuzhiyun #define QLA_TGT_SKIP_HANDLE (0xFFFFFFFF & ~QLA_TGT_HANDLE_MASK)
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun #define QLA_QPID_HANDLE_SHIFT 16
73*4882a593Smuzhiyun #define GET_QID(_h) ((_h & QLA_QPID_HANDLE_MASK) >> QLA_QPID_HANDLE_SHIFT)
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun #ifndef OF_SS_MODE_0
77*4882a593Smuzhiyun /*
78*4882a593Smuzhiyun * ISP target entries - Flags bit definitions.
79*4882a593Smuzhiyun */
80*4882a593Smuzhiyun #define OF_SS_MODE_0 0
81*4882a593Smuzhiyun #define OF_SS_MODE_1 1
82*4882a593Smuzhiyun #define OF_SS_MODE_2 2
83*4882a593Smuzhiyun #define OF_SS_MODE_3 3
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun #define OF_EXPL_CONF BIT_5 /* Explicit Confirmation Requested */
86*4882a593Smuzhiyun #define OF_DATA_IN BIT_6 /* Data in to initiator */
87*4882a593Smuzhiyun /* (data from target to initiator) */
88*4882a593Smuzhiyun #define OF_DATA_OUT BIT_7 /* Data out from initiator */
89*4882a593Smuzhiyun /* (data from initiator to target) */
90*4882a593Smuzhiyun #define OF_NO_DATA (BIT_7 | BIT_6)
91*4882a593Smuzhiyun #define OF_INC_RC BIT_8 /* Increment command resource count */
92*4882a593Smuzhiyun #define OF_FAST_POST BIT_9 /* Enable mailbox fast posting. */
93*4882a593Smuzhiyun #define OF_CONF_REQ BIT_13 /* Confirmation Requested */
94*4882a593Smuzhiyun #define OF_TERM_EXCH BIT_14 /* Terminate exchange */
95*4882a593Smuzhiyun #define OF_SSTS BIT_15 /* Send SCSI status */
96*4882a593Smuzhiyun #endif
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun #ifndef QLA_TGT_DATASEGS_PER_CMD32
99*4882a593Smuzhiyun #define QLA_TGT_DATASEGS_PER_CMD32 3
100*4882a593Smuzhiyun #define QLA_TGT_DATASEGS_PER_CONT32 7
101*4882a593Smuzhiyun #define QLA_TGT_MAX_SG32(ql) \
102*4882a593Smuzhiyun (((ql) > 0) ? (QLA_TGT_DATASEGS_PER_CMD32 + \
103*4882a593Smuzhiyun QLA_TGT_DATASEGS_PER_CONT32*((ql) - 1)) : 0)
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun #define QLA_TGT_DATASEGS_PER_CMD64 2
106*4882a593Smuzhiyun #define QLA_TGT_DATASEGS_PER_CONT64 5
107*4882a593Smuzhiyun #define QLA_TGT_MAX_SG64(ql) \
108*4882a593Smuzhiyun (((ql) > 0) ? (QLA_TGT_DATASEGS_PER_CMD64 + \
109*4882a593Smuzhiyun QLA_TGT_DATASEGS_PER_CONT64*((ql) - 1)) : 0)
110*4882a593Smuzhiyun #endif
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun #ifndef QLA_TGT_DATASEGS_PER_CMD_24XX
113*4882a593Smuzhiyun #define QLA_TGT_DATASEGS_PER_CMD_24XX 1
114*4882a593Smuzhiyun #define QLA_TGT_DATASEGS_PER_CONT_24XX 5
115*4882a593Smuzhiyun #define QLA_TGT_MAX_SG_24XX(ql) \
116*4882a593Smuzhiyun (min(1270, ((ql) > 0) ? (QLA_TGT_DATASEGS_PER_CMD_24XX + \
117*4882a593Smuzhiyun QLA_TGT_DATASEGS_PER_CONT_24XX*((ql) - 1)) : 0))
118*4882a593Smuzhiyun #endif
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun #define GET_TARGET_ID(ha, iocb) ((HAS_EXTENDED_IDS(ha)) \
121*4882a593Smuzhiyun ? le16_to_cpu((iocb)->u.isp2x.target.extended) \
122*4882a593Smuzhiyun : (uint16_t)(iocb)->u.isp2x.target.id.standard)
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun #ifndef NOTIFY_ACK_TYPE
125*4882a593Smuzhiyun #define NOTIFY_ACK_TYPE 0x0E /* Notify acknowledge entry. */
126*4882a593Smuzhiyun /*
127*4882a593Smuzhiyun * ISP queue - notify acknowledge entry structure definition.
128*4882a593Smuzhiyun * This is sent to the ISP from the target driver.
129*4882a593Smuzhiyun */
130*4882a593Smuzhiyun struct nack_to_isp {
131*4882a593Smuzhiyun uint8_t entry_type; /* Entry type. */
132*4882a593Smuzhiyun uint8_t entry_count; /* Entry count. */
133*4882a593Smuzhiyun uint8_t sys_define; /* System defined. */
134*4882a593Smuzhiyun uint8_t entry_status; /* Entry Status. */
135*4882a593Smuzhiyun union {
136*4882a593Smuzhiyun struct {
137*4882a593Smuzhiyun __le32 sys_define_2; /* System defined. */
138*4882a593Smuzhiyun target_id_t target;
139*4882a593Smuzhiyun uint8_t target_id;
140*4882a593Smuzhiyun uint8_t reserved_1;
141*4882a593Smuzhiyun __le16 flags;
142*4882a593Smuzhiyun __le16 resp_code;
143*4882a593Smuzhiyun __le16 status;
144*4882a593Smuzhiyun __le16 task_flags;
145*4882a593Smuzhiyun __le16 seq_id;
146*4882a593Smuzhiyun __le16 srr_rx_id;
147*4882a593Smuzhiyun __le32 srr_rel_offs;
148*4882a593Smuzhiyun __le16 srr_ui;
149*4882a593Smuzhiyun __le16 srr_flags;
150*4882a593Smuzhiyun __le16 srr_reject_code;
151*4882a593Smuzhiyun uint8_t srr_reject_vendor_uniq;
152*4882a593Smuzhiyun uint8_t srr_reject_code_expl;
153*4882a593Smuzhiyun uint8_t reserved_2[24];
154*4882a593Smuzhiyun } isp2x;
155*4882a593Smuzhiyun struct {
156*4882a593Smuzhiyun uint32_t handle;
157*4882a593Smuzhiyun __le16 nport_handle;
158*4882a593Smuzhiyun uint16_t reserved_1;
159*4882a593Smuzhiyun __le16 flags;
160*4882a593Smuzhiyun __le16 srr_rx_id;
161*4882a593Smuzhiyun __le16 status;
162*4882a593Smuzhiyun uint8_t status_subcode;
163*4882a593Smuzhiyun uint8_t fw_handle;
164*4882a593Smuzhiyun __le32 exchange_address;
165*4882a593Smuzhiyun __le32 srr_rel_offs;
166*4882a593Smuzhiyun __le16 srr_ui;
167*4882a593Smuzhiyun __le16 srr_flags;
168*4882a593Smuzhiyun uint8_t reserved_4[19];
169*4882a593Smuzhiyun uint8_t vp_index;
170*4882a593Smuzhiyun uint8_t srr_reject_vendor_uniq;
171*4882a593Smuzhiyun uint8_t srr_reject_code_expl;
172*4882a593Smuzhiyun uint8_t srr_reject_code;
173*4882a593Smuzhiyun uint8_t reserved_5[5];
174*4882a593Smuzhiyun } isp24;
175*4882a593Smuzhiyun } u;
176*4882a593Smuzhiyun uint8_t reserved[2];
177*4882a593Smuzhiyun __le16 ox_id;
178*4882a593Smuzhiyun } __packed;
179*4882a593Smuzhiyun #define NOTIFY_ACK_FLAGS_TERMINATE BIT_3
180*4882a593Smuzhiyun #define NOTIFY_ACK_SRR_FLAGS_ACCEPT 0
181*4882a593Smuzhiyun #define NOTIFY_ACK_SRR_FLAGS_REJECT 1
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun #define NOTIFY_ACK_SRR_REJECT_REASON_UNABLE_TO_PERFORM 0x9
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun #define NOTIFY_ACK_SRR_FLAGS_REJECT_EXPL_NO_EXPL 0
186*4882a593Smuzhiyun #define NOTIFY_ACK_SRR_FLAGS_REJECT_EXPL_UNABLE_TO_SUPPLY_DATA 0x2a
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun #define NOTIFY_ACK_SUCCESS 0x01
189*4882a593Smuzhiyun #endif
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun #ifndef ACCEPT_TGT_IO_TYPE
192*4882a593Smuzhiyun #define ACCEPT_TGT_IO_TYPE 0x16 /* Accept target I/O entry. */
193*4882a593Smuzhiyun #endif
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun #ifndef CONTINUE_TGT_IO_TYPE
196*4882a593Smuzhiyun #define CONTINUE_TGT_IO_TYPE 0x17
197*4882a593Smuzhiyun /*
198*4882a593Smuzhiyun * ISP queue - Continue Target I/O (CTIO) entry for status mode 0 structure.
199*4882a593Smuzhiyun * This structure is sent to the ISP 2xxx from target driver.
200*4882a593Smuzhiyun */
201*4882a593Smuzhiyun struct ctio_to_2xxx {
202*4882a593Smuzhiyun uint8_t entry_type; /* Entry type. */
203*4882a593Smuzhiyun uint8_t entry_count; /* Entry count. */
204*4882a593Smuzhiyun uint8_t sys_define; /* System defined. */
205*4882a593Smuzhiyun uint8_t entry_status; /* Entry Status. */
206*4882a593Smuzhiyun uint32_t handle; /* System defined handle */
207*4882a593Smuzhiyun target_id_t target;
208*4882a593Smuzhiyun __le16 rx_id;
209*4882a593Smuzhiyun __le16 flags;
210*4882a593Smuzhiyun __le16 status;
211*4882a593Smuzhiyun __le16 timeout; /* 0 = 30 seconds, 0xFFFF = disable */
212*4882a593Smuzhiyun __le16 dseg_count; /* Data segment count. */
213*4882a593Smuzhiyun __le32 relative_offset;
214*4882a593Smuzhiyun __le32 residual;
215*4882a593Smuzhiyun __le16 reserved_1[3];
216*4882a593Smuzhiyun __le16 scsi_status;
217*4882a593Smuzhiyun __le32 transfer_length;
218*4882a593Smuzhiyun struct dsd32 dsd[3];
219*4882a593Smuzhiyun } __packed;
220*4882a593Smuzhiyun #define ATIO_PATH_INVALID 0x07
221*4882a593Smuzhiyun #define ATIO_CANT_PROV_CAP 0x16
222*4882a593Smuzhiyun #define ATIO_CDB_VALID 0x3D
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun #define ATIO_EXEC_READ BIT_1
225*4882a593Smuzhiyun #define ATIO_EXEC_WRITE BIT_0
226*4882a593Smuzhiyun #endif
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun #ifndef CTIO_A64_TYPE
229*4882a593Smuzhiyun #define CTIO_A64_TYPE 0x1F
230*4882a593Smuzhiyun #define CTIO_SUCCESS 0x01
231*4882a593Smuzhiyun #define CTIO_ABORTED 0x02
232*4882a593Smuzhiyun #define CTIO_INVALID_RX_ID 0x08
233*4882a593Smuzhiyun #define CTIO_TIMEOUT 0x0B
234*4882a593Smuzhiyun #define CTIO_DIF_ERROR 0x0C /* DIF error detected */
235*4882a593Smuzhiyun #define CTIO_LIP_RESET 0x0E
236*4882a593Smuzhiyun #define CTIO_TARGET_RESET 0x17
237*4882a593Smuzhiyun #define CTIO_PORT_UNAVAILABLE 0x28
238*4882a593Smuzhiyun #define CTIO_PORT_LOGGED_OUT 0x29
239*4882a593Smuzhiyun #define CTIO_PORT_CONF_CHANGED 0x2A
240*4882a593Smuzhiyun #define CTIO_SRR_RECEIVED 0x45
241*4882a593Smuzhiyun #endif
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun #ifndef CTIO_RET_TYPE
244*4882a593Smuzhiyun #define CTIO_RET_TYPE 0x17 /* CTIO return entry */
245*4882a593Smuzhiyun #define ATIO_TYPE7 0x06 /* Accept target I/O entry for 24xx */
246*4882a593Smuzhiyun #endif
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun struct fcp_hdr {
249*4882a593Smuzhiyun uint8_t r_ctl;
250*4882a593Smuzhiyun be_id_t d_id;
251*4882a593Smuzhiyun uint8_t cs_ctl;
252*4882a593Smuzhiyun be_id_t s_id;
253*4882a593Smuzhiyun uint8_t type;
254*4882a593Smuzhiyun uint8_t f_ctl[3];
255*4882a593Smuzhiyun uint8_t seq_id;
256*4882a593Smuzhiyun uint8_t df_ctl;
257*4882a593Smuzhiyun uint16_t seq_cnt;
258*4882a593Smuzhiyun __be16 ox_id;
259*4882a593Smuzhiyun uint16_t rx_id;
260*4882a593Smuzhiyun __le32 parameter;
261*4882a593Smuzhiyun };
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun struct fcp_hdr_le {
264*4882a593Smuzhiyun le_id_t d_id;
265*4882a593Smuzhiyun uint8_t r_ctl;
266*4882a593Smuzhiyun le_id_t s_id;
267*4882a593Smuzhiyun uint8_t cs_ctl;
268*4882a593Smuzhiyun uint8_t f_ctl[3];
269*4882a593Smuzhiyun uint8_t type;
270*4882a593Smuzhiyun __le16 seq_cnt;
271*4882a593Smuzhiyun uint8_t df_ctl;
272*4882a593Smuzhiyun uint8_t seq_id;
273*4882a593Smuzhiyun __le16 rx_id;
274*4882a593Smuzhiyun __le16 ox_id;
275*4882a593Smuzhiyun __le32 parameter;
276*4882a593Smuzhiyun };
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun #define F_CTL_EXCH_CONTEXT_RESP BIT_23
279*4882a593Smuzhiyun #define F_CTL_SEQ_CONTEXT_RESIP BIT_22
280*4882a593Smuzhiyun #define F_CTL_LAST_SEQ BIT_20
281*4882a593Smuzhiyun #define F_CTL_END_SEQ BIT_19
282*4882a593Smuzhiyun #define F_CTL_SEQ_INITIATIVE BIT_16
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun #define R_CTL_BASIC_LINK_SERV 0x80
285*4882a593Smuzhiyun #define R_CTL_B_ACC 0x4
286*4882a593Smuzhiyun #define R_CTL_B_RJT 0x5
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun struct atio7_fcp_cmnd {
289*4882a593Smuzhiyun uint64_t lun;
290*4882a593Smuzhiyun uint8_t cmnd_ref;
291*4882a593Smuzhiyun uint8_t task_attr:3;
292*4882a593Smuzhiyun uint8_t reserved:5;
293*4882a593Smuzhiyun uint8_t task_mgmt_flags;
294*4882a593Smuzhiyun #define FCP_CMND_TASK_MGMT_CLEAR_ACA 6
295*4882a593Smuzhiyun #define FCP_CMND_TASK_MGMT_TARGET_RESET 5
296*4882a593Smuzhiyun #define FCP_CMND_TASK_MGMT_LU_RESET 4
297*4882a593Smuzhiyun #define FCP_CMND_TASK_MGMT_CLEAR_TASK_SET 2
298*4882a593Smuzhiyun #define FCP_CMND_TASK_MGMT_ABORT_TASK_SET 1
299*4882a593Smuzhiyun uint8_t wrdata:1;
300*4882a593Smuzhiyun uint8_t rddata:1;
301*4882a593Smuzhiyun uint8_t add_cdb_len:6;
302*4882a593Smuzhiyun uint8_t cdb[16];
303*4882a593Smuzhiyun /*
304*4882a593Smuzhiyun * add_cdb is optional and can absent from struct atio7_fcp_cmnd. Size 4
305*4882a593Smuzhiyun * only to make sizeof(struct atio7_fcp_cmnd) be as expected by
306*4882a593Smuzhiyun * BUILD_BUG_ON in qlt_init().
307*4882a593Smuzhiyun */
308*4882a593Smuzhiyun uint8_t add_cdb[4];
309*4882a593Smuzhiyun /* __le32 data_length; */
310*4882a593Smuzhiyun } __packed;
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun /*
313*4882a593Smuzhiyun * ISP queue - Accept Target I/O (ATIO) type entry IOCB structure.
314*4882a593Smuzhiyun * This is sent from the ISP to the target driver.
315*4882a593Smuzhiyun */
316*4882a593Smuzhiyun struct atio_from_isp {
317*4882a593Smuzhiyun union {
318*4882a593Smuzhiyun struct {
319*4882a593Smuzhiyun __le16 entry_hdr;
320*4882a593Smuzhiyun uint8_t sys_define; /* System defined. */
321*4882a593Smuzhiyun uint8_t entry_status; /* Entry Status. */
322*4882a593Smuzhiyun __le32 sys_define_2; /* System defined. */
323*4882a593Smuzhiyun target_id_t target;
324*4882a593Smuzhiyun __le16 rx_id;
325*4882a593Smuzhiyun __le16 flags;
326*4882a593Smuzhiyun __le16 status;
327*4882a593Smuzhiyun uint8_t command_ref;
328*4882a593Smuzhiyun uint8_t task_codes;
329*4882a593Smuzhiyun uint8_t task_flags;
330*4882a593Smuzhiyun uint8_t execution_codes;
331*4882a593Smuzhiyun uint8_t cdb[MAX_CMDSZ];
332*4882a593Smuzhiyun __le32 data_length;
333*4882a593Smuzhiyun __le16 lun;
334*4882a593Smuzhiyun uint8_t initiator_port_name[WWN_SIZE]; /* on qla23xx */
335*4882a593Smuzhiyun __le16 reserved_32[6];
336*4882a593Smuzhiyun __le16 ox_id;
337*4882a593Smuzhiyun } isp2x;
338*4882a593Smuzhiyun struct {
339*4882a593Smuzhiyun __le16 entry_hdr;
340*4882a593Smuzhiyun uint8_t fcp_cmnd_len_low;
341*4882a593Smuzhiyun uint8_t fcp_cmnd_len_high:4;
342*4882a593Smuzhiyun uint8_t attr:4;
343*4882a593Smuzhiyun __le32 exchange_addr;
344*4882a593Smuzhiyun #define ATIO_EXCHANGE_ADDRESS_UNKNOWN 0xFFFFFFFF
345*4882a593Smuzhiyun struct fcp_hdr fcp_hdr;
346*4882a593Smuzhiyun struct atio7_fcp_cmnd fcp_cmnd;
347*4882a593Smuzhiyun } isp24;
348*4882a593Smuzhiyun struct {
349*4882a593Smuzhiyun uint8_t entry_type; /* Entry type. */
350*4882a593Smuzhiyun uint8_t entry_count; /* Entry count. */
351*4882a593Smuzhiyun __le16 attr_n_length;
352*4882a593Smuzhiyun #define FCP_CMD_LENGTH_MASK 0x0fff
353*4882a593Smuzhiyun #define FCP_CMD_LENGTH_MIN 0x38
354*4882a593Smuzhiyun uint8_t data[56];
355*4882a593Smuzhiyun __le32 signature;
356*4882a593Smuzhiyun #define ATIO_PROCESSED 0xDEADDEAD /* Signature */
357*4882a593Smuzhiyun } raw;
358*4882a593Smuzhiyun } u;
359*4882a593Smuzhiyun } __packed;
360*4882a593Smuzhiyun
fcpcmd_is_corrupted(struct atio * atio)361*4882a593Smuzhiyun static inline int fcpcmd_is_corrupted(struct atio *atio)
362*4882a593Smuzhiyun {
363*4882a593Smuzhiyun if (atio->entry_type == ATIO_TYPE7 &&
364*4882a593Smuzhiyun ((le16_to_cpu(atio->attr_n_length) & FCP_CMD_LENGTH_MASK) <
365*4882a593Smuzhiyun FCP_CMD_LENGTH_MIN))
366*4882a593Smuzhiyun return 1;
367*4882a593Smuzhiyun else
368*4882a593Smuzhiyun return 0;
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun /* adjust corrupted atio so we won't trip over the same entry again. */
adjust_corrupted_atio(struct atio_from_isp * atio)372*4882a593Smuzhiyun static inline void adjust_corrupted_atio(struct atio_from_isp *atio)
373*4882a593Smuzhiyun {
374*4882a593Smuzhiyun atio->u.raw.attr_n_length = cpu_to_le16(FCP_CMD_LENGTH_MIN);
375*4882a593Smuzhiyun atio->u.isp24.fcp_cmnd.add_cdb_len = 0;
376*4882a593Smuzhiyun }
377*4882a593Smuzhiyun
get_datalen_for_atio(struct atio_from_isp * atio)378*4882a593Smuzhiyun static inline int get_datalen_for_atio(struct atio_from_isp *atio)
379*4882a593Smuzhiyun {
380*4882a593Smuzhiyun int len = atio->u.isp24.fcp_cmnd.add_cdb_len;
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun return get_unaligned_be32(&atio->u.isp24.fcp_cmnd.add_cdb[len * 4]);
383*4882a593Smuzhiyun }
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun #define CTIO_TYPE7 0x12 /* Continue target I/O entry (for 24xx) */
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun /*
388*4882a593Smuzhiyun * ISP queue - Continue Target I/O (ATIO) type 7 entry (for 24xx) structure.
389*4882a593Smuzhiyun * This structure is sent to the ISP 24xx from the target driver.
390*4882a593Smuzhiyun */
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun struct ctio7_to_24xx {
393*4882a593Smuzhiyun uint8_t entry_type; /* Entry type. */
394*4882a593Smuzhiyun uint8_t entry_count; /* Entry count. */
395*4882a593Smuzhiyun uint8_t sys_define; /* System defined. */
396*4882a593Smuzhiyun uint8_t entry_status; /* Entry Status. */
397*4882a593Smuzhiyun uint32_t handle; /* System defined handle */
398*4882a593Smuzhiyun __le16 nport_handle;
399*4882a593Smuzhiyun #define CTIO7_NHANDLE_UNRECOGNIZED 0xFFFF
400*4882a593Smuzhiyun __le16 timeout;
401*4882a593Smuzhiyun __le16 dseg_count; /* Data segment count. */
402*4882a593Smuzhiyun uint8_t vp_index;
403*4882a593Smuzhiyun uint8_t add_flags;
404*4882a593Smuzhiyun le_id_t initiator_id;
405*4882a593Smuzhiyun uint8_t reserved;
406*4882a593Smuzhiyun __le32 exchange_addr;
407*4882a593Smuzhiyun union {
408*4882a593Smuzhiyun struct {
409*4882a593Smuzhiyun __le16 reserved1;
410*4882a593Smuzhiyun __le16 flags;
411*4882a593Smuzhiyun __le32 residual;
412*4882a593Smuzhiyun __le16 ox_id;
413*4882a593Smuzhiyun __le16 scsi_status;
414*4882a593Smuzhiyun __le32 relative_offset;
415*4882a593Smuzhiyun __le32 reserved2;
416*4882a593Smuzhiyun __le32 transfer_length;
417*4882a593Smuzhiyun __le32 reserved3;
418*4882a593Smuzhiyun struct dsd64 dsd;
419*4882a593Smuzhiyun } status0;
420*4882a593Smuzhiyun struct {
421*4882a593Smuzhiyun __le16 sense_length;
422*4882a593Smuzhiyun __le16 flags;
423*4882a593Smuzhiyun __le32 residual;
424*4882a593Smuzhiyun __le16 ox_id;
425*4882a593Smuzhiyun __le16 scsi_status;
426*4882a593Smuzhiyun __le16 response_len;
427*4882a593Smuzhiyun __le16 reserved;
428*4882a593Smuzhiyun uint8_t sense_data[24];
429*4882a593Smuzhiyun } status1;
430*4882a593Smuzhiyun } u;
431*4882a593Smuzhiyun } __packed;
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun /*
434*4882a593Smuzhiyun * ISP queue - CTIO type 7 from ISP 24xx to target driver
435*4882a593Smuzhiyun * returned entry structure.
436*4882a593Smuzhiyun */
437*4882a593Smuzhiyun struct ctio7_from_24xx {
438*4882a593Smuzhiyun uint8_t entry_type; /* Entry type. */
439*4882a593Smuzhiyun uint8_t entry_count; /* Entry count. */
440*4882a593Smuzhiyun uint8_t sys_define; /* System defined. */
441*4882a593Smuzhiyun uint8_t entry_status; /* Entry Status. */
442*4882a593Smuzhiyun uint32_t handle; /* System defined handle */
443*4882a593Smuzhiyun __le16 status;
444*4882a593Smuzhiyun __le16 timeout;
445*4882a593Smuzhiyun __le16 dseg_count; /* Data segment count. */
446*4882a593Smuzhiyun uint8_t vp_index;
447*4882a593Smuzhiyun uint8_t reserved1[5];
448*4882a593Smuzhiyun __le32 exchange_address;
449*4882a593Smuzhiyun __le16 reserved2;
450*4882a593Smuzhiyun __le16 flags;
451*4882a593Smuzhiyun __le32 residual;
452*4882a593Smuzhiyun __le16 ox_id;
453*4882a593Smuzhiyun __le16 reserved3;
454*4882a593Smuzhiyun __le32 relative_offset;
455*4882a593Smuzhiyun uint8_t reserved4[24];
456*4882a593Smuzhiyun } __packed;
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun /* CTIO7 flags values */
459*4882a593Smuzhiyun #define CTIO7_FLAGS_SEND_STATUS BIT_15
460*4882a593Smuzhiyun #define CTIO7_FLAGS_TERMINATE BIT_14
461*4882a593Smuzhiyun #define CTIO7_FLAGS_CONFORM_REQ BIT_13
462*4882a593Smuzhiyun #define CTIO7_FLAGS_DONT_RET_CTIO BIT_8
463*4882a593Smuzhiyun #define CTIO7_FLAGS_STATUS_MODE_0 0
464*4882a593Smuzhiyun #define CTIO7_FLAGS_STATUS_MODE_1 BIT_6
465*4882a593Smuzhiyun #define CTIO7_FLAGS_STATUS_MODE_2 BIT_7
466*4882a593Smuzhiyun #define CTIO7_FLAGS_EXPLICIT_CONFORM BIT_5
467*4882a593Smuzhiyun #define CTIO7_FLAGS_CONFIRM_SATISF BIT_4
468*4882a593Smuzhiyun #define CTIO7_FLAGS_DSD_PTR BIT_2
469*4882a593Smuzhiyun #define CTIO7_FLAGS_DATA_IN BIT_1 /* data to initiator */
470*4882a593Smuzhiyun #define CTIO7_FLAGS_DATA_OUT BIT_0 /* data from initiator */
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun #define ELS_PLOGI 0x3
473*4882a593Smuzhiyun #define ELS_FLOGI 0x4
474*4882a593Smuzhiyun #define ELS_LOGO 0x5
475*4882a593Smuzhiyun #define ELS_PRLI 0x20
476*4882a593Smuzhiyun #define ELS_PRLO 0x21
477*4882a593Smuzhiyun #define ELS_TPRLO 0x24
478*4882a593Smuzhiyun #define ELS_PDISC 0x50
479*4882a593Smuzhiyun #define ELS_ADISC 0x52
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun /*
482*4882a593Smuzhiyun *CTIO Type CRC_2 IOCB
483*4882a593Smuzhiyun */
484*4882a593Smuzhiyun struct ctio_crc2_to_fw {
485*4882a593Smuzhiyun uint8_t entry_type; /* Entry type. */
486*4882a593Smuzhiyun #define CTIO_CRC2 0x7A
487*4882a593Smuzhiyun uint8_t entry_count; /* Entry count. */
488*4882a593Smuzhiyun uint8_t sys_define; /* System defined. */
489*4882a593Smuzhiyun uint8_t entry_status; /* Entry Status. */
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun uint32_t handle; /* System handle. */
492*4882a593Smuzhiyun __le16 nport_handle; /* N_PORT handle. */
493*4882a593Smuzhiyun __le16 timeout; /* Command timeout. */
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun __le16 dseg_count; /* Data segment count. */
496*4882a593Smuzhiyun uint8_t vp_index;
497*4882a593Smuzhiyun uint8_t add_flags; /* additional flags */
498*4882a593Smuzhiyun #define CTIO_CRC2_AF_DIF_DSD_ENA BIT_3
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun le_id_t initiator_id; /* initiator ID */
501*4882a593Smuzhiyun uint8_t reserved1;
502*4882a593Smuzhiyun __le32 exchange_addr; /* rcv exchange address */
503*4882a593Smuzhiyun __le16 reserved2;
504*4882a593Smuzhiyun __le16 flags; /* refer to CTIO7 flags values */
505*4882a593Smuzhiyun __le32 residual;
506*4882a593Smuzhiyun __le16 ox_id;
507*4882a593Smuzhiyun __le16 scsi_status;
508*4882a593Smuzhiyun __le32 relative_offset;
509*4882a593Smuzhiyun __le32 reserved5;
510*4882a593Smuzhiyun __le32 transfer_length; /* total fc transfer length */
511*4882a593Smuzhiyun __le32 reserved6;
512*4882a593Smuzhiyun __le64 crc_context_address __packed; /* Data segment address. */
513*4882a593Smuzhiyun __le16 crc_context_len; /* Data segment length. */
514*4882a593Smuzhiyun __le16 reserved_1; /* MUST be set to 0. */
515*4882a593Smuzhiyun };
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun /* CTIO Type CRC_x Status IOCB */
518*4882a593Smuzhiyun struct ctio_crc_from_fw {
519*4882a593Smuzhiyun uint8_t entry_type; /* Entry type. */
520*4882a593Smuzhiyun uint8_t entry_count; /* Entry count. */
521*4882a593Smuzhiyun uint8_t sys_define; /* System defined. */
522*4882a593Smuzhiyun uint8_t entry_status; /* Entry Status. */
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun uint32_t handle; /* System handle. */
525*4882a593Smuzhiyun __le16 status;
526*4882a593Smuzhiyun __le16 timeout; /* Command timeout. */
527*4882a593Smuzhiyun __le16 dseg_count; /* Data segment count. */
528*4882a593Smuzhiyun __le32 reserved1;
529*4882a593Smuzhiyun __le16 state_flags;
530*4882a593Smuzhiyun #define CTIO_CRC_SF_DIF_CHOPPED BIT_4
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun __le32 exchange_address; /* rcv exchange address */
533*4882a593Smuzhiyun __le16 reserved2;
534*4882a593Smuzhiyun __le16 flags;
535*4882a593Smuzhiyun __le32 resid_xfer_length;
536*4882a593Smuzhiyun __le16 ox_id;
537*4882a593Smuzhiyun uint8_t reserved3[12];
538*4882a593Smuzhiyun __le16 runt_guard; /* reported runt blk guard */
539*4882a593Smuzhiyun uint8_t actual_dif[8];
540*4882a593Smuzhiyun uint8_t expected_dif[8];
541*4882a593Smuzhiyun } __packed;
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun /*
544*4882a593Smuzhiyun * ISP queue - ABTS received/response entries structure definition for 24xx.
545*4882a593Smuzhiyun */
546*4882a593Smuzhiyun #define ABTS_RECV_24XX 0x54 /* ABTS received (for 24xx) */
547*4882a593Smuzhiyun #define ABTS_RESP_24XX 0x55 /* ABTS responce (for 24xx) */
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun /*
550*4882a593Smuzhiyun * ISP queue - ABTS received IOCB entry structure definition for 24xx.
551*4882a593Smuzhiyun * The ABTS BLS received from the wire is sent to the
552*4882a593Smuzhiyun * target driver by the ISP 24xx.
553*4882a593Smuzhiyun * The IOCB is placed on the response queue.
554*4882a593Smuzhiyun */
555*4882a593Smuzhiyun struct abts_recv_from_24xx {
556*4882a593Smuzhiyun uint8_t entry_type; /* Entry type. */
557*4882a593Smuzhiyun uint8_t entry_count; /* Entry count. */
558*4882a593Smuzhiyun uint8_t sys_define; /* System defined. */
559*4882a593Smuzhiyun uint8_t entry_status; /* Entry Status. */
560*4882a593Smuzhiyun uint8_t reserved_1[6];
561*4882a593Smuzhiyun __le16 nport_handle;
562*4882a593Smuzhiyun uint8_t reserved_2[2];
563*4882a593Smuzhiyun uint8_t vp_index;
564*4882a593Smuzhiyun uint8_t reserved_3:4;
565*4882a593Smuzhiyun uint8_t sof_type:4;
566*4882a593Smuzhiyun __le32 exchange_address;
567*4882a593Smuzhiyun struct fcp_hdr_le fcp_hdr_le;
568*4882a593Smuzhiyun uint8_t reserved_4[16];
569*4882a593Smuzhiyun __le32 exchange_addr_to_abort;
570*4882a593Smuzhiyun } __packed;
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun #define ABTS_PARAM_ABORT_SEQ BIT_0
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun struct ba_acc_le {
575*4882a593Smuzhiyun __le16 reserved;
576*4882a593Smuzhiyun uint8_t seq_id_last;
577*4882a593Smuzhiyun uint8_t seq_id_valid;
578*4882a593Smuzhiyun #define SEQ_ID_VALID 0x80
579*4882a593Smuzhiyun #define SEQ_ID_INVALID 0x00
580*4882a593Smuzhiyun __le16 rx_id;
581*4882a593Smuzhiyun __le16 ox_id;
582*4882a593Smuzhiyun __le16 high_seq_cnt;
583*4882a593Smuzhiyun __le16 low_seq_cnt;
584*4882a593Smuzhiyun } __packed;
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun struct ba_rjt_le {
587*4882a593Smuzhiyun uint8_t vendor_uniq;
588*4882a593Smuzhiyun uint8_t reason_expl;
589*4882a593Smuzhiyun uint8_t reason_code;
590*4882a593Smuzhiyun #define BA_RJT_REASON_CODE_INVALID_COMMAND 0x1
591*4882a593Smuzhiyun #define BA_RJT_REASON_CODE_UNABLE_TO_PERFORM 0x9
592*4882a593Smuzhiyun uint8_t reserved;
593*4882a593Smuzhiyun } __packed;
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun /*
596*4882a593Smuzhiyun * ISP queue - ABTS Response IOCB entry structure definition for 24xx.
597*4882a593Smuzhiyun * The ABTS response to the ABTS received is sent by the
598*4882a593Smuzhiyun * target driver to the ISP 24xx.
599*4882a593Smuzhiyun * The IOCB is placed on the request queue.
600*4882a593Smuzhiyun */
601*4882a593Smuzhiyun struct abts_resp_to_24xx {
602*4882a593Smuzhiyun uint8_t entry_type; /* Entry type. */
603*4882a593Smuzhiyun uint8_t entry_count; /* Entry count. */
604*4882a593Smuzhiyun uint8_t sys_define; /* System defined. */
605*4882a593Smuzhiyun uint8_t entry_status; /* Entry Status. */
606*4882a593Smuzhiyun uint32_t handle;
607*4882a593Smuzhiyun __le16 reserved_1;
608*4882a593Smuzhiyun __le16 nport_handle;
609*4882a593Smuzhiyun __le16 control_flags;
610*4882a593Smuzhiyun #define ABTS_CONTR_FLG_TERM_EXCHG BIT_0
611*4882a593Smuzhiyun uint8_t vp_index;
612*4882a593Smuzhiyun uint8_t reserved_3:4;
613*4882a593Smuzhiyun uint8_t sof_type:4;
614*4882a593Smuzhiyun __le32 exchange_address;
615*4882a593Smuzhiyun struct fcp_hdr_le fcp_hdr_le;
616*4882a593Smuzhiyun union {
617*4882a593Smuzhiyun struct ba_acc_le ba_acct;
618*4882a593Smuzhiyun struct ba_rjt_le ba_rjt;
619*4882a593Smuzhiyun } __packed payload;
620*4882a593Smuzhiyun __le32 reserved_4;
621*4882a593Smuzhiyun __le32 exchange_addr_to_abort;
622*4882a593Smuzhiyun } __packed;
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun /*
625*4882a593Smuzhiyun * ISP queue - ABTS Response IOCB from ISP24xx Firmware entry structure.
626*4882a593Smuzhiyun * The ABTS response with completion status to the ABTS response
627*4882a593Smuzhiyun * (sent by the target driver to the ISP 24xx) is sent by the
628*4882a593Smuzhiyun * ISP24xx firmware to the target driver.
629*4882a593Smuzhiyun * The IOCB is placed on the response queue.
630*4882a593Smuzhiyun */
631*4882a593Smuzhiyun struct abts_resp_from_24xx_fw {
632*4882a593Smuzhiyun uint8_t entry_type; /* Entry type. */
633*4882a593Smuzhiyun uint8_t entry_count; /* Entry count. */
634*4882a593Smuzhiyun uint8_t sys_define; /* System defined. */
635*4882a593Smuzhiyun uint8_t entry_status; /* Entry Status. */
636*4882a593Smuzhiyun uint32_t handle;
637*4882a593Smuzhiyun __le16 compl_status;
638*4882a593Smuzhiyun #define ABTS_RESP_COMPL_SUCCESS 0
639*4882a593Smuzhiyun #define ABTS_RESP_COMPL_SUBCODE_ERROR 0x31
640*4882a593Smuzhiyun __le16 nport_handle;
641*4882a593Smuzhiyun __le16 reserved_1;
642*4882a593Smuzhiyun uint8_t reserved_2;
643*4882a593Smuzhiyun uint8_t reserved_3:4;
644*4882a593Smuzhiyun uint8_t sof_type:4;
645*4882a593Smuzhiyun __le32 exchange_address;
646*4882a593Smuzhiyun struct fcp_hdr_le fcp_hdr_le;
647*4882a593Smuzhiyun uint8_t reserved_4[8];
648*4882a593Smuzhiyun __le32 error_subcode1;
649*4882a593Smuzhiyun #define ABTS_RESP_SUBCODE_ERR_ABORTED_EXCH_NOT_TERM 0x1E
650*4882a593Smuzhiyun __le32 error_subcode2;
651*4882a593Smuzhiyun __le32 exchange_addr_to_abort;
652*4882a593Smuzhiyun } __packed;
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun /********************************************************************\
655*4882a593Smuzhiyun * Type Definitions used by initiator & target halves
656*4882a593Smuzhiyun \********************************************************************/
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun struct qla_tgt_mgmt_cmd;
659*4882a593Smuzhiyun struct fc_port;
660*4882a593Smuzhiyun struct qla_tgt_cmd;
661*4882a593Smuzhiyun
662*4882a593Smuzhiyun /*
663*4882a593Smuzhiyun * This structure provides a template of function calls that the
664*4882a593Smuzhiyun * target driver (from within qla_target.c) can issue to the
665*4882a593Smuzhiyun * target module (tcm_qla2xxx).
666*4882a593Smuzhiyun */
667*4882a593Smuzhiyun struct qla_tgt_func_tmpl {
668*4882a593Smuzhiyun struct qla_tgt_cmd *(*find_cmd_by_tag)(struct fc_port *, uint64_t);
669*4882a593Smuzhiyun int (*handle_cmd)(struct scsi_qla_host *, struct qla_tgt_cmd *,
670*4882a593Smuzhiyun unsigned char *, uint32_t, int, int, int);
671*4882a593Smuzhiyun void (*handle_data)(struct qla_tgt_cmd *);
672*4882a593Smuzhiyun int (*handle_tmr)(struct qla_tgt_mgmt_cmd *, u64, uint16_t,
673*4882a593Smuzhiyun uint32_t);
674*4882a593Smuzhiyun struct qla_tgt_cmd *(*get_cmd)(struct fc_port *);
675*4882a593Smuzhiyun void (*rel_cmd)(struct qla_tgt_cmd *);
676*4882a593Smuzhiyun void (*free_cmd)(struct qla_tgt_cmd *);
677*4882a593Smuzhiyun void (*free_mcmd)(struct qla_tgt_mgmt_cmd *);
678*4882a593Smuzhiyun void (*free_session)(struct fc_port *);
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun int (*check_initiator_node_acl)(struct scsi_qla_host *, unsigned char *,
681*4882a593Smuzhiyun struct fc_port *);
682*4882a593Smuzhiyun void (*update_sess)(struct fc_port *, port_id_t, uint16_t, bool);
683*4882a593Smuzhiyun struct fc_port *(*find_sess_by_loop_id)(struct scsi_qla_host *,
684*4882a593Smuzhiyun const uint16_t);
685*4882a593Smuzhiyun struct fc_port *(*find_sess_by_s_id)(struct scsi_qla_host *,
686*4882a593Smuzhiyun const be_id_t);
687*4882a593Smuzhiyun void (*clear_nacl_from_fcport_map)(struct fc_port *);
688*4882a593Smuzhiyun void (*put_sess)(struct fc_port *);
689*4882a593Smuzhiyun void (*shutdown_sess)(struct fc_port *);
690*4882a593Smuzhiyun int (*get_dif_tags)(struct qla_tgt_cmd *cmd, uint16_t *pfw_prot_opts);
691*4882a593Smuzhiyun int (*chk_dif_tags)(uint32_t tag);
692*4882a593Smuzhiyun void (*add_target)(struct scsi_qla_host *);
693*4882a593Smuzhiyun void (*remove_target)(struct scsi_qla_host *);
694*4882a593Smuzhiyun };
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun int qla2x00_wait_for_hba_online(struct scsi_qla_host *);
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun #include <target/target_core_base.h>
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun #define QLA_TGT_TIMEOUT 10 /* in seconds */
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun #define QLA_TGT_MAX_HW_PENDING_TIME 60 /* in seconds */
703*4882a593Smuzhiyun
704*4882a593Smuzhiyun /* Immediate notify status constants */
705*4882a593Smuzhiyun #define IMM_NTFY_LIP_RESET 0x000E
706*4882a593Smuzhiyun #define IMM_NTFY_LIP_LINK_REINIT 0x000F
707*4882a593Smuzhiyun #define IMM_NTFY_IOCB_OVERFLOW 0x0016
708*4882a593Smuzhiyun #define IMM_NTFY_ABORT_TASK 0x0020
709*4882a593Smuzhiyun #define IMM_NTFY_PORT_LOGOUT 0x0029
710*4882a593Smuzhiyun #define IMM_NTFY_PORT_CONFIG 0x002A
711*4882a593Smuzhiyun #define IMM_NTFY_GLBL_TPRLO 0x002D
712*4882a593Smuzhiyun #define IMM_NTFY_GLBL_LOGO 0x002E
713*4882a593Smuzhiyun #define IMM_NTFY_RESOURCE 0x0034
714*4882a593Smuzhiyun #define IMM_NTFY_MSG_RX 0x0036
715*4882a593Smuzhiyun #define IMM_NTFY_SRR 0x0045
716*4882a593Smuzhiyun #define IMM_NTFY_ELS 0x0046
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun /* Immediate notify task flags */
719*4882a593Smuzhiyun #define IMM_NTFY_TASK_MGMT_SHIFT 8
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun #define QLA_TGT_CLEAR_ACA 0x40
722*4882a593Smuzhiyun #define QLA_TGT_TARGET_RESET 0x20
723*4882a593Smuzhiyun #define QLA_TGT_LUN_RESET 0x10
724*4882a593Smuzhiyun #define QLA_TGT_CLEAR_TS 0x04
725*4882a593Smuzhiyun #define QLA_TGT_ABORT_TS 0x02
726*4882a593Smuzhiyun #define QLA_TGT_ABORT_ALL_SESS 0xFFFF
727*4882a593Smuzhiyun #define QLA_TGT_ABORT_ALL 0xFFFE
728*4882a593Smuzhiyun #define QLA_TGT_NEXUS_LOSS_SESS 0xFFFD
729*4882a593Smuzhiyun #define QLA_TGT_NEXUS_LOSS 0xFFFC
730*4882a593Smuzhiyun #define QLA_TGT_ABTS 0xFFFB
731*4882a593Smuzhiyun #define QLA_TGT_2G_ABORT_TASK 0xFFFA
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun /* Notify Acknowledge flags */
734*4882a593Smuzhiyun #define NOTIFY_ACK_RES_COUNT BIT_8
735*4882a593Smuzhiyun #define NOTIFY_ACK_CLEAR_LIP_RESET BIT_5
736*4882a593Smuzhiyun #define NOTIFY_ACK_TM_RESP_CODE_VALID BIT_4
737*4882a593Smuzhiyun
738*4882a593Smuzhiyun /* Command's states */
739*4882a593Smuzhiyun #define QLA_TGT_STATE_NEW 0 /* New command + target processing */
740*4882a593Smuzhiyun #define QLA_TGT_STATE_NEED_DATA 1 /* target needs data to continue */
741*4882a593Smuzhiyun #define QLA_TGT_STATE_DATA_IN 2 /* Data arrived + target processing */
742*4882a593Smuzhiyun #define QLA_TGT_STATE_PROCESSED 3 /* target done processing */
743*4882a593Smuzhiyun
744*4882a593Smuzhiyun /* ATIO task_codes field */
745*4882a593Smuzhiyun #define ATIO_SIMPLE_QUEUE 0
746*4882a593Smuzhiyun #define ATIO_HEAD_OF_QUEUE 1
747*4882a593Smuzhiyun #define ATIO_ORDERED_QUEUE 2
748*4882a593Smuzhiyun #define ATIO_ACA_QUEUE 4
749*4882a593Smuzhiyun #define ATIO_UNTAGGED 5
750*4882a593Smuzhiyun
751*4882a593Smuzhiyun /* TM failed response codes, see FCP (9.4.11 FCP_RSP_INFO) */
752*4882a593Smuzhiyun #define FC_TM_SUCCESS 0
753*4882a593Smuzhiyun #define FC_TM_BAD_FCP_DATA 1
754*4882a593Smuzhiyun #define FC_TM_BAD_CMD 2
755*4882a593Smuzhiyun #define FC_TM_FCP_DATA_MISMATCH 3
756*4882a593Smuzhiyun #define FC_TM_REJECT 4
757*4882a593Smuzhiyun #define FC_TM_FAILED 5
758*4882a593Smuzhiyun
759*4882a593Smuzhiyun #define QLA_TGT_SENSE_VALID(sense) ((sense != NULL) && \
760*4882a593Smuzhiyun (((const uint8_t *)(sense))[0] & 0x70) == 0x70)
761*4882a593Smuzhiyun
762*4882a593Smuzhiyun struct qla_port_24xx_data {
763*4882a593Smuzhiyun uint8_t port_name[WWN_SIZE];
764*4882a593Smuzhiyun uint16_t loop_id;
765*4882a593Smuzhiyun uint16_t reserved;
766*4882a593Smuzhiyun };
767*4882a593Smuzhiyun
768*4882a593Smuzhiyun struct qla_qpair_hint {
769*4882a593Smuzhiyun struct list_head hint_elem;
770*4882a593Smuzhiyun struct qla_qpair *qpair;
771*4882a593Smuzhiyun u16 cpuid;
772*4882a593Smuzhiyun uint8_t cmd_cnt;
773*4882a593Smuzhiyun };
774*4882a593Smuzhiyun
775*4882a593Smuzhiyun struct qla_tgt {
776*4882a593Smuzhiyun struct scsi_qla_host *vha;
777*4882a593Smuzhiyun struct qla_hw_data *ha;
778*4882a593Smuzhiyun struct btree_head64 lun_qpair_map;
779*4882a593Smuzhiyun struct qla_qpair_hint *qphints;
780*4882a593Smuzhiyun /*
781*4882a593Smuzhiyun * To sync between IRQ handlers and qlt_target_release(). Needed,
782*4882a593Smuzhiyun * because req_pkt() can drop/reaquire HW lock inside. Protected by
783*4882a593Smuzhiyun * HW lock.
784*4882a593Smuzhiyun */
785*4882a593Smuzhiyun int atio_irq_cmd_count;
786*4882a593Smuzhiyun
787*4882a593Smuzhiyun int sg_tablesize;
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun /* Target's flags, serialized by pha->hardware_lock */
790*4882a593Smuzhiyun unsigned int link_reinit_iocb_pending:1;
791*4882a593Smuzhiyun
792*4882a593Smuzhiyun /*
793*4882a593Smuzhiyun * Protected by tgt_mutex AND hardware_lock for writing and tgt_mutex
794*4882a593Smuzhiyun * OR hardware_lock for reading.
795*4882a593Smuzhiyun */
796*4882a593Smuzhiyun int tgt_stop; /* the target mode driver is being stopped */
797*4882a593Smuzhiyun int tgt_stopped; /* the target mode driver has been stopped */
798*4882a593Smuzhiyun
799*4882a593Smuzhiyun /* Count of sessions refering qla_tgt. Protected by hardware_lock. */
800*4882a593Smuzhiyun int sess_count;
801*4882a593Smuzhiyun
802*4882a593Smuzhiyun /* Protected by hardware_lock */
803*4882a593Smuzhiyun struct list_head del_sess_list;
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun spinlock_t sess_work_lock;
806*4882a593Smuzhiyun struct list_head sess_works_list;
807*4882a593Smuzhiyun struct work_struct sess_work;
808*4882a593Smuzhiyun
809*4882a593Smuzhiyun struct imm_ntfy_from_isp link_reinit_iocb;
810*4882a593Smuzhiyun wait_queue_head_t waitQ;
811*4882a593Smuzhiyun int notify_ack_expected;
812*4882a593Smuzhiyun int abts_resp_expected;
813*4882a593Smuzhiyun int modify_lun_expected;
814*4882a593Smuzhiyun atomic_t tgt_global_resets_count;
815*4882a593Smuzhiyun struct list_head tgt_list_entry;
816*4882a593Smuzhiyun };
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun struct qla_tgt_sess_op {
819*4882a593Smuzhiyun struct scsi_qla_host *vha;
820*4882a593Smuzhiyun uint32_t chip_reset;
821*4882a593Smuzhiyun struct atio_from_isp atio;
822*4882a593Smuzhiyun struct work_struct work;
823*4882a593Smuzhiyun struct list_head cmd_list;
824*4882a593Smuzhiyun bool aborted;
825*4882a593Smuzhiyun struct rsp_que *rsp;
826*4882a593Smuzhiyun };
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun enum trace_flags {
829*4882a593Smuzhiyun TRC_NEW_CMD = BIT_0,
830*4882a593Smuzhiyun TRC_DO_WORK = BIT_1,
831*4882a593Smuzhiyun TRC_DO_WORK_ERR = BIT_2,
832*4882a593Smuzhiyun TRC_XFR_RDY = BIT_3,
833*4882a593Smuzhiyun TRC_XMIT_DATA = BIT_4,
834*4882a593Smuzhiyun TRC_XMIT_STATUS = BIT_5,
835*4882a593Smuzhiyun TRC_SRR_RSP = BIT_6,
836*4882a593Smuzhiyun TRC_SRR_XRDY = BIT_7,
837*4882a593Smuzhiyun TRC_SRR_TERM = BIT_8,
838*4882a593Smuzhiyun TRC_SRR_CTIO = BIT_9,
839*4882a593Smuzhiyun TRC_FLUSH = BIT_10,
840*4882a593Smuzhiyun TRC_CTIO_ERR = BIT_11,
841*4882a593Smuzhiyun TRC_CTIO_DONE = BIT_12,
842*4882a593Smuzhiyun TRC_CTIO_ABORTED = BIT_13,
843*4882a593Smuzhiyun TRC_CTIO_STRANGE = BIT_14,
844*4882a593Smuzhiyun TRC_CMD_DONE = BIT_15,
845*4882a593Smuzhiyun TRC_CMD_CHK_STOP = BIT_16,
846*4882a593Smuzhiyun TRC_CMD_FREE = BIT_17,
847*4882a593Smuzhiyun TRC_DATA_IN = BIT_18,
848*4882a593Smuzhiyun TRC_ABORT = BIT_19,
849*4882a593Smuzhiyun TRC_DIF_ERR = BIT_20,
850*4882a593Smuzhiyun };
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun struct qla_tgt_cmd {
853*4882a593Smuzhiyun /*
854*4882a593Smuzhiyun * Do not move cmd_type field. it needs to line up with srb->cmd_type
855*4882a593Smuzhiyun */
856*4882a593Smuzhiyun uint8_t cmd_type;
857*4882a593Smuzhiyun uint8_t pad[7];
858*4882a593Smuzhiyun struct se_cmd se_cmd;
859*4882a593Smuzhiyun struct fc_port *sess;
860*4882a593Smuzhiyun struct qla_qpair *qpair;
861*4882a593Smuzhiyun uint32_t reset_count;
862*4882a593Smuzhiyun int state;
863*4882a593Smuzhiyun struct work_struct work;
864*4882a593Smuzhiyun /* Sense buffer that will be mapped into outgoing status */
865*4882a593Smuzhiyun unsigned char sense_buffer[TRANSPORT_SENSE_BUFFER];
866*4882a593Smuzhiyun
867*4882a593Smuzhiyun spinlock_t cmd_lock;
868*4882a593Smuzhiyun /* to save extra sess dereferences */
869*4882a593Smuzhiyun unsigned int conf_compl_supported:1;
870*4882a593Smuzhiyun unsigned int sg_mapped:1;
871*4882a593Smuzhiyun unsigned int free_sg:1;
872*4882a593Smuzhiyun unsigned int write_data_transferred:1;
873*4882a593Smuzhiyun unsigned int q_full:1;
874*4882a593Smuzhiyun unsigned int term_exchg:1;
875*4882a593Smuzhiyun unsigned int cmd_sent_to_fw:1;
876*4882a593Smuzhiyun unsigned int cmd_in_wq:1;
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun /*
879*4882a593Smuzhiyun * This variable may be set from outside the LIO and I/O completion
880*4882a593Smuzhiyun * callback functions. Do not declare this member variable as a
881*4882a593Smuzhiyun * bitfield to avoid a read-modify-write operation when this variable
882*4882a593Smuzhiyun * is set.
883*4882a593Smuzhiyun */
884*4882a593Smuzhiyun unsigned int aborted;
885*4882a593Smuzhiyun
886*4882a593Smuzhiyun struct scatterlist *sg; /* cmd data buffer SG vector */
887*4882a593Smuzhiyun int sg_cnt; /* SG segments count */
888*4882a593Smuzhiyun int bufflen; /* cmd buffer length */
889*4882a593Smuzhiyun int offset;
890*4882a593Smuzhiyun u64 unpacked_lun;
891*4882a593Smuzhiyun enum dma_data_direction dma_data_direction;
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun uint16_t ctio_flags;
894*4882a593Smuzhiyun uint16_t vp_idx;
895*4882a593Smuzhiyun uint16_t loop_id; /* to save extra sess dereferences */
896*4882a593Smuzhiyun struct qla_tgt *tgt; /* to save extra sess dereferences */
897*4882a593Smuzhiyun struct scsi_qla_host *vha;
898*4882a593Smuzhiyun struct list_head cmd_list;
899*4882a593Smuzhiyun
900*4882a593Smuzhiyun struct atio_from_isp atio;
901*4882a593Smuzhiyun
902*4882a593Smuzhiyun uint8_t ctx_dsd_alloced;
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun /* T10-DIF */
905*4882a593Smuzhiyun #define DIF_ERR_NONE 0
906*4882a593Smuzhiyun #define DIF_ERR_GRD 1
907*4882a593Smuzhiyun #define DIF_ERR_REF 2
908*4882a593Smuzhiyun #define DIF_ERR_APP 3
909*4882a593Smuzhiyun int8_t dif_err_code;
910*4882a593Smuzhiyun struct scatterlist *prot_sg;
911*4882a593Smuzhiyun uint32_t prot_sg_cnt;
912*4882a593Smuzhiyun uint32_t blk_sz, num_blks;
913*4882a593Smuzhiyun uint8_t scsi_status, sense_key, asc, ascq;
914*4882a593Smuzhiyun
915*4882a593Smuzhiyun struct crc_context *ctx;
916*4882a593Smuzhiyun const uint8_t *cdb;
917*4882a593Smuzhiyun uint64_t lba;
918*4882a593Smuzhiyun uint16_t a_guard, e_guard, a_app_tag, e_app_tag;
919*4882a593Smuzhiyun uint32_t a_ref_tag, e_ref_tag;
920*4882a593Smuzhiyun #define DIF_BUNDL_DMA_VALID 1
921*4882a593Smuzhiyun uint16_t prot_flags;
922*4882a593Smuzhiyun
923*4882a593Smuzhiyun uint64_t jiffies_at_alloc;
924*4882a593Smuzhiyun uint64_t jiffies_at_free;
925*4882a593Smuzhiyun
926*4882a593Smuzhiyun enum trace_flags trc_flags;
927*4882a593Smuzhiyun };
928*4882a593Smuzhiyun
929*4882a593Smuzhiyun struct qla_tgt_sess_work_param {
930*4882a593Smuzhiyun struct list_head sess_works_list_entry;
931*4882a593Smuzhiyun
932*4882a593Smuzhiyun #define QLA_TGT_SESS_WORK_ABORT 1
933*4882a593Smuzhiyun #define QLA_TGT_SESS_WORK_TM 2
934*4882a593Smuzhiyun int type;
935*4882a593Smuzhiyun
936*4882a593Smuzhiyun union {
937*4882a593Smuzhiyun struct abts_recv_from_24xx abts;
938*4882a593Smuzhiyun struct imm_ntfy_from_isp tm_iocb;
939*4882a593Smuzhiyun struct atio_from_isp tm_iocb2;
940*4882a593Smuzhiyun };
941*4882a593Smuzhiyun };
942*4882a593Smuzhiyun
943*4882a593Smuzhiyun struct qla_tgt_mgmt_cmd {
944*4882a593Smuzhiyun uint8_t cmd_type;
945*4882a593Smuzhiyun uint8_t pad[3];
946*4882a593Smuzhiyun uint16_t tmr_func;
947*4882a593Smuzhiyun uint8_t fc_tm_rsp;
948*4882a593Smuzhiyun uint8_t abort_io_attr;
949*4882a593Smuzhiyun struct fc_port *sess;
950*4882a593Smuzhiyun struct qla_qpair *qpair;
951*4882a593Smuzhiyun struct scsi_qla_host *vha;
952*4882a593Smuzhiyun struct se_cmd se_cmd;
953*4882a593Smuzhiyun struct work_struct free_work;
954*4882a593Smuzhiyun unsigned int flags;
955*4882a593Smuzhiyun #define QLA24XX_MGMT_SEND_NACK BIT_0
956*4882a593Smuzhiyun #define QLA24XX_MGMT_ABORT_IO_ATTR_VALID BIT_1
957*4882a593Smuzhiyun uint32_t reset_count;
958*4882a593Smuzhiyun struct work_struct work;
959*4882a593Smuzhiyun uint64_t unpacked_lun;
960*4882a593Smuzhiyun union {
961*4882a593Smuzhiyun struct atio_from_isp atio;
962*4882a593Smuzhiyun struct imm_ntfy_from_isp imm_ntfy;
963*4882a593Smuzhiyun struct abts_recv_from_24xx abts;
964*4882a593Smuzhiyun } __packed orig_iocb;
965*4882a593Smuzhiyun };
966*4882a593Smuzhiyun
967*4882a593Smuzhiyun struct qla_tgt_prm {
968*4882a593Smuzhiyun struct qla_tgt_cmd *cmd;
969*4882a593Smuzhiyun struct qla_tgt *tgt;
970*4882a593Smuzhiyun void *pkt;
971*4882a593Smuzhiyun struct scatterlist *sg; /* cmd data buffer SG vector */
972*4882a593Smuzhiyun unsigned char *sense_buffer;
973*4882a593Smuzhiyun int seg_cnt;
974*4882a593Smuzhiyun int req_cnt;
975*4882a593Smuzhiyun uint16_t rq_result;
976*4882a593Smuzhiyun int sense_buffer_len;
977*4882a593Smuzhiyun int residual;
978*4882a593Smuzhiyun int add_status_pkt;
979*4882a593Smuzhiyun /* dif */
980*4882a593Smuzhiyun struct scatterlist *prot_sg;
981*4882a593Smuzhiyun uint16_t prot_seg_cnt;
982*4882a593Smuzhiyun uint16_t tot_dsds;
983*4882a593Smuzhiyun };
984*4882a593Smuzhiyun
985*4882a593Smuzhiyun /* Check for Switch reserved address */
986*4882a593Smuzhiyun #define IS_SW_RESV_ADDR(_s_id) \
987*4882a593Smuzhiyun ((_s_id.b.domain == 0xff) && ((_s_id.b.area & 0xf0) == 0xf0))
988*4882a593Smuzhiyun
989*4882a593Smuzhiyun #define QLA_TGT_XMIT_DATA 1
990*4882a593Smuzhiyun #define QLA_TGT_XMIT_STATUS 2
991*4882a593Smuzhiyun #define QLA_TGT_XMIT_ALL (QLA_TGT_XMIT_STATUS|QLA_TGT_XMIT_DATA)
992*4882a593Smuzhiyun
993*4882a593Smuzhiyun
994*4882a593Smuzhiyun extern struct qla_tgt_data qla_target;
995*4882a593Smuzhiyun
996*4882a593Smuzhiyun /*
997*4882a593Smuzhiyun * Function prototypes for qla_target.c logic used by qla2xxx LLD code.
998*4882a593Smuzhiyun */
999*4882a593Smuzhiyun extern int qlt_add_target(struct qla_hw_data *, struct scsi_qla_host *);
1000*4882a593Smuzhiyun extern int qlt_remove_target(struct qla_hw_data *, struct scsi_qla_host *);
1001*4882a593Smuzhiyun extern int qlt_lport_register(void *, u64, u64, u64,
1002*4882a593Smuzhiyun int (*callback)(struct scsi_qla_host *, void *, u64, u64));
1003*4882a593Smuzhiyun extern void qlt_lport_deregister(struct scsi_qla_host *);
1004*4882a593Smuzhiyun extern void qlt_unreg_sess(struct fc_port *);
1005*4882a593Smuzhiyun extern void qlt_fc_port_added(struct scsi_qla_host *, fc_port_t *);
1006*4882a593Smuzhiyun extern void qlt_fc_port_deleted(struct scsi_qla_host *, fc_port_t *, int);
1007*4882a593Smuzhiyun extern int __init qlt_init(void);
1008*4882a593Smuzhiyun extern void qlt_exit(void);
1009*4882a593Smuzhiyun extern void qlt_update_vp_map(struct scsi_qla_host *, int);
1010*4882a593Smuzhiyun extern void qlt_free_session_done(struct work_struct *);
1011*4882a593Smuzhiyun /*
1012*4882a593Smuzhiyun * This macro is used during early initializations when host->active_mode
1013*4882a593Smuzhiyun * is not set. Right now, ha value is ignored.
1014*4882a593Smuzhiyun */
1015*4882a593Smuzhiyun #define QLA_TGT_MODE_ENABLED() (ql2x_ini_mode != QLA2XXX_INI_MODE_ENABLED)
1016*4882a593Smuzhiyun
1017*4882a593Smuzhiyun extern int ql2x_ini_mode;
1018*4882a593Smuzhiyun
qla_tgt_mode_enabled(struct scsi_qla_host * ha)1019*4882a593Smuzhiyun static inline bool qla_tgt_mode_enabled(struct scsi_qla_host *ha)
1020*4882a593Smuzhiyun {
1021*4882a593Smuzhiyun return ha->host->active_mode == MODE_TARGET;
1022*4882a593Smuzhiyun }
1023*4882a593Smuzhiyun
qla_ini_mode_enabled(struct scsi_qla_host * ha)1024*4882a593Smuzhiyun static inline bool qla_ini_mode_enabled(struct scsi_qla_host *ha)
1025*4882a593Smuzhiyun {
1026*4882a593Smuzhiyun return ha->host->active_mode == MODE_INITIATOR;
1027*4882a593Smuzhiyun }
1028*4882a593Smuzhiyun
qla_dual_mode_enabled(struct scsi_qla_host * ha)1029*4882a593Smuzhiyun static inline bool qla_dual_mode_enabled(struct scsi_qla_host *ha)
1030*4882a593Smuzhiyun {
1031*4882a593Smuzhiyun return (ha->host->active_mode == MODE_DUAL);
1032*4882a593Smuzhiyun }
1033*4882a593Smuzhiyun
sid_to_key(const be_id_t s_id)1034*4882a593Smuzhiyun static inline uint32_t sid_to_key(const be_id_t s_id)
1035*4882a593Smuzhiyun {
1036*4882a593Smuzhiyun return s_id.domain << 16 |
1037*4882a593Smuzhiyun s_id.area << 8 |
1038*4882a593Smuzhiyun s_id.al_pa;
1039*4882a593Smuzhiyun }
1040*4882a593Smuzhiyun
1041*4882a593Smuzhiyun /*
1042*4882a593Smuzhiyun * Exported symbols from qla_target.c LLD logic used by qla2xxx code..
1043*4882a593Smuzhiyun */
1044*4882a593Smuzhiyun extern void qlt_response_pkt_all_vps(struct scsi_qla_host *, struct rsp_que *,
1045*4882a593Smuzhiyun response_t *);
1046*4882a593Smuzhiyun extern int qlt_rdy_to_xfer(struct qla_tgt_cmd *);
1047*4882a593Smuzhiyun extern int qlt_xmit_response(struct qla_tgt_cmd *, int, uint8_t);
1048*4882a593Smuzhiyun extern int qlt_abort_cmd(struct qla_tgt_cmd *);
1049*4882a593Smuzhiyun extern void qlt_xmit_tm_rsp(struct qla_tgt_mgmt_cmd *);
1050*4882a593Smuzhiyun extern void qlt_free_mcmd(struct qla_tgt_mgmt_cmd *);
1051*4882a593Smuzhiyun extern void qlt_free_cmd(struct qla_tgt_cmd *cmd);
1052*4882a593Smuzhiyun extern void qlt_async_event(uint16_t, struct scsi_qla_host *, uint16_t *);
1053*4882a593Smuzhiyun extern void qlt_enable_vha(struct scsi_qla_host *);
1054*4882a593Smuzhiyun extern void qlt_vport_create(struct scsi_qla_host *, struct qla_hw_data *);
1055*4882a593Smuzhiyun extern u8 qlt_rff_id(struct scsi_qla_host *);
1056*4882a593Smuzhiyun extern void qlt_init_atio_q_entries(struct scsi_qla_host *);
1057*4882a593Smuzhiyun extern void qlt_24xx_process_atio_queue(struct scsi_qla_host *, uint8_t);
1058*4882a593Smuzhiyun extern void qlt_24xx_config_rings(struct scsi_qla_host *);
1059*4882a593Smuzhiyun extern void qlt_24xx_config_nvram_stage1(struct scsi_qla_host *,
1060*4882a593Smuzhiyun struct nvram_24xx *);
1061*4882a593Smuzhiyun extern void qlt_24xx_config_nvram_stage2(struct scsi_qla_host *,
1062*4882a593Smuzhiyun struct init_cb_24xx *);
1063*4882a593Smuzhiyun extern void qlt_81xx_config_nvram_stage2(struct scsi_qla_host *,
1064*4882a593Smuzhiyun struct init_cb_81xx *);
1065*4882a593Smuzhiyun extern void qlt_81xx_config_nvram_stage1(struct scsi_qla_host *,
1066*4882a593Smuzhiyun struct nvram_81xx *);
1067*4882a593Smuzhiyun extern int qlt_24xx_process_response_error(struct scsi_qla_host *,
1068*4882a593Smuzhiyun struct sts_entry_24xx *);
1069*4882a593Smuzhiyun extern void qlt_modify_vp_config(struct scsi_qla_host *,
1070*4882a593Smuzhiyun struct vp_config_entry_24xx *);
1071*4882a593Smuzhiyun extern void qlt_probe_one_stage1(struct scsi_qla_host *, struct qla_hw_data *);
1072*4882a593Smuzhiyun extern int qlt_mem_alloc(struct qla_hw_data *);
1073*4882a593Smuzhiyun extern void qlt_mem_free(struct qla_hw_data *);
1074*4882a593Smuzhiyun extern int qlt_stop_phase1(struct qla_tgt *);
1075*4882a593Smuzhiyun extern void qlt_stop_phase2(struct qla_tgt *);
1076*4882a593Smuzhiyun extern irqreturn_t qla83xx_msix_atio_q(int, void *);
1077*4882a593Smuzhiyun extern void qlt_83xx_iospace_config(struct qla_hw_data *);
1078*4882a593Smuzhiyun extern int qlt_free_qfull_cmds(struct qla_qpair *);
1079*4882a593Smuzhiyun extern void qlt_logo_completion_handler(fc_port_t *, int);
1080*4882a593Smuzhiyun extern void qlt_do_generation_tick(struct scsi_qla_host *, int *);
1081*4882a593Smuzhiyun
1082*4882a593Smuzhiyun void qlt_send_resp_ctio(struct qla_qpair *, struct qla_tgt_cmd *, uint8_t,
1083*4882a593Smuzhiyun uint8_t, uint8_t, uint8_t);
1084*4882a593Smuzhiyun
1085*4882a593Smuzhiyun #endif /* __QLA_TARGET_H */
1086