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/rk3399_ARM-atf/plat/intel/soc/common/include/
H A Dsocfpga_f2sdram_manager.h11f4f03043ef05762f4d6337804c39dc8f9af54f Thu May 05 09:07:21 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge

This adds F2S and S2F bridge enable, disable and reset
sequence to enable, disable and reset properly the bridges
in SMC call or during reset.

The reset is also maskable as the SMC from uboot can
pass in the bridge mask when requesting for bridge
enable or disable.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ie144518c591664ef880016c9b3706968411bbf21
H A Dsocfpga_reset_manager.h11f4f03043ef05762f4d6337804c39dc8f9af54f Thu May 05 09:07:21 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge

This adds F2S and S2F bridge enable, disable and reset
sequence to enable, disable and reset properly the bridges
in SMC call or during reset.

The reset is also maskable as the SMC from uboot can
pass in the bridge mask when requesting for bridge
enable or disable.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ie144518c591664ef880016c9b3706968411bbf21
H A Dsocfpga_system_manager.h11f4f03043ef05762f4d6337804c39dc8f9af54f Thu May 05 09:07:21 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge

This adds F2S and S2F bridge enable, disable and reset
sequence to enable, disable and reset properly the bridges
in SMC call or during reset.

The reset is also maskable as the SMC from uboot can
pass in the bridge mask when requesting for bridge
enable or disable.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ie144518c591664ef880016c9b3706968411bbf21
H A Dsocfpga_sip_svc.h11f4f03043ef05762f4d6337804c39dc8f9af54f Thu May 05 09:07:21 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge

This adds F2S and S2F bridge enable, disable and reset
sequence to enable, disable and reset properly the bridges
in SMC call or during reset.

The reset is also maskable as the SMC from uboot can
pass in the bridge mask when requesting for bridge
enable or disable.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ie144518c591664ef880016c9b3706968411bbf21
/rk3399_ARM-atf/plat/intel/soc/n5x/include/
H A Dsocfpga_plat_def.h11f4f03043ef05762f4d6337804c39dc8f9af54f Thu May 05 09:07:21 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge

This adds F2S and S2F bridge enable, disable and reset
sequence to enable, disable and reset properly the bridges
in SMC call or during reset.

The reset is also maskable as the SMC from uboot can
pass in the bridge mask when requesting for bridge
enable or disable.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ie144518c591664ef880016c9b3706968411bbf21
/rk3399_ARM-atf/plat/intel/soc/agilex/
H A Dbl2_plat_setup.c11f4f03043ef05762f4d6337804c39dc8f9af54f Thu May 05 09:07:21 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge

This adds F2S and S2F bridge enable, disable and reset
sequence to enable, disable and reset properly the bridges
in SMC call or during reset.

The reset is also maskable as the SMC from uboot can
pass in the bridge mask when requesting for bridge
enable or disable.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ie144518c591664ef880016c9b3706968411bbf21
/rk3399_ARM-atf/plat/intel/soc/common/soc/
H A Dsocfpga_reset_manager.c11f4f03043ef05762f4d6337804c39dc8f9af54f Thu May 05 09:07:21 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge

This adds F2S and S2F bridge enable, disable and reset
sequence to enable, disable and reset properly the bridges
in SMC call or during reset.

The reset is also maskable as the SMC from uboot can
pass in the bridge mask when requesting for bridge
enable or disable.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ie144518c591664ef880016c9b3706968411bbf21
/rk3399_ARM-atf/plat/intel/soc/stratix10/
H A Dbl2_plat_setup.c11f4f03043ef05762f4d6337804c39dc8f9af54f Thu May 05 09:07:21 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge

This adds F2S and S2F bridge enable, disable and reset
sequence to enable, disable and reset properly the bridges
in SMC call or during reset.

The reset is also maskable as the SMC from uboot can
pass in the bridge mask when requesting for bridge
enable or disable.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ie144518c591664ef880016c9b3706968411bbf21
/rk3399_ARM-atf/plat/intel/soc/stratix10/include/
H A Dsocfpga_plat_def.h11f4f03043ef05762f4d6337804c39dc8f9af54f Thu May 05 09:07:21 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge

This adds F2S and S2F bridge enable, disable and reset
sequence to enable, disable and reset properly the bridges
in SMC call or during reset.

The reset is also maskable as the SMC from uboot can
pass in the bridge mask when requesting for bridge
enable or disable.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ie144518c591664ef880016c9b3706968411bbf21
/rk3399_ARM-atf/plat/intel/soc/agilex/include/
H A Dsocfpga_plat_def.h11f4f03043ef05762f4d6337804c39dc8f9af54f Thu May 05 09:07:21 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge

This adds F2S and S2F bridge enable, disable and reset
sequence to enable, disable and reset properly the bridges
in SMC call or during reset.

The reset is also maskable as the SMC from uboot can
pass in the bridge mask when requesting for bridge
enable or disable.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ie144518c591664ef880016c9b3706968411bbf21
/rk3399_ARM-atf/plat/intel/soc/common/
H A Dsocfpga_sip_svc.c11f4f03043ef05762f4d6337804c39dc8f9af54f Thu May 05 09:07:21 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge

This adds F2S and S2F bridge enable, disable and reset
sequence to enable, disable and reset properly the bridges
in SMC call or during reset.

The reset is also maskable as the SMC from uboot can
pass in the bridge mask when requesting for bridge
enable or disable.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ie144518c591664ef880016c9b3706968411bbf21