| /rk3399_rockchip-uboot/arch/arm/mach-tegra/ |
| H A D | Kconfig | 1 if TEGRA
16 bool "Tegra IVC protocol"
18 IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
24 bool "Tegra common options"
45 bool "Tegra common options for SoCs without BPMP"
51 bool "Tegra 32-bit common options"
61 bool "Tegra 64-bit common options"
66 prompt "Tegra SoC select"
116 tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
127 source "arch/arm/mach-tegra/tegra20/Kconfig"
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| H A D | emc.c | 13 #include <asm/arch/tegra.h>
14 #include <asm/arch-tegra/ap.h>
15 #include <asm/arch-tegra/clk_rst.h>
16 #include <asm/arch-tegra/sys_proto.h>
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| H A D | ap.c | 8 /* Tegra AP (Application Processor) code */
15 #include <asm/arch-tegra/ap.h>
16 #include <asm/arch-tegra/clock.h>
17 #include <asm/arch-tegra/fuse.h>
18 #include <asm/arch-tegra/pmc.h>
19 #include <asm/arch-tegra/scu.h>
20 #include <asm/arch-tegra/tegra.h>
21 #include <asm/arch-tegra/warmboot.h>
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| H A D | board2.c | 14 #include <asm/arch-tegra/ap.h>
15 #include <asm/arch-tegra/board.h>
16 #include <asm/arch-tegra/clk_rst.h>
17 #include <asm/arch-tegra/pmc.h>
18 #include <asm/arch-tegra/sys_proto.h>
19 #include <asm/arch-tegra/uart.h>
20 #include <asm/arch-tegra/warmboot.h>
21 #include <asm/arch-tegra/gpu.h>
22 #include <asm/arch-tegra/usb.h>
23 #include <asm/arch-tegra/xusb-padctl.h>
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| H A D | spl.c | 16 #include <asm/arch/tegra.h>
17 #include <asm/arch-tegra/apb_misc.h>
18 #include <asm/arch-tegra/board.h>
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| H A D | cmd_enterrcm.c | 29 #include <asm/arch/tegra.h>
30 #include <asm/arch-tegra/pmc.h>
49 "reset Tegra and enter USB Recovery Mode",
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| H A D | board.c | 16 #include <asm/arch/tegra.h>
17 #include <asm/arch-tegra/ap.h>
18 #include <asm/arch-tegra/board.h>
19 #include <asm/arch-tegra/pmc.h>
20 #include <asm/arch-tegra/sys_proto.h>
21 #include <asm/arch-tegra/warmboot.h>
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| /rk3399_rockchip-uboot/drivers/clk/tegra/ |
| H A D | Kconfig | 2 bool "Enable Tegra CAR-based clock driver"
5 Enable support for manipulating Tegra's on-SoC clocks via direct
6 register access to the Tegra CAR (Clock And Reset controller).
12 Enable support for manipulating Tegra's on-SoC clocks via IPC
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| /rk3399_rockchip-uboot/board/avionic-design/common/ |
| H A D | tamonten.c | 17 #include <asm/arch/tegra.h>
18 #include <asm/arch-tegra/board.h>
19 #include <asm/arch-tegra/clk_rst.h>
20 #include <asm/arch-tegra/sys_proto.h>
21 #include <asm/arch-tegra/uart.h>
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| /rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra20/ |
| H A D | display.c | 11 #include <asm/arch/tegra.h>
13 #include <asm/arch-tegra/dc.h>
14 #include <asm/arch-tegra/clk_rst.h>
15 #include <asm/arch-tegra/timer.h>
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| H A D | pmu.c | 12 #include <asm/arch/tegra.h>
13 #include <asm/arch-tegra/ap.h>
14 #include <asm/arch-tegra/tegra_i2c.h>
15 #include <asm/arch-tegra/sys_proto.h>
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| H A D | warmboot_avp.c | 13 #include <asm/arch/tegra.h>
14 #include <asm/arch-tegra/ap.h>
15 #include <asm/arch-tegra/apb_misc.h>
16 #include <asm/arch-tegra/clk_rst.h>
17 #include <asm/arch-tegra/pmc.h>
18 #include <asm/arch-tegra/warmboot.h>
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| /rk3399_rockchip-uboot/drivers/mailbox/ |
| H A D | Kconfig | 21 bool "Enable Tegra HSP controller support"
22 depends on DM_MAILBOX && TEGRA
24 This enables support for the NVIDIA Tegra HSP Hw module, which
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/gpu/ |
| H A D | nvidia,tegra20-host1x.txt | 1 NVIDIA Tegra host1x
4 - compatible: "nvidia,tegra<chip>-host1x"
25 - compatible: "nvidia,tegra<chip>-mpe"
38 - compatible: "nvidia,tegra<chip>-vi"
51 - compatible: "nvidia,tegra<chip>-epp"
64 - compatible: "nvidia,tegra<chip>-isp"
77 - compatible: "nvidia,tegra<chip>-gr2d"
90 - compatible: "nvidia,tegra<chip>-gr3d"
108 - compatible: "nvidia,tegra<chip>-dc"
136 - compatible: "nvidia,tegra<chip>-hdmi"
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| /rk3399_rockchip-uboot/board/toradex/colibri_t20/ |
| H A D | colibri_t20.c | 11 #include <asm/arch-tegra/ap.h>
12 #include <asm/arch-tegra/board.h>
13 #include <asm/arch-tegra/tegra.h>
133 /* USBH_PEN: USB 1 aka Tegra USB port 3 VBus */ in pin_mux_usb()
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| /rk3399_rockchip-uboot/drivers/reset/ |
| H A D | Kconfig | 44 bool "Enable Tegra CAR-based reset driver"
47 Enable support for manipulating Tegra's on-SoC reset signals via
48 direct register access to the Tegra CAR (Clock And Reset controller).
54 Enable support for manipulating Tegra's on-SoC reset signals via IPC
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| /rk3399_rockchip-uboot/board/toradex/colibri_t30/ |
| H A D | colibri_t30.c | 11 #include <asm/arch-tegra/ap.h>
12 #include <asm/arch-tegra/tegra.h>
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra124/ |
| H A D | pwm.h | 2 * Tegra pulse width frequency modulator definitions
12 #include <asm/arch-tegra/pwm.h>
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra20/ |
| H A D | pwm.h | 2 * Tegra pulse width frequency modulator definitions
12 #include <asm/arch-tegra/pwm.h>
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| H A D | tegra.h | 14 #include <asm/arch-tegra/tegra.h>
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra186/ |
| H A D | tegra.h | 14 #include <asm/arch-tegra/tegra.h>
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra30/ |
| H A D | tegra.h | 13 #include <asm/arch-tegra/tegra.h>
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/pwm/ |
| H A D | tegra20-pwm.txt | 1 Tegra SoC PWFM controller
8 - #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra114/ |
| H A D | tegra.h | 14 #include <asm/arch-tegra/tegra.h>
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| /rk3399_rockchip-uboot/drivers/pci/ |
| H A D | Kconfig | 57 bool "Tegra PCI support"
58 depends on TEGRA
62 Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has
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