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3cdb50e6 |
| 09-Sep-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
UPSTREAM: reset: add reset controller driver for SCMI agents
This change introduces a reset controller driver for SCMI agent devices. When SCMI agent and SCMI reset domain drivers are enabled, SCMI
UPSTREAM: reset: add reset controller driver for SCMI agents
This change introduces a reset controller driver for SCMI agent devices. When SCMI agent and SCMI reset domain drivers are enabled, SCMI agent binds a reset controller device for each SCMI reset domain protocol devices enabled in the FDT.
SCMI reset driver is embedded upon CONFIG_RESET_SCMI=y. If enabled, CONFIG_SCMI_AGENT is also enabled.
SCMI Reset Domain protocol is defined in the SCMI specification [1].
Links: [1] https://developer.arm.com/architectures/system-architectures/software-standards/scmi Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Cc: Simon Glass <sjg@chromium.org> Cc: Peng Fan <peng.fan@nxp.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Conflicts: drivers/reset/Kconfig drivers/reset/Makefile
(cherry picked from commit 34d76fefb2667d0ca138ff4fcf8bc8443032449f) Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: I8c6dd9bb49e58cd9df9a67c1cd101d8da27f3691
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8fce363f |
| 27-Jul-2020 |
Joseph Chen <chenjh@rock-chips.com> |
dm: reset: add reset support for SPL
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: I8210b7f656b99bf7cbf4a6708696ebbf91aa7685
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5754b8c9 |
| 10-Oct-2017 |
Elaine Zhang <zhangqing@rock-chips.com> |
drivers/reset: support rockchip reset drivers
Create driver to support all Rockchip SoCs soft reset. Example of usage: i2c driver: ret = reset_get_by_name(dev, "i2c", &reset_ctl); if (ret) { err
drivers/reset: support rockchip reset drivers
Create driver to support all Rockchip SoCs soft reset. Example of usage: i2c driver: ret = reset_get_by_name(dev, "i2c", &reset_ctl); if (ret) { error("reset_get_by_name() failed: %d\n", ret); }
reset_assert(&reset_ctl); udelay(50); reset_deassert(&reset_ctl);
i2c dts node: resets = <&cru SRST_P_I2C1>, <&cru SRST_I2C1>; reset-names = "p_i2c", "i2c";
Change-Id: I7db97619e33447d6130e349e90799cd398e29d72 Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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102d8655 |
| 10-May-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mips
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18393f70 |
| 03-May-2017 |
Álvaro Fernández Rojas <noltari@gmail.com> |
dm: reset: add BCM6345 reset driver
This is a simplified version of linux/arch/mips/bcm63xx/reset.c
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.
dm: reset: add BCM6345 reset driver
This is a simplified version of linux/arch/mips/bcm63xx/reset.c
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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4f66e09b |
| 09-May-2017 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
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858d4976 |
| 17-Apr-2017 |
maxims@google.com <maxims@google.com> |
aspeed: Reset Driver
Add Reset Driver for ast2500 SoC. This driver uses Watchdog Timer to perform resets and thus depends on it. The actual Watchdog device used needs to be configured in Device Tree
aspeed: Reset Driver
Add Reset Driver for ast2500 SoC. This driver uses Watchdog Timer to perform resets and thus depends on it. The actual Watchdog device used needs to be configured in Device Tree using "aspeed,wdt" property, which must be WDT phandle, for example:
rst: reset-controller { compatible = "aspeed,ast2500-reset"; aspeed,wdt = <&wdt1>; }
Signed-off-by: Maxim Sloyko <maxims@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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| #
7d67bb1d |
| 04-Apr-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
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| #
584861ff |
| 22-Mar-2017 |
Patrice Chotard <patrice.chotard@st.com> |
reset: Add STi reset support
This patch adds a reset controller implementation for STMicroelectronics STi family SoCs; it allows a group of related reset like controls found in multiple system confi
reset: Add STi reset support
This patch adds a reset controller implementation for STMicroelectronics STi family SoCs; it allows a group of related reset like controls found in multiple system configuration registers to be represented by a single controller device.
Driver code has been mainly extracted from kernel drivers/reset/sti/reset-stih407.c
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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3c594d34 |
| 12-Oct-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
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4fb96c48 |
| 08-Oct-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
reset: uniphier: add reset controller driver for UniPhier SoCs
This is the initial commit for UniPhier reset controller driver. Most code was ported from Linux.
Signed-off-by: Masahiro Yamada <yama
reset: uniphier: add reset controller driver for UniPhier SoCs
This is the initial commit for UniPhier reset controller driver. Most code was ported from Linux.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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40e1236a |
| 27-Sep-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-tegra
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fe60f06d |
| 13-Sep-2016 |
Stephen Warren <swarren@nvidia.com> |
reset: implement a driver for the Tegra CAR
Implement a reset uclass driver for the Tegra CAR. This allows clients to use standard reset APIs on Tegra. This device is intended to be instantiated by
reset: implement a driver for the Tegra CAR
Implement a reset uclass driver for the Tegra CAR. This allows clients to use standard reset APIs on Tegra. This device is intended to be instantiated by the core Tegra CAR driver, rather than being instantiated directly from DT. The implementation uses the existing custom Tegra- specific reset APIs to avoid coupling the series with significant refactoring of the existing Tegra clock/reset code.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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4dd99d14 |
| 08-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
reset: add Tegra186 reset driver
In Tegra186, on-SoC reset signals are manipulated using IPC requests to the BPMP (Boot and Power Management Processor). This change implements a driver that does tha
reset: add Tegra186 reset driver
In Tegra186, on-SoC reset signals are manipulated using IPC requests to the BPMP (Boot and Power Management Processor). This change implements a driver that does that. It is unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186 build of U-Boot will need the feature.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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09849f4a |
| 20-Jun-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
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4581b717 |
| 17-Jun-2016 |
Stephen Warren <swarren@nvidia.com> |
reset: implement a reset test
This adds a sandbox reset implementation (provider), a test client device, instantiates them both from Sandbox's DT, and adds a DM test that excercises everything.
Sig
reset: implement a reset test
This adds a sandbox reset implementation (provider), a test client device, instantiates them both from Sandbox's DT, and adds a DM test that excercises everything.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
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89c1e2da |
| 17-Jun-2016 |
Stephen Warren <swarren@nvidia.com> |
Add a reset driver framework/uclass
A reset controller is a hardware module that controls reset signals that affect other hardware modules or chips.
This patch defines a standard API that connects
Add a reset driver framework/uclass
A reset controller is a hardware module that controls reset signals that affect other hardware modules or chips.
This patch defines a standard API that connects reset clients (i.e. the drivers for devices affected by reset signals) to drivers for reset controllers/providers. Initially, DT is the only supported method for connecting the two.
The DT binding specification (reset.txt) was taken from Linux kernel v4.5's Documentation/devicetree/bindings/reset/reset.txt.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
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