1dc89ad14STom Warren /* 2dc89ad14STom Warren * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. 3dc89ad14STom Warren * 4*5b8031ccSTom Rini * SPDX-License-Identifier: GPL-2.0 5dc89ad14STom Warren */ 6dc89ad14STom Warren 7dc89ad14STom Warren #ifndef _TEGRA30_H_ 8dc89ad14STom Warren #define _TEGRA30_H_ 9dc89ad14STom Warren 108c33ba7bSMarcel Ziswiler #define NV_PA_MC_BASE 0x7000F000 11dc89ad14STom Warren #define NV_PA_SDRAM_BASE 0x80000000 /* 0x80000000 for real T30 */ 12dc89ad14STom Warren 13dc89ad14STom Warren #include <asm/arch-tegra/tegra.h> 14dc89ad14STom Warren 157ae18f37SLucas Stach #define TEGRA_USB1_BASE 0x7D000000 167ae18f37SLucas Stach 17dc89ad14STom Warren #define BCT_ODMDATA_OFFSET 6116 /* 12 bytes from end of BCT */ 18dc89ad14STom Warren 19f29f086aSTom Warren #define MAX_NUM_CPU 4 20f29f086aSTom Warren 21dc89ad14STom Warren #endif /* TEGRA30_H */ 22