xref: /rk3399_rockchip-uboot/board/avionic-design/common/tamonten.c (revision 1d2c0506d31a9997e5ffc22e90942902f673b107)
1b1c0c736SThierry Reding /*
2b1c0c736SThierry Reding  *  (C) Copyright 2010,2011
3b1c0c736SThierry Reding  *  NVIDIA Corporation <www.nvidia.com>
4ed900c55SThierry Reding  *  (C) Copyright 2011-2012
5b1c0c736SThierry Reding  *  Avionic Design GmbH <www.avionic-design.de>
6b1c0c736SThierry Reding  *
71a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
8b1c0c736SThierry Reding  */
9b1c0c736SThierry Reding 
10b1c0c736SThierry Reding #include <common.h>
11b1c0c736SThierry Reding #include <ns16550.h>
12b1c0c736SThierry Reding #include <asm/io.h>
13b1c0c736SThierry Reding #include <asm/gpio.h>
14b1c0c736SThierry Reding #include <asm/arch/clock.h>
15f4483021SSimon Glass #include <asm/arch/funcmux.h>
16b1c0c736SThierry Reding #include <asm/arch/pinmux.h>
17150c2493STom Warren #include <asm/arch/tegra.h>
18150c2493STom Warren #include <asm/arch-tegra/board.h>
19150c2493STom Warren #include <asm/arch-tegra/clk_rst.h>
20150c2493STom Warren #include <asm/arch-tegra/sys_proto.h>
21150c2493STom Warren #include <asm/arch-tegra/uart.h>
22b1c0c736SThierry Reding 
2322d58506SThierry Reding #ifdef CONFIG_BOARD_EARLY_INIT_F
gpio_early_init(void)2422d58506SThierry Reding void gpio_early_init(void)
2522d58506SThierry Reding {
2601a97a11SStephen Warren 	gpio_request(TEGRA_GPIO(I, 4), NULL);
2701a97a11SStephen Warren 	gpio_direction_output(TEGRA_GPIO(I, 4), 1);
2822d58506SThierry Reding }
2922d58506SThierry Reding #endif
3022d58506SThierry Reding 
31*1d2c0506SMasahiro Yamada #ifdef CONFIG_MMC_SDHCI_TEGRA
32b1c0c736SThierry Reding /*
33b1c0c736SThierry Reding  * Routine: pin_mux_mmc
34b1c0c736SThierry Reding  * Description: setup the pin muxes/tristate values for the SDMMC(s)
35b1c0c736SThierry Reding  */
pin_mux_mmc(void)36c9aa831eSTom Warren void pin_mux_mmc(void)
37b1c0c736SThierry Reding {
38f4483021SSimon Glass 	funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
3979254543SThierry Reding 	/* for write-protect GPIO PI6 */
4070ad375eSStephen Warren 	pinmux_tristate_disable(PMUX_PINGRP_ATA);
41ed900c55SThierry Reding 	/* for CD GPIO PH2 */
4270ad375eSStephen Warren 	pinmux_tristate_disable(PMUX_PINGRP_ATD);
43b1c0c736SThierry Reding }
44b1c0c736SThierry Reding #endif
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