xref: /rk3399_rockchip-uboot/arch/arm/mach-tegra/spl.c (revision 9b6b3c1b50bac5a1fe8870c2c19d62c118a79147)
109f455dcSMasahiro Yamada /*
209f455dcSMasahiro Yamada  * (C) Copyright 2012
309f455dcSMasahiro Yamada  * NVIDIA Inc, <www.nvidia.com>
409f455dcSMasahiro Yamada  *
509f455dcSMasahiro Yamada  * Allen Martin <amartin@nvidia.com>
609f455dcSMasahiro Yamada  *
709f455dcSMasahiro Yamada  * SPDX-License-Identifier:	GPL-2.0+
809f455dcSMasahiro Yamada  */
909f455dcSMasahiro Yamada #include <common.h>
10*9b6b3c1bSSimon Glass #include <debug_uart.h>
1109f455dcSMasahiro Yamada #include <spl.h>
1209f455dcSMasahiro Yamada 
1309f455dcSMasahiro Yamada #include <asm/io.h>
1409f455dcSMasahiro Yamada #include <asm/arch/clock.h>
1509f455dcSMasahiro Yamada #include <asm/arch/pinmux.h>
1609f455dcSMasahiro Yamada #include <asm/arch/tegra.h>
1709f455dcSMasahiro Yamada #include <asm/arch-tegra/apb_misc.h>
1809f455dcSMasahiro Yamada #include <asm/arch-tegra/board.h>
1909f455dcSMasahiro Yamada #include <asm/spl.h>
2009f455dcSMasahiro Yamada #include "cpu.h"
2109f455dcSMasahiro Yamada 
spl_board_init(void)2209f455dcSMasahiro Yamada void spl_board_init(void)
2309f455dcSMasahiro Yamada {
2409f455dcSMasahiro Yamada 	struct apb_misc_pp_ctlr *apb_misc =
2509f455dcSMasahiro Yamada 				(struct apb_misc_pp_ctlr *)NV_PA_APB_MISC_BASE;
2609f455dcSMasahiro Yamada 
2709f455dcSMasahiro Yamada 	/* enable JTAG */
2809f455dcSMasahiro Yamada 	writel(0xC0, &apb_misc->cfg_ctl);
2909f455dcSMasahiro Yamada 
3009f455dcSMasahiro Yamada 	board_init_uart_f();
3109f455dcSMasahiro Yamada 
3209f455dcSMasahiro Yamada 	/* Initialize periph GPIOs */
3309f455dcSMasahiro Yamada 	gpio_early_init_uart();
3409f455dcSMasahiro Yamada 
3509f455dcSMasahiro Yamada 	clock_early_init();
36*9b6b3c1bSSimon Glass #ifdef CONFIG_DEBUG_UART
37*9b6b3c1bSSimon Glass 	debug_uart_init();
38*9b6b3c1bSSimon Glass #endif
3909f455dcSMasahiro Yamada 	preloader_console_init();
4009f455dcSMasahiro Yamada }
4109f455dcSMasahiro Yamada 
spl_boot_device(void)4209f455dcSMasahiro Yamada u32 spl_boot_device(void)
4309f455dcSMasahiro Yamada {
4409f455dcSMasahiro Yamada 	return BOOT_DEVICE_RAM;
4509f455dcSMasahiro Yamada }
4609f455dcSMasahiro Yamada 
jump_to_image_no_args(struct spl_image_info * spl_image)4709f455dcSMasahiro Yamada void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
4809f455dcSMasahiro Yamada {
4911e1479bSAndre Przywara 	debug("image entry point: 0x%lX\n", spl_image->entry_point);
5009f455dcSMasahiro Yamada 
5109f455dcSMasahiro Yamada 	start_cpu((u32)spl_image->entry_point);
5209f455dcSMasahiro Yamada 	halt_avp();
5309f455dcSMasahiro Yamada }
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