| /OK3568_Linux_fs/kernel/drivers/cpufreq/ |
| H A D | ti-cpufreq.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * TI CPUFreq/OPP hw-supported driver 5 * Copyright (C) 2016-2017 Texas Instruments, Inc. 6 * Dave Gerlach <d-gerlach@ti.com> 11 #include <linux/mfd/syscon.h> 49 unsigned long efuse); 61 struct regmap *syscon; member 67 unsigned long efuse) in amx3_efuse_xlate() argument 69 if (!efuse) in amx3_efuse_xlate() 70 efuse = opp_data->soc_data->efuse_fallback; in amx3_efuse_xlate() [all …]
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| /OK3568_Linux_fs/u-boot/drivers/net/ |
| H A D | cpsw-common.c | 2 * CPSW common - libs used across TI ethernet devices. 6 * SPDX-License-Identifier: GPL-2.0+ 22 void *fdt = (void *)gd->fdt_blob; in davinci_emac_3517_get_macid() 27 int syscon; in davinci_emac_3517_get_macid() local 30 syscon = fdtdec_lookup_phandle(fdt, node, "syscon"); in davinci_emac_3517_get_macid() 31 if (syscon < 0) { in davinci_emac_3517_get_macid() 32 pr_err("Syscon offset not found\n"); in davinci_emac_3517_get_macid() 33 return -ENOENT; in davinci_emac_3517_get_macid() 36 addr = (u32)map_physmem(fdt_translate_address(fdt, syscon, &gmii), in davinci_emac_3517_get_macid() 39 pr_err("Not able to get syscon address to get mac efuse address\n"); in davinci_emac_3517_get_macid() [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/edac/ |
| H A D | apm-xgene-edac.txt | 1 * APM X-Gene SoC EDAC node 3 EDAC node is defined to describe on-chip error detection and correction. 6 memory controller - Memory controller 7 PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache 8 L3 - L3 cache controller 9 SoC - SoC IP's such as Ethernet, SATA, and etc 14 - compatible : Shall be "apm,xgene-edac". 15 - regmap-csw : Regmap of the CPU switch fabric (CSW) resource. 16 - regmap-mcba : Regmap of the MCB-A (memory bridge) resource. 17 - regmap-mcbb : Regmap of the MCB-B (memory bridge) resource. [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8183.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/clock/mt8183-clk.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/reset-controller/mt8183-resets.h> 12 #include <dt-bindings/phy/phy.h> 13 #include "mt8183-pinfunc.h" 17 interrupt-parent = <&sysirq>; 18 #address-cells = <2>; 19 #size-cells = <2>; [all …]
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| H A D | mt7622.dtsi | 6 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/clock/mt7622-clk.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/power/mt7622-power.h> 14 #include <dt-bindings/reset/mt7622-reset.h> 15 #include <dt-bindings/thermal/thermal.h> 19 interrupt-parent = <&sysirq>; 20 #address-cells = <2>; [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/cpufreq/ |
| H A D | ti-cpufreq.txt | 6 The ti-cpufreq driver can use revision and an efuse value from the SoC to 8 used to determine which OPPs from the operating-points-v2 table get enabled 12 -------------------- 14 - operating-points-v2: Phandle to the operating-points-v2 table to use. 16 In 'operating-points-v2' table: 17 - compatible: Should be 18 - 'operating-points-v2-ti-cpu' for am335x, am43xx, and dra7xx/am57xx, 20 - syscon: A phandle pointing to a syscon node representing the control module 24 -------------------- 25 - "vdd-supply", "vbb-supply": to define two regulators for dra7xx [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/nvmem/ |
| H A D | imx-ocotp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings 10 - Anson Huang <Anson.Huang@nxp.com> 13 This binding represents the on-chip eFuse OTP controller found on 18 - $ref: "nvmem.yaml#" 23 - items: 24 - enum: [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | dra7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/clock/dra7.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/dra.h> 12 #include <dt-bindings/clock/dra7.h> 17 #address-cells = <2>; 18 #size-cells = <2>; 21 interrupt-parent = <&crossbar_mpu>; [all …]
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| H A D | uniphier-sld8.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/uniphier-gpio.h> 11 compatible = "socionext,uniphier-sld8"; 12 #address-cells = <1>; 13 #size-cells = <1>; 16 #address-cells = <1>; 17 #size-cells = <0>; 21 compatible = "arm,cortex-a9"; 23 enable-method = "psci"; [all …]
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| H A D | uniphier-ld4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/uniphier-gpio.h> 11 compatible = "socionext,uniphier-ld4"; 12 #address-cells = <1>; 13 #size-cells = <1>; 16 #address-cells = <1>; 17 #size-cells = <0>; 21 compatible = "arm,cortex-a9"; 23 enable-method = "psci"; [all …]
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| H A D | uniphier-pro5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 // Copyright (C) 2015-2016 Socionext Inc. 9 compatible = "socionext,uniphier-pro5"; 10 #address-cells = <1>; 11 #size-cells = <1>; 14 #address-cells = <1>; 15 #size-cells = <0>; 19 compatible = "arm,cortex-a9"; 22 enable-method = "psci"; 23 next-level-cache = <&l2>; [all …]
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| H A D | uniphier-pro4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/uniphier-gpio.h> 11 compatible = "socionext,uniphier-pro4"; 12 #address-cells = <1>; 13 #size-cells = <1>; 16 #address-cells = <1>; 17 #size-cells = <0>; 21 compatible = "arm,cortex-a9"; 23 enable-method = "psci"; [all …]
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| H A D | keystone-k2e-netcp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/ 9 compatible = "ti,keystone-navigator-qmss"; 10 dma-coherent; 11 #address-cells = <1>; 12 #size-cells = <1>; 15 queue-range = <0 0x2000>; 20 #address-cells = <1>; 21 #size-cells = <1>; 24 managed-queues = <0 0x2000>; [all …]
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| H A D | keystone-k2l-netcp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/ 9 compatible = "ti,keystone-navigator-qmss"; 10 dma-coherent; 11 #address-cells = <1>; 12 #size-cells = <1>; 15 queue-range = <0 0x2000>; 20 #address-cells = <1>; 21 #size-cells = <1>; 24 managed-queues = <0 0x2000>; [all …]
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| H A D | mt7623.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2017-2018 MediaTek Inc. 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/clock/mt2701-clk.h> 13 #include <dt-bindings/pinctrl/mt7623-pinfunc.h> 14 #include <dt-bindings/power/mt2701-power.h> 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/phy/phy.h> 17 #include <dt-bindings/reset/mt2701-resets.h> [all …]
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| H A D | keystone-k2hk-netcp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/ 9 compatible = "ti,keystone-navigator-qmss"; 10 dma-coherent; 11 #address-cells = <1>; 12 #size-cells = <1>; 15 queue-range = <0 0x4000>; 20 #address-cells = <1>; 21 #size-cells = <1>; 24 managed-queues = <0 0x2000>; [all …]
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| H A D | meson.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 12 interrupt-parent = <&gic>; 15 compatible = "simple-bus"; 16 #address-cells = <1>; 17 #size-cells = <1>; 21 compatible = "simple-bus"; [all …]
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| H A D | uniphier-pxs2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/uniphier-gpio.h> 9 #include <dt-bindings/thermal/thermal.h> 12 compatible = "socionext,uniphier-pxs2"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 #address-cells = <1>; 18 #size-cells = <0>; 22 compatible = "arm,cortex-a9"; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/socionext/ |
| H A D | uniphier-ld11.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 12 compatible = "socionext,uniphier-ld11"; 13 #address-cells = <2>; 14 #size-cells = <2>; 15 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <0>; 21 cpu-map { [all …]
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| H A D | uniphier-pxs3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 10 #include <dt-bindings/thermal/thermal.h> 13 compatible = "socionext,uniphier-pxs3"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <0>; [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | keystone-k2g-netcp.dtsi | 12 compatible = "ti,keystone-navigator-qmss-l"; 13 dma-coherent; 14 #address-cells = <1>; 15 #size-cells = <1>; 16 /* power-domains = <&k2g_pds K2G_DEV_NSS0>; */ 18 clock-names = "nss_vclk"; 20 queue-range = <0 0x80>; 24 #address-cells = <1>; 25 #size-cells = <1>; 28 managed-queues = <0 0x80>; [all …]
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| H A D | dra7.dtsi | 2 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/dra.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 20 interrupt-parent = <&crossbar_mpu>; 46 compatible = "arm,armv7-timer"; 51 interrupt-parent = <&gic>; 54 gic: interrupt-controller@48211000 { 55 compatible = "arm,cortex-a15-gic"; [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/ |
| H A D | ti,k3-am654-cpsw-nuss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/ti,k3-am654-cpsw-nuss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Grygorii Strashko <grygorii.strashko@ti.com> 11 - Sekhar Nori <nsekhar@ti.com> 16 CPSW2G NUSS features - the Reduced Gigabit Media Independent Interface (RGMII), 25 Peripheral Root Complex (UDMA-P) controller. 47 "#address-cells": true 48 "#size-cells": true [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/apm/ |
| H A D | apm-shadowcat.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * dts file for AppliedMicro (APM) X-Gene Shadowcat SOC 9 compatible = "apm,xgene-shadowcat"; 10 interrupt-parent = <&gic>; 11 #address-cells = <2>; 12 #size-cells = <2>; 15 #address-cells = <2>; 16 #size-cells = <0>; 22 enable-method = "spin-table"; 23 cpu-release-addr = <0x1 0x0000fff8>; [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/thermal/ |
| H A D | imx-thermal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/thermal/imx-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Guo <shawnguo@kernel.org> 11 - Anson Huang <Anson.Huang@nxp.com> 16 - fsl,imx6q-tempmon 17 - fsl,imx6sx-tempmon 18 - fsl,imx7d-tempmon 32 nvmem-cells: [all …]
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