1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/thermal/imx-thermal.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: NXP i.MX Thermal Binding 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Shawn Guo <shawnguo@kernel.org> 11*4882a593Smuzhiyun - Anson Huang <Anson.Huang@nxp.com> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyunproperties: 14*4882a593Smuzhiyun compatible: 15*4882a593Smuzhiyun enum: 16*4882a593Smuzhiyun - fsl,imx6q-tempmon 17*4882a593Smuzhiyun - fsl,imx6sx-tempmon 18*4882a593Smuzhiyun - fsl,imx7d-tempmon 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun interrupts: 21*4882a593Smuzhiyun description: | 22*4882a593Smuzhiyun The interrupt output of the controller, i.MX6Q has IRQ_HIGH which 23*4882a593Smuzhiyun will be triggered when temperature is higher than high threshold, 24*4882a593Smuzhiyun i.MX6SX and i.MX7S/D have two more IRQs than i.MX6Q, one is IRQ_LOW 25*4882a593Smuzhiyun and the other is IRQ_PANIC, when temperature is lower than low 26*4882a593Smuzhiyun threshold, IRQ_LOW will be triggered, when temperature is higher 27*4882a593Smuzhiyun than panic threshold, IRQ_PANIC will be triggered, and system can 28*4882a593Smuzhiyun be configured to auto reboot by SRC module for IRQ_PANIC. IRQ_HIGH, 29*4882a593Smuzhiyun IRQ_LOW and IRQ_PANIC share same interrupt output of controller. 30*4882a593Smuzhiyun maxItems: 1 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun nvmem-cells: 33*4882a593Smuzhiyun items: 34*4882a593Smuzhiyun - description: Phandle to the calibration data provided by ocotp 35*4882a593Smuzhiyun - description: Phandle to the temperature grade provided by ocotp 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun nvmem-cell-names: 38*4882a593Smuzhiyun items: 39*4882a593Smuzhiyun - const: calib 40*4882a593Smuzhiyun - const: temp_grade 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun fsl,tempmon: 43*4882a593Smuzhiyun $ref: '/schemas/types.yaml#/definitions/phandle' 44*4882a593Smuzhiyun description: Phandle to anatop system controller node. 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun fsl,tempmon-data: 47*4882a593Smuzhiyun $ref: '/schemas/types.yaml#/definitions/phandle' 48*4882a593Smuzhiyun description: | 49*4882a593Smuzhiyun Deprecated property, phandle pointer to fuse controller that contains 50*4882a593Smuzhiyun TEMPMON calibration data, e.g. OCOTP on imx6q. The details about 51*4882a593Smuzhiyun calibration data can be found in SoC Reference Manual. 52*4882a593Smuzhiyun deprecated: true 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun clocks: 55*4882a593Smuzhiyun maxItems: 1 56*4882a593Smuzhiyun 57*4882a593Smuzhiyunrequired: 58*4882a593Smuzhiyun - compatible 59*4882a593Smuzhiyun - interrupts 60*4882a593Smuzhiyun - fsl,tempmon 61*4882a593Smuzhiyun - nvmem-cells 62*4882a593Smuzhiyun - nvmem-cell-names 63*4882a593Smuzhiyun 64*4882a593SmuzhiyunadditionalProperties: false 65*4882a593Smuzhiyun 66*4882a593Smuzhiyunexamples: 67*4882a593Smuzhiyun - | 68*4882a593Smuzhiyun #include <dt-bindings/clock/imx6sx-clock.h> 69*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun efuse@21bc000 { 72*4882a593Smuzhiyun #address-cells = <1>; 73*4882a593Smuzhiyun #size-cells = <1>; 74*4882a593Smuzhiyun compatible = "fsl,imx6sx-ocotp", "syscon"; 75*4882a593Smuzhiyun reg = <0x021bc000 0x4000>; 76*4882a593Smuzhiyun clocks = <&clks IMX6SX_CLK_OCOTP>; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun tempmon_calib: calib@38 { 79*4882a593Smuzhiyun reg = <0x38 4>; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun tempmon_temp_grade: temp-grade@20 { 83*4882a593Smuzhiyun reg = <0x20 4>; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun anatop@20c8000 { 88*4882a593Smuzhiyun compatible = "fsl,imx6q-anatop", "syscon", "simple-mfd"; 89*4882a593Smuzhiyun reg = <0x020c8000 0x1000>; 90*4882a593Smuzhiyun interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>, 91*4882a593Smuzhiyun <0 54 IRQ_TYPE_LEVEL_HIGH>, 92*4882a593Smuzhiyun <0 127 IRQ_TYPE_LEVEL_HIGH>; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun tempmon { 95*4882a593Smuzhiyun compatible = "fsl,imx6sx-tempmon"; 96*4882a593Smuzhiyun interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 97*4882a593Smuzhiyun fsl,tempmon = <&anatop>; 98*4882a593Smuzhiyun nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>; 99*4882a593Smuzhiyun nvmem-cell-names = "calib", "temp_grade"; 100*4882a593Smuzhiyun clocks = <&clks IMX6SX_CLK_PLL3_USB_OTG>; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun }; 103