xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/cpufreq/ti-cpufreq.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunTI CPUFreq and OPP bindings
2*4882a593Smuzhiyun================================
3*4882a593Smuzhiyun
4*4882a593SmuzhiyunCertain TI SoCs, like those in the am335x, am437x, am57xx, and dra7xx
5*4882a593Smuzhiyunfamilies support different OPPs depending on the silicon variant in use.
6*4882a593SmuzhiyunThe ti-cpufreq driver can use revision and an efuse value from the SoC to
7*4882a593Smuzhiyunprovide the OPP framework with supported hardware information. This is
8*4882a593Smuzhiyunused to determine which OPPs from the operating-points-v2 table get enabled
9*4882a593Smuzhiyunwhen it is parsed by the OPP framework.
10*4882a593Smuzhiyun
11*4882a593SmuzhiyunRequired properties:
12*4882a593Smuzhiyun--------------------
13*4882a593SmuzhiyunIn 'cpus' nodes:
14*4882a593Smuzhiyun- operating-points-v2: Phandle to the operating-points-v2 table to use.
15*4882a593Smuzhiyun
16*4882a593SmuzhiyunIn 'operating-points-v2' table:
17*4882a593Smuzhiyun- compatible: Should be
18*4882a593Smuzhiyun	- 'operating-points-v2-ti-cpu' for am335x, am43xx, and dra7xx/am57xx,
19*4882a593Smuzhiyun	  omap34xx, omap36xx and am3517 SoCs
20*4882a593Smuzhiyun- syscon: A phandle pointing to a syscon node representing the control module
21*4882a593Smuzhiyun	  register space of the SoC.
22*4882a593Smuzhiyun
23*4882a593SmuzhiyunOptional properties:
24*4882a593Smuzhiyun--------------------
25*4882a593Smuzhiyun- "vdd-supply", "vbb-supply": to define two regulators for dra7xx
26*4882a593Smuzhiyun- "cpu0-supply", "vbb-supply": to define two regulators for omap36xx
27*4882a593Smuzhiyun
28*4882a593SmuzhiyunFor each opp entry in 'operating-points-v2' table:
29*4882a593Smuzhiyun- opp-supported-hw: Two bitfields indicating:
30*4882a593Smuzhiyun	1. Which revision of the SoC the OPP is supported by
31*4882a593Smuzhiyun	2. Which eFuse bits indicate this OPP is available
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun	A bitwise AND is performed against these values and if any bit
34*4882a593Smuzhiyun	matches, the OPP gets enabled.
35*4882a593Smuzhiyun
36*4882a593SmuzhiyunExample:
37*4882a593Smuzhiyun--------
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun/* From arch/arm/boot/dts/am33xx.dtsi */
40*4882a593Smuzhiyuncpus {
41*4882a593Smuzhiyun	#address-cells = <1>;
42*4882a593Smuzhiyun	#size-cells = <0>;
43*4882a593Smuzhiyun	cpu@0 {
44*4882a593Smuzhiyun		compatible = "arm,cortex-a8";
45*4882a593Smuzhiyun		device_type = "cpu";
46*4882a593Smuzhiyun		reg = <0>;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun		operating-points-v2 = <&cpu0_opp_table>;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun		clocks = <&dpll_mpu_ck>;
51*4882a593Smuzhiyun		clock-names = "cpu";
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun		clock-latency = <300000>; /* From omap-cpufreq driver */
54*4882a593Smuzhiyun	};
55*4882a593Smuzhiyun};
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun/*
58*4882a593Smuzhiyun * cpu0 has different OPPs depending on SoC revision and some on revisions
59*4882a593Smuzhiyun * 0x2 and 0x4 have eFuse bits that indicate if they are available or not
60*4882a593Smuzhiyun */
61*4882a593Smuzhiyuncpu0_opp_table: opp-table {
62*4882a593Smuzhiyun	compatible = "operating-points-v2-ti-cpu";
63*4882a593Smuzhiyun	syscon = <&scm_conf>;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun	/*
66*4882a593Smuzhiyun	 * The three following nodes are marked with opp-suspend
67*4882a593Smuzhiyun	 * because they can not be enabled simultaneously on a
68*4882a593Smuzhiyun	 * single SoC.
69*4882a593Smuzhiyun	 */
70*4882a593Smuzhiyun	opp50-300000000 {
71*4882a593Smuzhiyun		opp-hz = /bits/ 64 <300000000>;
72*4882a593Smuzhiyun		opp-microvolt = <950000 931000 969000>;
73*4882a593Smuzhiyun		opp-supported-hw = <0x06 0x0010>;
74*4882a593Smuzhiyun		opp-suspend;
75*4882a593Smuzhiyun	};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun	opp100-275000000 {
78*4882a593Smuzhiyun		opp-hz = /bits/ 64 <275000000>;
79*4882a593Smuzhiyun		opp-microvolt = <1100000 1078000 1122000>;
80*4882a593Smuzhiyun		opp-supported-hw = <0x01 0x00FF>;
81*4882a593Smuzhiyun		opp-suspend;
82*4882a593Smuzhiyun	};
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun	opp100-300000000 {
85*4882a593Smuzhiyun		opp-hz = /bits/ 64 <300000000>;
86*4882a593Smuzhiyun		opp-microvolt = <1100000 1078000 1122000>;
87*4882a593Smuzhiyun		opp-supported-hw = <0x06 0x0020>;
88*4882a593Smuzhiyun		opp-suspend;
89*4882a593Smuzhiyun	};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun	opp100-500000000 {
92*4882a593Smuzhiyun		opp-hz = /bits/ 64 <500000000>;
93*4882a593Smuzhiyun		opp-microvolt = <1100000 1078000 1122000>;
94*4882a593Smuzhiyun		opp-supported-hw = <0x01 0xFFFF>;
95*4882a593Smuzhiyun	};
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun	opp100-600000000 {
98*4882a593Smuzhiyun		opp-hz = /bits/ 64 <600000000>;
99*4882a593Smuzhiyun		opp-microvolt = <1100000 1078000 1122000>;
100*4882a593Smuzhiyun		opp-supported-hw = <0x06 0x0040>;
101*4882a593Smuzhiyun	};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun	opp120-600000000 {
104*4882a593Smuzhiyun		opp-hz = /bits/ 64 <600000000>;
105*4882a593Smuzhiyun		opp-microvolt = <1200000 1176000 1224000>;
106*4882a593Smuzhiyun		opp-supported-hw = <0x01 0xFFFF>;
107*4882a593Smuzhiyun	};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun	opp120-720000000 {
110*4882a593Smuzhiyun		opp-hz = /bits/ 64 <720000000>;
111*4882a593Smuzhiyun		opp-microvolt = <1200000 1176000 1224000>;
112*4882a593Smuzhiyun		opp-supported-hw = <0x06 0x0080>;
113*4882a593Smuzhiyun	};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun	oppturbo-720000000 {
116*4882a593Smuzhiyun		opp-hz = /bits/ 64 <720000000>;
117*4882a593Smuzhiyun		opp-microvolt = <1260000 1234800 1285200>;
118*4882a593Smuzhiyun		opp-supported-hw = <0x01 0xFFFF>;
119*4882a593Smuzhiyun	};
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun	oppturbo-800000000 {
122*4882a593Smuzhiyun		opp-hz = /bits/ 64 <800000000>;
123*4882a593Smuzhiyun		opp-microvolt = <1260000 1234800 1285200>;
124*4882a593Smuzhiyun		opp-supported-hw = <0x06 0x0100>;
125*4882a593Smuzhiyun	};
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun	oppnitro-1000000000 {
128*4882a593Smuzhiyun		opp-hz = /bits/ 64 <1000000000>;
129*4882a593Smuzhiyun		opp-microvolt = <1325000 1298500 1351500>;
130*4882a593Smuzhiyun		opp-supported-hw = <0x04 0x0200>;
131*4882a593Smuzhiyun	};
132*4882a593Smuzhiyun};
133