1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Anson Huang <Anson.Huang@nxp.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: | 13*4882a593Smuzhiyun This binding represents the on-chip eFuse OTP controller found on 14*4882a593Smuzhiyun i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL, 15*4882a593Smuzhiyun i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM, i.MX8MN and i.MX8MP SoCs. 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunallOf: 18*4882a593Smuzhiyun - $ref: "nvmem.yaml#" 19*4882a593Smuzhiyun 20*4882a593Smuzhiyunproperties: 21*4882a593Smuzhiyun compatible: 22*4882a593Smuzhiyun oneOf: 23*4882a593Smuzhiyun - items: 24*4882a593Smuzhiyun - enum: 25*4882a593Smuzhiyun - fsl,imx6q-ocotp 26*4882a593Smuzhiyun - fsl,imx6sl-ocotp 27*4882a593Smuzhiyun - fsl,imx6sx-ocotp 28*4882a593Smuzhiyun - fsl,imx6ul-ocotp 29*4882a593Smuzhiyun - fsl,imx6ull-ocotp 30*4882a593Smuzhiyun - fsl,imx7d-ocotp 31*4882a593Smuzhiyun - fsl,imx6sll-ocotp 32*4882a593Smuzhiyun - fsl,imx7ulp-ocotp 33*4882a593Smuzhiyun - fsl,imx8mq-ocotp 34*4882a593Smuzhiyun - fsl,imx8mm-ocotp 35*4882a593Smuzhiyun - const: syscon 36*4882a593Smuzhiyun - items: 37*4882a593Smuzhiyun - enum: 38*4882a593Smuzhiyun - fsl,imx8mn-ocotp 39*4882a593Smuzhiyun # i.MX8MP not really compatible with fsl,imx8mm-ocotp, however 40*4882a593Smuzhiyun # the code for getting SoC revision depends on fsl,imx8mm-ocotp 41*4882a593Smuzhiyun # compatible. 42*4882a593Smuzhiyun - fsl,imx8mp-ocotp 43*4882a593Smuzhiyun - const: fsl,imx8mm-ocotp 44*4882a593Smuzhiyun - const: syscon 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun reg: 47*4882a593Smuzhiyun maxItems: 1 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun "#address-cells": 50*4882a593Smuzhiyun const: 1 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun "#size-cells": 53*4882a593Smuzhiyun const: 1 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun clocks: 56*4882a593Smuzhiyun maxItems: 1 57*4882a593Smuzhiyun 58*4882a593Smuzhiyunrequired: 59*4882a593Smuzhiyun - "#address-cells" 60*4882a593Smuzhiyun - "#size-cells" 61*4882a593Smuzhiyun - compatible 62*4882a593Smuzhiyun - reg 63*4882a593Smuzhiyun 64*4882a593SmuzhiyunpatternProperties: 65*4882a593Smuzhiyun "^.*@[0-9a-f]+$": 66*4882a593Smuzhiyun type: object 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun properties: 69*4882a593Smuzhiyun reg: 70*4882a593Smuzhiyun maxItems: 1 71*4882a593Smuzhiyun description: 72*4882a593Smuzhiyun Offset and size in bytes within the storage device. 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun required: 75*4882a593Smuzhiyun - reg 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun additionalProperties: false 78*4882a593Smuzhiyun 79*4882a593SmuzhiyununevaluatedProperties: false 80*4882a593Smuzhiyun 81*4882a593Smuzhiyunexamples: 82*4882a593Smuzhiyun - | 83*4882a593Smuzhiyun #include <dt-bindings/clock/imx6sx-clock.h> 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun ocotp: efuse@21bc000 { 86*4882a593Smuzhiyun #address-cells = <1>; 87*4882a593Smuzhiyun #size-cells = <1>; 88*4882a593Smuzhiyun compatible = "fsl,imx6sx-ocotp", "syscon"; 89*4882a593Smuzhiyun reg = <0x021bc000 0x4000>; 90*4882a593Smuzhiyun clocks = <&clks IMX6SX_CLK_OCOTP>; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun cpu_speed_grade: speed-grade@10 { 93*4882a593Smuzhiyun reg = <0x10 4>; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun tempmon_calib: calib@38 { 97*4882a593Smuzhiyun reg = <0x38 4>; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun tempmon_temp_grade: temp-grade@20 { 101*4882a593Smuzhiyun reg = <0x20 4>; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun... 106