Searched +full:sun4i +full:- +full:a10 +full:- +full:crypto (Results 1 – 19 of 19) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/crypto/allwinner,sun4i-a10-crypto.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Allwinner A10 Security System Device Tree Bindings10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>16 - const: allwinner,sun4i-a10-crypto17 - items:18 - const: allwinner,sun5i-a13-crypto[all …]
2 * Copyright 2012-2015 Maxime Ripard4 * Maxime Ripard <maxime.ripard@free-electrons.com>6 * This file is dual-licensed: you can use it either under the terms45 #include <dt-bindings/clock/sun5i-ccu.h>46 #include <dt-bindings/dma/sun4i-a10.h>47 #include <dt-bindings/reset/sun5i-ccu.h>50 interrupt-parent = <&intc>;51 #address-cells = <1>;52 #size-cells = <1>;55 #address-cells = <1>;[all …]
5 * This file is dual-licensed: you can use it either under the terms44 #include <dt-bindings/thermal/thermal.h>45 #include <dt-bindings/dma/sun4i-a10.h>46 #include <dt-bindings/clock/sun4i-a10-ccu.h>47 #include <dt-bindings/reset/sun4i-a10-ccu.h>50 #address-cells = <1>;51 #size-cells = <1>;52 interrupt-parent = <&intc>;59 #address-cells = <1>;60 #size-cells = <1>;[all …]
4 * Maxime Ripard <maxime.ripard@free-electrons.com>6 * This file is dual-licensed: you can use it either under the terms45 #include <dt-bindings/interrupt-controller/arm-gic.h>46 #include <dt-bindings/thermal/thermal.h>47 #include <dt-bindings/dma/sun4i-a10.h>48 #include <dt-bindings/clock/sun7i-a20-ccu.h>49 #include <dt-bindings/reset/sun4i-a10-ccu.h>50 #include <dt-bindings/pinctrl/sun4i-a10.h>53 interrupt-parent = <&gic>;54 #address-cells = <1>;[all …]
4 * Maxime Ripard <maxime.ripard@free-electrons.com>6 * This file is dual-licensed: you can use it either under the terms45 #include <dt-bindings/interrupt-controller/arm-gic.h>46 #include <dt-bindings/thermal/thermal.h>48 #include <dt-bindings/clock/sun6i-a31-ccu.h>49 #include <dt-bindings/reset/sun6i-a31-ccu.h>52 interrupt-parent = <&gic>;53 #address-cells = <1>;54 #size-cells = <1>;61 #address-cells = <1>;[all …]
4 * This file is dual-licensed: you can use it either under the terms43 #include "sunxi-h3-h5.dtsi"44 #include <dt-bindings/thermal/thermal.h>47 cpu0_opp_table: opp-table-cpu {48 compatible = "operating-points-v2";49 opp-shared;51 opp-648000000 {52 opp-hz = /bits/ 64 <648000000>;53 opp-microvolt = <1040000 1040000 1300000>;54 clock-latency-ns = <244144>; /* 8 32k periods */[all …]
2 * Copyright 2017 Chen-Yu Tsai <wens@csie.org>5 * This file is dual-licensed: you can use it either under the terms44 #include <dt-bindings/interrupt-controller/arm-gic.h>45 #include <dt-bindings/clock/sun8i-de2.h>46 #include <dt-bindings/clock/sun8i-r40-ccu.h>47 #include <dt-bindings/clock/sun8i-tcon-top.h>48 #include <dt-bindings/reset/sun8i-r40-ccu.h>49 #include <dt-bindings/reset/sun8i-de2.h>50 #include <dt-bindings/thermal/thermal.h>53 #address-cells = <1>;[all …]
2 * Copyright 2014 Chen-Yu Tsai4 * Chen-Yu Tsai <wens@csie.org>6 * This file is dual-licensed: you can use it either under the terms45 #include <dt-bindings/interrupt-controller/arm-gic.h>47 #include <dt-bindings/clock/sun9i-a80-ccu.h>48 #include <dt-bindings/clock/sun9i-a80-de.h>49 #include <dt-bindings/clock/sun9i-a80-usb.h>50 #include <dt-bindings/reset/sun9i-a80-ccu.h>51 #include <dt-bindings/reset/sun9i-a80-de.h>52 #include <dt-bindings/reset/sun9i-a80-usb.h>[all …]
4 * This file is dual-licensed: you can use it either under the terms43 #include <dt-bindings/interrupt-controller/arm-gic.h>44 #include <dt-bindings/clock/sun8i-v3s-ccu.h>45 #include <dt-bindings/reset/sun8i-v3s-ccu.h>46 #include <dt-bindings/clock/sun8i-de2.h>49 #address-cells = <1>;50 #size-cells = <1>;51 interrupt-parent = <&gic>;54 #address-cells = <1>;55 #size-cells = <1>;[all …]
5 * This file is dual-licensed: you can use it either under the terms46 #include <dt-bindings/thermal/thermal.h>48 #include <dt-bindings/clock/sun4i-a10-pll2.h>49 #include <dt-bindings/dma/sun4i-a10.h>50 #include <dt-bindings/pinctrl/sun4i-a10.h>53 interrupt-parent = <&intc>;60 #address-cells = <1>;61 #size-cells = <1>;65 compatible = "allwinner,simple-framebuffer",66 "simple-framebuffer";[all …]
4 * Maxime Ripard <maxime.ripard@free-electrons.com>6 * This file is dual-licensed: you can use it either under the terms47 #include <dt-bindings/interrupt-controller/arm-gic.h>48 #include <dt-bindings/thermal/thermal.h>50 #include <dt-bindings/clock/sun4i-a10-pll2.h>51 #include <dt-bindings/dma/sun4i-a10.h>52 #include <dt-bindings/pinctrl/sun4i-a10.h>55 interrupt-parent = <&gic>;62 #address-cells = <1>;63 #size-cells = <1>;[all …]
4 * Maxime Ripard <maxime.ripard@free-electrons.com>6 * This file is dual-licensed: you can use it either under the terms47 #include <dt-bindings/interrupt-controller/arm-gic.h>48 #include <dt-bindings/thermal/thermal.h>50 #include <dt-bindings/pinctrl/sun4i-a10.h>53 interrupt-parent = <&gic>;60 #address-cells = <1>;61 #size-cells = <1>;65 compatible = "allwinner,simple-framebuffer",66 "simple-framebuffer";[all …]
2 * Copyright 2014 Chen-Yu Tsai4 * Chen-Yu Tsai <wens@csie.org>6 * This file is dual-licensed: you can use it either under the terms45 #include "sun8i-a23-a33.dtsi"50 compatible = "arm,cortex-a7";56 compatible = "arm,cortex-a7";69 #clock-cells = <0>;70 compatible = "fixed-clock";71 clock-frequency = <0>;72 clock-output-names = "pll11";[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * sun4i-ss-core.c - hardware cryptographic accelerator for Allwinner A20 SoC5 * Copyright (C) 2013-2015 Corentin LABBE <clabbe.montjoie@gmail.com>7 * Core file which registers crypto algorithms supported by the SS.12 #include <linux/crypto.h>18 #include <crypto/scatterwalk.h>24 #include "sun4i-ss.h"50 .cra_driver_name = "md5-sun4i-ss",77 .cra_driver_name = "sha1-sun4i-ss",90 .alg.crypto = {[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)4 #include <arm/sunxi-h3-h5.dtsi>6 #include <dt-bindings/thermal/thermal.h>10 #address-cells = <1>;11 #size-cells = <0>;14 compatible = "arm,cortex-a53";17 enable-method = "psci";19 clock-latency-ns = <244144>; /* 8 32k periods */20 #cooling-cells = <2>;24 compatible = "arm,cortex-a53";[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)4 #include <dt-bindings/interrupt-controller/arm-gic.h>5 #include <dt-bindings/clock/sun50i-h6-ccu.h>6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>7 #include <dt-bindings/clock/sun8i-de2.h>8 #include <dt-bindings/clock/sun8i-tcon-top.h>9 #include <dt-bindings/reset/sun50i-h6-ccu.h>10 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>11 #include <dt-bindings/reset/sun8i-de2.h>12 #include <dt-bindings/thermal/thermal.h>[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/sun50i-a64-ccu.h>7 #include <dt-bindings/clock/sun8i-de2.h>8 #include <dt-bindings/clock/sun8i-r-ccu.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/reset/sun50i-a64-ccu.h>11 #include <dt-bindings/reset/sun8i-de2.h>12 #include <dt-bindings/reset/sun8i-r-ccu.h>13 #include <dt-bindings/thermal/thermal.h>16 interrupt-parent = <&gic>;[all …]
... -boot-2021.07/.readthedocs.yml u-boot-2021.07/Kbuild u-boot-2021.07 ...
9 -------------------------30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------97 W: *Web-page* with status/info[all …]