| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/ |
| H A D | clock-bindings.txt | 1 This binding is a work-in-progress, and are based on some experimental 10 value of a #clock-cells property in the clock provider node. 17 #clock-cells: Number of cells in a clock specifier; Typically 0 for nodes 22 clock-output-names: Recommended to be a list of strings of clock output signal 24 However, the meaning of clock-output-names is domain 33 the provider's clock-output-names property. 38 #clock-cells = <1>; 39 clock-output-names = "ckil", "ckih"; 42 - this node defines a device with two clock outputs, the first named 44 clocks by index. The names should reflect the clock output signal [all …]
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| H A D | qcom,gcc-sc7180.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sc7180.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <tdas@codeaurora.org> 14 Qualcomm global clock control module which supports the clocks, resets and 18 - dt-bindings/clock/qcom,gcc-sc7180.h 22 const: qcom,gcc-sc7180 24 clocks: [all …]
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| H A D | qcom,gcc-sm8250.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8250.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <tdas@codeaurora.org> 14 Qualcomm global clock control module which supports the clocks, resets and 18 - dt-bindings/clock/qcom,gcc-sm8250.h 22 const: qcom,gcc-sm8250 24 clocks: [all …]
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| H A D | qcom,gcc-sm8150.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8150.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <tdas@codeaurora.org> 14 Qualcomm global clock control module which supports the clocks, resets and 18 - dt-bindings/clock/qcom,gcc-sm8150.h 22 const: qcom,gcc-sm8150 24 clocks: [all …]
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| H A D | qcom,gcc-msm8998.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8998.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <tdas@codeaurora.org> 14 Qualcomm global clock control module which supports the clocks, resets and 18 - dt-bindings/clock/qcom,gcc-msm8998.h 22 const: qcom,gcc-msm8998 24 clocks: [all …]
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| H A D | qcom,mmcc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jeffrey Hugo <jhugo@codeaurora.org> 11 - Taniya Das <tdas@codeaurora.org> 14 Qualcomm multimedia clock control module which supports the clocks, resets and 20 - qcom,mmcc-apq8064 21 - qcom,mmcc-apq8084 22 - qcom,mmcc-msm8660 23 - qcom,mmcc-msm8960 [all …]
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| H A D | qcom,gcc-msm8996.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8996.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <tdas@codeaurora.org> 14 Qualcomm global clock control module which supports the clocks, resets and 18 - dt-bindings/clock/qcom,gcc-msm8996.h 22 const: qcom,gcc-msm8996 24 clocks: [all …]
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| H A D | qcom,gcc-ipq8074.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8074.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <tdas@codeaurora.org> 14 Qualcomm global clock control module which supports the clocks, resets and 18 - dt-bindings/clock/qcom,gcc-ipq8074.h 22 const: qcom,gcc-ipq8074 24 '#clock-cells': [all …]
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| H A D | qcom,gcc-qcs404.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-qcs404.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <tdas@codeaurora.org> 14 Qualcomm global clock control module which supports the clocks, resets and 18 - dt-bindings/clock/qcom,gcc-qcs404.h 22 const: qcom,gcc-qcs404 24 '#clock-cells': [all …]
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| H A D | qcom,gcc-apq8064.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-apq8064.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <tdas@codeaurora.org> 14 Qualcomm global clock control module which supports the clocks, resets and 18 - dt-bindings/clock/qcom,gcc-msm8960.h 19 - dt-bindings/reset/qcom,gcc-msm8960.h 23 const: qcom,gcc-apq8064 [all …]
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| H A D | qcom,gcc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <tdas@codeaurora.org> 14 Qualcomm global clock control module which supports the clocks, resets and 18 - dt-bindings/clock/qcom,gcc-apq8084.h 19 - dt-bindings/reset/qcom,gcc-apq8084.h 20 - dt-bindings/clock/qcom,gcc-ipq4019.h 21 - dt-bindings/clock/qcom,gcc-ipq6018.h [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/ |
| H A D | protected_memory_allocator.txt | 1 # SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note 3 # (C) COPYRIGHT 2019-2021 ARM Limited. All rights reserved. 17 # http://www.gnu.org/licenses/gpl-2.0.html. 21 * Arm protected memory allocator for Mali GPU device drivers 25 - compatible: Must be "arm,protected-memory-allocator" 27 The protected memory allocator manages allocation of physical pages of a 28 reserved memory region of protected memory, therefore its device node shall 31 In addition to that, the protected memory allocator shall be referenced 36 reserved-memory { 37 #address-cells = <2>; [all …]
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| H A D | mali-midgard.txt | 2 # (C) COPYRIGHT 2013-2017 ARM Limited. All rights reserved. 11 # Boston, MA 02110-1301, USA. 21 - compatible : Should be mali<chip>, replacing digits with x from the back, 22 until malit<Major>xx, ending with arm,mali-midgard, the latter not optional. 23 - reg : Physical base address of the device and length of the register area. 24 - interrupts : Contains the three IRQ lines required by T-6xx devices 25 - interrupt-names : Contains the names of IRQ resources in the order they were 30 - clocks : Phandle to clock for the Mali T-6xx device. 31 - clock-names : Shall be "clk_mali". 32 - mali-supply : Phandle to regulator for the Mali device. Refer to [all …]
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| /OK3568_Linux_fs/kernel/drivers/clk/qcom/ |
| H A D | common.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. 10 #include <linux/clk-provider.h> 11 #include <linux/reset-controller.h> 15 #include "clk-rcg.h" 16 #include "clk-regmap.h" 32 if (!f->freq) in qcom_find_freq() 35 for (; f->freq; f++) in qcom_find_freq() 36 if (rate <= f->freq) in qcom_find_freq() 40 return f - 1; in qcom_find_freq() [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/backend/gpu/ |
| H A D | mali_kbase_pm_internal.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 4 * (C) COPYRIGHT 2010-2022 ARM Limited. All rights reserved. 18 * http://www.gnu.org/licenses/gpl-2.0.html. 36 * kbase_pm_dev_idle - The GPU is idle. 45 * kbase_pm_dev_activate - The GPU is active. 54 * kbase_pm_get_present_cores - Get details of the cores that are present in 71 * kbase_pm_get_active_cores - Get details of the cores that are currently 87 * kbase_pm_get_trans_cores - Get details of the cores that are currently 103 * kbase_pm_get_ready_cores - Get details of the cores that are currently 119 * kbase_pm_clock_on - Turn the clock for the device on, and enable device [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/ |
| H A D | README.soc | 11 --------- 12 The LS1043A integrated multicore processor combines four ARM Cortex-A53 18 - Four 64-bit ARM Cortex-A53 CPUs 19 - 1 MB unified L2 Cache 20 - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving 22 - Data Path Acceleration Architecture (DPAA) incorporating acceleration the 24 - Packet parsing, classification, and distribution (FMan) 25 - Queue management for scheduling, packet sequencing, and congestion 27 - Hardware buffer management for buffer allocation and de-allocation (BMan) 28 - Cryptography acceleration (SEC) [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/power/ |
| H A D | renesas,sysc-rmobile.txt | 1 DT bindings for the Renesas R-Mobile System Controller 5 The R-Mobile System Controller provides the following functions: 6 - Boot mode management, 7 - Reset generation, 8 - Power management. 11 - compatible: Should be "renesas,sysc-<soctype>", "renesas,sysc-rmobile" as 14 - "renesas,sysc-r8a73a4" (R-Mobile APE6) 15 - "renesas,sysc-r8a7740" (R-Mobile A1) 16 - "renesas,sysc-sh73a0" (SH-Mobile AG5) 17 - reg: Two address start and address range blocks for the device: [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/ |
| H A D | mali_kbase_defs.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 4 * (C) COPYRIGHT 2011-2023 ARM Limited. All rights reserved. 18 * http://www.gnu.org/licenses/gpl-2.0.html. 85 * BASE_JM_MAX_NR_SLOTS - The maximum number of Job Slots to support in the Hardware. 93 * BASE_MAX_NR_AS - The maximum number of Address Spaces to support in the Hardware. 110 #define KBASEP_AS_NR_INVALID (-1) 113 * KBASE_LOCK_REGION_MAX_SIZE_LOG2 - Maximum size in bytes of a MMU lock region, 119 * KBASE_REG_ZONE_MAX - Maximum number of GPU memory region zones 155 * While, the number of clocks could be more than regulators, 168 * struct kbase_io_access - holds information about 1 register access [all …]
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| /OK3568_Linux_fs/kernel/sound/pci/echoaudio/ |
| H A D | echoaudio.h | 3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004 21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, 22 MA 02111-1307, USA. 26 Translation from C++ and adaptation for use in ALSA-Driver 34 +-----------+ 35 record | |<-------------------- Inputs 36 <-------| | | 39 ------->| | +-------+ 40 play | |--->|monitor|-------> Outputs 41 +-----------+ | mixer | [all …]
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| /OK3568_Linux_fs/kernel/Documentation/driver-api/ |
| H A D | clk.rst | 22 clk which unifies the framework-level accounting and infrastructure that 28 The second half of the interface is comprised of the hardware-specific 30 hardware-specific structures needed to model a particular clock. For 32 clk_ops, such as .enable or .set_rate, implies the hardware-specific 35 hardware-specific bits for the hypothetical "foo" hardware. 62 api itself defines several driver-facing functions which operate on 66 clk_ops pointer in struct clk_core to perform the hardware-specific parts of 67 the operations defined in clk-provider.h:: 107 which abstract the details of struct clk from the hardware-specific bits, and 109 drivers/clk/clk-gate.c:: [all …]
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| /OK3568_Linux_fs/u-boot/common/ |
| H A D | board_f.c | 3 * (C) Copyright 2002-2006 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 10 * SPDX-License-Identifier: GPL-2.0+ 35 #include <asm/mach-types.h> 87 * global data for all modules, so that post-reloc we can avoid the massive 123 if (gd && gd->serial.baudrate) in init_baud_rate() 124 gd->baudrate = gd->serial.baudrate; in init_baud_rate() 126 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE); in init_baud_rate() 145 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", in display_text_info() 154 if (gd && gd->serial.using_pre_serial) in announce_serial() [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/qcom/ |
| H A D | sdm850-lenovo-yoga-c630.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 12 #include <dt-bindings/sound/qcom,q6afe.h> 13 #include <dt-bindings/sound/qcom,q6asm.h> 19 compatible = "lenovo,yoga-c630", "qcom,sdm845"; 27 firmware-name = "qcom/LENOVO/81JL/qcadsp850.mbn"; 32 pm8998-rpmh-regulators { 33 compatible = "qcom,pm8998-rpmh-regulators"; [all …]
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| H A D | qcs404-evb.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 17 stdout-path = "serial0"; 20 vph_pwr: vph-pwr-regulator { 21 compatible = "regulator-fixed"; 22 regulator-name = "vph_pwr"; 23 regulator-always-on; 24 regulator-boot-on; [all …]
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| H A D | sdm845-xiaomi-beryllium.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 /dts-v1/; 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 7 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 16 /delete-node/ &tz_mem; 17 /delete-node/ &adsp_mem; 18 /delete-node/ &wlan_msa_mem; 19 /delete-node/ &mpss_region; 20 /delete-node/ &venus_mem; [all …]
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| /OK3568_Linux_fs/kernel/drivers/clk/ |
| H A D | clk.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com> 4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org> 6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst 10 #include <linux/clk-provider.h> 11 #include <linux/clk/clk-conf.h> 115 if (!core->rpm_enabled) in clk_pm_runtime_get() 118 ret = pm_runtime_get_sync(core->dev); in clk_pm_runtime_get() 120 pm_runtime_put_noidle(core->dev); in clk_pm_runtime_get() 128 if (!core->rpm_enabled) in clk_pm_runtime_put() [all …]
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