1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/clock/qcom,gcc-sm8250.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Qualcomm Global Clock & Reset Controller Binding for SM8250 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Stephen Boyd <sboyd@kernel.org> 11*4882a593Smuzhiyun - Taniya Das <tdas@codeaurora.org> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyundescription: | 14*4882a593Smuzhiyun Qualcomm global clock control module which supports the clocks, resets and 15*4882a593Smuzhiyun power domains on SM8250. 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun See also: 18*4882a593Smuzhiyun - dt-bindings/clock/qcom,gcc-sm8250.h 19*4882a593Smuzhiyun 20*4882a593Smuzhiyunproperties: 21*4882a593Smuzhiyun compatible: 22*4882a593Smuzhiyun const: qcom,gcc-sm8250 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun clocks: 25*4882a593Smuzhiyun items: 26*4882a593Smuzhiyun - description: Board XO source 27*4882a593Smuzhiyun - description: Sleep clock source 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun clock-names: 30*4882a593Smuzhiyun items: 31*4882a593Smuzhiyun - const: bi_tcxo 32*4882a593Smuzhiyun - const: sleep_clk 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun '#clock-cells': 35*4882a593Smuzhiyun const: 1 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun '#reset-cells': 38*4882a593Smuzhiyun const: 1 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun '#power-domain-cells': 41*4882a593Smuzhiyun const: 1 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun reg: 44*4882a593Smuzhiyun maxItems: 1 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun protected-clocks: 47*4882a593Smuzhiyun description: 48*4882a593Smuzhiyun Protected clock specifier list as per common clock binding. 49*4882a593Smuzhiyun 50*4882a593Smuzhiyunrequired: 51*4882a593Smuzhiyun - compatible 52*4882a593Smuzhiyun - clocks 53*4882a593Smuzhiyun - clock-names 54*4882a593Smuzhiyun - reg 55*4882a593Smuzhiyun - '#clock-cells' 56*4882a593Smuzhiyun - '#reset-cells' 57*4882a593Smuzhiyun - '#power-domain-cells' 58*4882a593Smuzhiyun 59*4882a593SmuzhiyunadditionalProperties: false 60*4882a593Smuzhiyun 61*4882a593Smuzhiyunexamples: 62*4882a593Smuzhiyun - | 63*4882a593Smuzhiyun #include <dt-bindings/clock/qcom,rpmh.h> 64*4882a593Smuzhiyun clock-controller@100000 { 65*4882a593Smuzhiyun compatible = "qcom,gcc-sm8250"; 66*4882a593Smuzhiyun reg = <0x00100000 0x1f0000>; 67*4882a593Smuzhiyun clocks = <&rpmhcc RPMH_CXO_CLK>, 68*4882a593Smuzhiyun <&sleep_clk>; 69*4882a593Smuzhiyun clock-names = "bi_tcxo", "sleep_clk"; 70*4882a593Smuzhiyun #clock-cells = <1>; 71*4882a593Smuzhiyun #reset-cells = <1>; 72*4882a593Smuzhiyun #power-domain-cells = <1>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun... 75