1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun/dts-v1/; 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 6*4882a593Smuzhiyun#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 7*4882a593Smuzhiyun#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 8*4882a593Smuzhiyun#include "sdm845.dtsi" 9*4882a593Smuzhiyun#include "pm8998.dtsi" 10*4882a593Smuzhiyun#include "pmi8998.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/* 13*4882a593Smuzhiyun * Delete following upstream (sdm845.dtsi) reserved 14*4882a593Smuzhiyun * memory mappings which are different in this device. 15*4882a593Smuzhiyun */ 16*4882a593Smuzhiyun/delete-node/ &tz_mem; 17*4882a593Smuzhiyun/delete-node/ &adsp_mem; 18*4882a593Smuzhiyun/delete-node/ &wlan_msa_mem; 19*4882a593Smuzhiyun/delete-node/ &mpss_region; 20*4882a593Smuzhiyun/delete-node/ &venus_mem; 21*4882a593Smuzhiyun/delete-node/ &cdsp_mem; 22*4882a593Smuzhiyun/delete-node/ &mba_region; 23*4882a593Smuzhiyun/delete-node/ &slpi_mem; 24*4882a593Smuzhiyun/delete-node/ &spss_mem; 25*4882a593Smuzhiyun/delete-node/ &rmtfs_mem; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun/ { 28*4882a593Smuzhiyun model = "Xiaomi Pocophone F1"; 29*4882a593Smuzhiyun compatible = "xiaomi,beryllium", "qcom,sdm845"; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* required for bootloader to select correct board */ 32*4882a593Smuzhiyun qcom,board-id = <69 0>; 33*4882a593Smuzhiyun qcom,msm-id = <321 0x20001>; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun aliases { 36*4882a593Smuzhiyun hsuart0 = &uart6; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun gpio-keys { 40*4882a593Smuzhiyun compatible = "gpio-keys"; 41*4882a593Smuzhiyun autorepeat; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun pinctrl-names = "default"; 44*4882a593Smuzhiyun pinctrl-0 = <&vol_up_pin_a>; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun vol-up { 47*4882a593Smuzhiyun label = "Volume Up"; 48*4882a593Smuzhiyun linux,code = <KEY_VOLUMEUP>; 49*4882a593Smuzhiyun gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /* Reserved memory changes from downstream */ 54*4882a593Smuzhiyun reserved-memory { 55*4882a593Smuzhiyun tz_mem: memory@86200000 { 56*4882a593Smuzhiyun reg = <0 0x86200000 0 0x4900000>; 57*4882a593Smuzhiyun no-map; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun adsp_mem: memory@8c500000 { 61*4882a593Smuzhiyun reg = <0 0x8c500000 0 0x1e00000>; 62*4882a593Smuzhiyun no-map; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun wlan_msa_mem: memory@8e300000 { 66*4882a593Smuzhiyun reg = <0 0x8e300000 0 0x100000>; 67*4882a593Smuzhiyun no-map; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun mpss_region: memory@8e400000 { 71*4882a593Smuzhiyun reg = <0 0x8e400000 0 0x7800000>; 72*4882a593Smuzhiyun no-map; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun venus_mem: memory@95c00000 { 76*4882a593Smuzhiyun reg = <0 0x95c00000 0 0x500000>; 77*4882a593Smuzhiyun no-map; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun cdsp_mem: memory@96100000 { 81*4882a593Smuzhiyun reg = <0 0x96100000 0 0x800000>; 82*4882a593Smuzhiyun no-map; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun mba_region: memory@96900000 { 86*4882a593Smuzhiyun reg = <0 0x96900000 0 0x200000>; 87*4882a593Smuzhiyun no-map; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun slpi_mem: memory@96b00000 { 91*4882a593Smuzhiyun reg = <0 0x96b00000 0 0x1400000>; 92*4882a593Smuzhiyun no-map; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun spss_mem: memory@97f00000 { 96*4882a593Smuzhiyun reg = <0 0x97f00000 0 0x100000>; 97*4882a593Smuzhiyun no-map; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun rmtfs_mem: memory@f6301000 { 101*4882a593Smuzhiyun compatible = "qcom,rmtfs-mem"; 102*4882a593Smuzhiyun reg = <0 0xf6301000 0 0x200000>; 103*4882a593Smuzhiyun no-map; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun qcom,client-id = <1>; 106*4882a593Smuzhiyun qcom,vmid = <15>; 107*4882a593Smuzhiyun }; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun vreg_s4a_1p8: vreg-s4a-1p8 { 111*4882a593Smuzhiyun compatible = "regulator-fixed"; 112*4882a593Smuzhiyun regulator-name = "vreg_s4a_1p8"; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 115*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 116*4882a593Smuzhiyun regulator-always-on; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun}; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun&adsp_pas { 121*4882a593Smuzhiyun status = "okay"; 122*4882a593Smuzhiyun firmware-name = "qcom/sdm845/adsp.mdt"; 123*4882a593Smuzhiyun}; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun&apps_rsc { 126*4882a593Smuzhiyun pm8998-rpmh-regulators { 127*4882a593Smuzhiyun compatible = "qcom,pm8998-rpmh-regulators"; 128*4882a593Smuzhiyun qcom,pmic-id = "a"; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun vreg_l1a_0p875: ldo1 { 131*4882a593Smuzhiyun regulator-min-microvolt = <880000>; 132*4882a593Smuzhiyun regulator-max-microvolt = <880000>; 133*4882a593Smuzhiyun regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun vreg_l5a_0p8: ldo5 { 137*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 138*4882a593Smuzhiyun regulator-max-microvolt = <800000>; 139*4882a593Smuzhiyun regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun vreg_l7a_1p8: ldo7 { 143*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 144*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 145*4882a593Smuzhiyun regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun vreg_l12a_1p8: ldo12 { 149*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 150*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 151*4882a593Smuzhiyun regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 152*4882a593Smuzhiyun }; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun vreg_l13a_2p95: ldo13 { 155*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 156*4882a593Smuzhiyun regulator-max-microvolt = <2960000>; 157*4882a593Smuzhiyun regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun vreg_l17a_1p3: ldo17 { 161*4882a593Smuzhiyun regulator-min-microvolt = <1304000>; 162*4882a593Smuzhiyun regulator-max-microvolt = <1304000>; 163*4882a593Smuzhiyun regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun vreg_l20a_2p95: ldo20 { 167*4882a593Smuzhiyun regulator-min-microvolt = <2960000>; 168*4882a593Smuzhiyun regulator-max-microvolt = <2968000>; 169*4882a593Smuzhiyun regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun vreg_l21a_2p95: ldo21 { 173*4882a593Smuzhiyun regulator-min-microvolt = <2960000>; 174*4882a593Smuzhiyun regulator-max-microvolt = <2968000>; 175*4882a593Smuzhiyun regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun vreg_l24a_3p075: ldo24 { 179*4882a593Smuzhiyun regulator-min-microvolt = <3088000>; 180*4882a593Smuzhiyun regulator-max-microvolt = <3088000>; 181*4882a593Smuzhiyun regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 182*4882a593Smuzhiyun }; 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun vreg_l25a_3p3: ldo25 { 185*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 186*4882a593Smuzhiyun regulator-max-microvolt = <3312000>; 187*4882a593Smuzhiyun regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun vreg_l26a_1p2: ldo26 { 191*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 192*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 193*4882a593Smuzhiyun regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 194*4882a593Smuzhiyun }; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun}; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun&cdsp_pas { 199*4882a593Smuzhiyun status = "okay"; 200*4882a593Smuzhiyun firmware-name = "qcom/sdm845/cdsp.mdt"; 201*4882a593Smuzhiyun}; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun&gcc { 204*4882a593Smuzhiyun protected-clocks = <GCC_QSPI_CORE_CLK>, 205*4882a593Smuzhiyun <GCC_QSPI_CORE_CLK_SRC>, 206*4882a593Smuzhiyun <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, 207*4882a593Smuzhiyun <GCC_LPASS_Q6_AXI_CLK>, 208*4882a593Smuzhiyun <GCC_LPASS_SWAY_CLK>; 209*4882a593Smuzhiyun}; 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun&gpu { 212*4882a593Smuzhiyun zap-shader { 213*4882a593Smuzhiyun memory-region = <&gpu_mem>; 214*4882a593Smuzhiyun firmware-name = "qcom/sdm845/a630_zap.mbn"; 215*4882a593Smuzhiyun }; 216*4882a593Smuzhiyun}; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun&mss_pil { 219*4882a593Smuzhiyun status = "okay"; 220*4882a593Smuzhiyun firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mdt"; 221*4882a593Smuzhiyun}; 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun&pm8998_gpio { 224*4882a593Smuzhiyun vol_up_pin_a: vol-up-active { 225*4882a593Smuzhiyun pins = "gpio6"; 226*4882a593Smuzhiyun function = "normal"; 227*4882a593Smuzhiyun input-enable; 228*4882a593Smuzhiyun bias-pull-up; 229*4882a593Smuzhiyun qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 230*4882a593Smuzhiyun }; 231*4882a593Smuzhiyun}; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun&pm8998_pon { 234*4882a593Smuzhiyun resin { 235*4882a593Smuzhiyun compatible = "qcom,pm8941-resin"; 236*4882a593Smuzhiyun interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; 237*4882a593Smuzhiyun debounce = <15625>; 238*4882a593Smuzhiyun bias-pull-up; 239*4882a593Smuzhiyun linux,code = <KEY_VOLUMEDOWN>; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun}; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun&qupv3_id_0 { 244*4882a593Smuzhiyun status = "okay"; 245*4882a593Smuzhiyun}; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun&sdhc_2 { 248*4882a593Smuzhiyun status = "okay"; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun pinctrl-names = "default"; 251*4882a593Smuzhiyun pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun vmmc-supply = <&vreg_l21a_2p95>; 254*4882a593Smuzhiyun vqmmc-supply = <&vreg_l13a_2p95>; 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun bus-width = <4>; 257*4882a593Smuzhiyun cd-gpios = <&tlmm 126 GPIO_ACTIVE_HIGH>; 258*4882a593Smuzhiyun}; 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun&tlmm { 261*4882a593Smuzhiyun gpio-reserved-ranges = <0 4>, <81 4>; 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun sdc2_default_state: sdc2-default { 264*4882a593Smuzhiyun clk { 265*4882a593Smuzhiyun pins = "sdc2_clk"; 266*4882a593Smuzhiyun bias-disable; 267*4882a593Smuzhiyun drive-strength = <16>; 268*4882a593Smuzhiyun }; 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun cmd { 271*4882a593Smuzhiyun pins = "sdc2_cmd"; 272*4882a593Smuzhiyun bias-pull-up; 273*4882a593Smuzhiyun drive-strength = <10>; 274*4882a593Smuzhiyun }; 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun data { 277*4882a593Smuzhiyun pins = "sdc2_data"; 278*4882a593Smuzhiyun bias-pull-up; 279*4882a593Smuzhiyun drive-strength = <10>; 280*4882a593Smuzhiyun }; 281*4882a593Smuzhiyun }; 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun sdc2_card_det_n: sd-card-det-n { 284*4882a593Smuzhiyun pins = "gpio126"; 285*4882a593Smuzhiyun function = "gpio"; 286*4882a593Smuzhiyun bias-pull-up; 287*4882a593Smuzhiyun }; 288*4882a593Smuzhiyun}; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun&uart6 { 291*4882a593Smuzhiyun status = "okay"; 292*4882a593Smuzhiyun 293*4882a593Smuzhiyun bluetooth { 294*4882a593Smuzhiyun compatible = "qcom,wcn3990-bt"; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun vddio-supply = <&vreg_s4a_1p8>; 297*4882a593Smuzhiyun vddxo-supply = <&vreg_l7a_1p8>; 298*4882a593Smuzhiyun vddrf-supply = <&vreg_l17a_1p3>; 299*4882a593Smuzhiyun vddch0-supply = <&vreg_l25a_3p3>; 300*4882a593Smuzhiyun max-speed = <3200000>; 301*4882a593Smuzhiyun }; 302*4882a593Smuzhiyun}; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun&ufs_mem_hc { 305*4882a593Smuzhiyun status = "okay"; 306*4882a593Smuzhiyun 307*4882a593Smuzhiyun reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun vcc-supply = <&vreg_l20a_2p95>; 310*4882a593Smuzhiyun vcc-max-microamp = <800000>; 311*4882a593Smuzhiyun}; 312*4882a593Smuzhiyun 313*4882a593Smuzhiyun&ufs_mem_phy { 314*4882a593Smuzhiyun status = "okay"; 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun vdda-phy-supply = <&vreg_l1a_0p875>; 317*4882a593Smuzhiyun vdda-pll-supply = <&vreg_l26a_1p2>; 318*4882a593Smuzhiyun}; 319*4882a593Smuzhiyun 320*4882a593Smuzhiyun&usb_1 { 321*4882a593Smuzhiyun status = "okay"; 322*4882a593Smuzhiyun}; 323*4882a593Smuzhiyun 324*4882a593Smuzhiyun&usb_1_dwc3 { 325*4882a593Smuzhiyun dr_mode = "peripheral"; 326*4882a593Smuzhiyun}; 327*4882a593Smuzhiyun 328*4882a593Smuzhiyun&usb_1_hsphy { 329*4882a593Smuzhiyun status = "okay"; 330*4882a593Smuzhiyun 331*4882a593Smuzhiyun vdd-supply = <&vreg_l1a_0p875>; 332*4882a593Smuzhiyun vdda-pll-supply = <&vreg_l12a_1p8>; 333*4882a593Smuzhiyun vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun qcom,imp-res-offset-value = <8>; 336*4882a593Smuzhiyun qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; 337*4882a593Smuzhiyun qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>; 338*4882a593Smuzhiyun qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; 339*4882a593Smuzhiyun}; 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun&usb_1_qmpphy { 342*4882a593Smuzhiyun status = "okay"; 343*4882a593Smuzhiyun 344*4882a593Smuzhiyun vdda-phy-supply = <&vreg_l26a_1p2>; 345*4882a593Smuzhiyun vdda-pll-supply = <&vreg_l1a_0p875>; 346*4882a593Smuzhiyun}; 347*4882a593Smuzhiyun 348*4882a593Smuzhiyun&wifi { 349*4882a593Smuzhiyun status = "okay"; 350*4882a593Smuzhiyun 351*4882a593Smuzhiyun vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; 352*4882a593Smuzhiyun vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 353*4882a593Smuzhiyun vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 354*4882a593Smuzhiyun vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 355*4882a593Smuzhiyun}; 356*4882a593Smuzhiyun 357*4882a593Smuzhiyun/* PINCTRL - additions to nodes defined in sdm845.dtsi */ 358*4882a593Smuzhiyun 359*4882a593Smuzhiyun&qup_uart6_default { 360*4882a593Smuzhiyun pinmux { 361*4882a593Smuzhiyun pins = "gpio45", "gpio46", "gpio47", "gpio48"; 362*4882a593Smuzhiyun function = "qup6"; 363*4882a593Smuzhiyun }; 364*4882a593Smuzhiyun 365*4882a593Smuzhiyun cts { 366*4882a593Smuzhiyun pins = "gpio45"; 367*4882a593Smuzhiyun bias-disable; 368*4882a593Smuzhiyun }; 369*4882a593Smuzhiyun 370*4882a593Smuzhiyun rts-tx { 371*4882a593Smuzhiyun pins = "gpio46", "gpio47"; 372*4882a593Smuzhiyun drive-strength = <2>; 373*4882a593Smuzhiyun bias-disable; 374*4882a593Smuzhiyun }; 375*4882a593Smuzhiyun 376*4882a593Smuzhiyun rx { 377*4882a593Smuzhiyun pins = "gpio48"; 378*4882a593Smuzhiyun bias-pull-up; 379*4882a593Smuzhiyun }; 380*4882a593Smuzhiyun}; 381