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/OK3568_Linux_fs/kernel/include/media/
H A Dv4l2-dv-timings.h146 * @polarities: the horizontal and vertical polarities (same as struct
147 * v4l2_bt_timings polarities).
156 unsigned active_width, u32 polarities, bool interlaced,
165 * @polarities: the horizontal and vertical polarities (same as struct
166 * v4l2_bt_timings polarities).
180 u32 polarities, bool interlaced, struct v4l2_fract aspect,
/OK3568_Linux_fs/kernel/drivers/media/v4l2-core/
H A Dv4l2-dv-timings.c276 t1->bt.polarities == t2->bt.polarities && in v4l2_match_dv_timings()
327 (bt->polarities & V4L2_DV_HSYNC_POS_POL) ? "+" : "-", in v4l2_print_dv_timings()
331 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-", in v4l2_print_dv_timings()
336 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-", in v4l2_print_dv_timings()
481 * @polarities - the horizontal and vertical polarities (same as struct
482 * v4l2_bt_timings polarities).
494 u32 polarities, in v4l2_detect_cvt() argument
507 if (polarities == V4L2_DV_VSYNC_POS_POL) in v4l2_detect_cvt()
509 else if (polarities == V4L2_DV_HSYNC_POS_POL) in v4l2_detect_cvt()
629 fmt->bt.polarities = polarities; in v4l2_detect_cvt()
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H A Dv4l2-fwnode.c194 rval = fwnode_property_count_u32(fwnode, "lane-polarities"); in v4l2_fwnode_endpoint_parse_csi2_bus()
197 pr_warn("invalid number of lane-polarities entries (need %u, got %u)\n", in v4l2_fwnode_endpoint_parse_csi2_bus()
249 "lane-polarities", array, in v4l2_fwnode_endpoint_parse_csi2_bus()
258 pr_debug("no lane polarities defined, assuming not inverted\n"); in v4l2_fwnode_endpoint_parse_csi2_bus()
/OK3568_Linux_fs/kernel/drivers/media/i2c/
H A Dst-mipid02.c413 bool *polarities = ep->bus.mipi_csi2.lane_polarities; in mipid02_configure_clk_lane() local
420 bridge->r.clk_lane_reg1 |= (polarities[0] << 1) | CLK_ENABLE; in mipid02_configure_clk_lane()
426 bool are_lanes_swap, bool *polarities) in mipid02_configure_data0_lane() argument
428 bool are_pin_swap = are_lanes_swap ? polarities[2] : polarities[1]; in mipid02_configure_data0_lane()
445 bool are_lanes_swap, bool *polarities) in mipid02_configure_data1_lane() argument
447 bool are_pin_swap = are_lanes_swap ? polarities[1] : polarities[2]; in mipid02_configure_data1_lane()
463 bool *polarities = ep->bus.mipi_csi2.lane_polarities; in mipid02_configure_from_rx() local
472 polarities); in mipid02_configure_from_rx()
477 polarities); in mipid02_configure_from_rx()
H A Dths7303.c294 "timings: %dx%d%s%d (%dx%d). Pix freq. = %d Hz. Polarities = 0x%x\n", in ths7303_log_status()
300 (int)bt->pixelclock, bt->polarities); in ths7303_log_status()
H A Dths8200.c336 if (bt->polarities & V4L2_DV_HSYNC_POS_POL) { in ths8200_setup()
340 if (bt->polarities & V4L2_DV_VSYNC_POS_POL) { in ths8200_setup()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/arm/
H A Dhdlcd_crtc.c133 unsigned int polarities, err; in hdlcd_crtc_mode_set_nofb() local
142 polarities = HDLCD_POLARITY_DATAEN | HDLCD_POLARITY_DATA; in hdlcd_crtc_mode_set_nofb()
145 polarities |= HDLCD_POLARITY_HSYNC; in hdlcd_crtc_mode_set_nofb()
147 polarities |= HDLCD_POLARITY_VSYNC; in hdlcd_crtc_mode_set_nofb()
161 hdlcd_write(hdlcd, HDLCD_REG_POLARITIES, polarities); in hdlcd_crtc_mode_set_nofb()
H A Dhdlcd_regs.h55 /* polarities */
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/
H A Drenesas,vin.yaml85 If both HSYNC and VSYNC polarities are not specified, embedded
91 If both HSYNC and VSYNC polarities are not specified, embedded
147 If both HSYNC and VSYNC polarities are not specified, embedded
153 If both HSYNC and VSYNC polarities are not specified, embedded
H A Dvideo-interfaces.txt479 Note, that if HSYNC and VSYNC polarities are not specified, embedded
508 - lane-polarities: an array of polarities of the lanes starting from the clock
512 If the lane-polarities property is omitted, the value must be interpreted
H A Dti,omap3isp.txt48 lane-polarities : lane polarity (required on CSI-2)
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/bridge/
H A Dti,sn65dsi86.yaml162 lane-polarities:
172 lane-polarities: [data-lanes]
287 lane-polarities = <0 1 0 1>;
/OK3568_Linux_fs/kernel/arch/sh/include/asm/
H A Dsh7760fb.h145 * HSYNC/VSYNC polarities are derived from the fb_var_screeninfo
146 * data above; however the polarities of the following signals
/OK3568_Linux_fs/kernel/drivers/spi/
H A Dspi-bcm63xx-hsspi.c242 /* only change actual polarities if there is no transfer */ in bcm63xx_hsspi_setup()
282 * e. At the end restore the polarities again to their default values. in bcm63xx_hsspi_transfer_one()
430 /* read out default CS polarities */ in bcm63xx_hsspi_probe()
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/qcom/
H A Dsc7180-trogdor-lazor-r0.dts23 lane-polarities = <1 0>;
/OK3568_Linux_fs/kernel/Documentation/userspace-api/media/v4l/
H A Ddv-timings.rst20 width and height, signal polarities, frontporches, backporches, sync
H A Dvidioc-g-dv-timings.rst106 - ``polarities``
107 - This is a bit mask that defines polarities of sync signals. bit 0
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Domap3-n9.dts56 lane-polarities = <1 1 1>;
/OK3568_Linux_fs/u-boot/drivers/spi/
H A Dbcm63xx_hsspi.c193 /* restore cs polarities */ in bcm63xx_hsspi_deactivate_cs()
399 /* read default cs polarities */ in bcm63xx_hsspi_probe()
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/i2c/
H A Dst,st-mipid02.txt40 - lane-polarities: any lane can be inverted or not.
/OK3568_Linux_fs/kernel/drivers/video/fbdev/geode/
H A Dvideo_gx.c266 /* Only change the sync polarities if we are running in gx_configure_display()
267 * in CRT mode. The FP polarities will be handled in in gx_configure_display()
H A Dvideo_cs5530.c124 /* Sync polarities. */ in cs5530_configure_display()
/OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/
H A Dtda1004x.c651 tda1004x_write_mask(state, TDA10046H_CONF_POLARITY, 0xf0, 0x60); // set AGC polarities in tda10046_init()
655 tda1004x_write_mask(state, TDA10046H_CONF_POLARITY, 0xf0, 0x60); // set AGC polarities in tda10046_init()
659 tda1004x_write_mask(state, TDA10046H_CONF_POLARITY, 0xf0, 0x00); // set AGC polarities in tda10046_init()
665 tda1004x_write_mask(state, TDA10046H_CONF_POLARITY, 0xf0, 0x60); // set AGC polarities in tda10046_init()
/OK3568_Linux_fs/u-boot/drivers/video/drm/
H A Drockchip_connector.h42 * This enum defines signal polarities and clock edge information for signals on
/OK3568_Linux_fs/u-boot/drivers/video/
H A Dipu.h187 * Bitfield of Display Interface signal polarities.

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