xref: /OK3568_Linux_fs/u-boot/drivers/video/drm/rockchip_connector.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #ifndef _ROCKCHIP_CONNECTOR_H_
8*4882a593Smuzhiyun #define _ROCKCHIP_CONNECTOR_H_
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #ifdef CONFIG_SPL_BUILD
11*4882a593Smuzhiyun struct rockchip_connector {
12*4882a593Smuzhiyun 	struct rockchip_phy *phy;
13*4882a593Smuzhiyun 	int id;
14*4882a593Smuzhiyun 	int type;
15*4882a593Smuzhiyun 	bool hpd;
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun 	const struct rockchip_connector_funcs *funcs;
18*4882a593Smuzhiyun 	void *data;
19*4882a593Smuzhiyun };
20*4882a593Smuzhiyun #else
21*4882a593Smuzhiyun #include "rockchip_bridge.h"
22*4882a593Smuzhiyun #include "rockchip_panel.h"
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun struct rockchip_connector {
25*4882a593Smuzhiyun 	struct udevice *dev;
26*4882a593Smuzhiyun 	struct rockchip_bridge *bridge;
27*4882a593Smuzhiyun 	struct rockchip_panel *panel;
28*4882a593Smuzhiyun 	struct rockchip_phy *phy;
29*4882a593Smuzhiyun 	struct list_head head;
30*4882a593Smuzhiyun 	int id;
31*4882a593Smuzhiyun 	int type;
32*4882a593Smuzhiyun 	bool hpd;
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun 	const struct rockchip_connector_funcs *funcs;
35*4882a593Smuzhiyun 	void *data;
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun #endif
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun /**
40*4882a593Smuzhiyun  * enum drm_bus_flags - bus_flags info for &drm_display_info
41*4882a593Smuzhiyun  *
42*4882a593Smuzhiyun  * This enum defines signal polarities and clock edge information for signals on
43*4882a593Smuzhiyun  * a bus as bitmask flags.
44*4882a593Smuzhiyun  *
45*4882a593Smuzhiyun  * The clock edge information is conveyed by two sets of symbols,
46*4882a593Smuzhiyun  * DRM_BUS_FLAGS_*_DRIVE_\* and DRM_BUS_FLAGS_*_SAMPLE_\*. When this enum is
47*4882a593Smuzhiyun  * used to describe a bus from the point of view of the transmitter, the
48*4882a593Smuzhiyun  * \*_DRIVE_\* flags should be used. When used from the point of view of the
49*4882a593Smuzhiyun  * receiver, the \*_SAMPLE_\* flags should be used. The \*_DRIVE_\* and
50*4882a593Smuzhiyun  * \*_SAMPLE_\* flags alias each other, with the \*_SAMPLE_POSEDGE and
51*4882a593Smuzhiyun  * \*_SAMPLE_NEGEDGE flags being equal to \*_DRIVE_NEGEDGE and \*_DRIVE_POSEDGE
52*4882a593Smuzhiyun  * respectively. This simplifies code as signals are usually sampled on the
53*4882a593Smuzhiyun  * opposite edge of the driving edge. Transmitters and receivers may however
54*4882a593Smuzhiyun  * need to take other signal timings into account to convert between driving
55*4882a593Smuzhiyun  * and sample edges.
56*4882a593Smuzhiyun  */
57*4882a593Smuzhiyun enum drm_bus_flags {
58*4882a593Smuzhiyun 	/**
59*4882a593Smuzhiyun 	 * @DRM_BUS_FLAG_DE_LOW:
60*4882a593Smuzhiyun 	 *
61*4882a593Smuzhiyun 	 * The Data Enable signal is active low
62*4882a593Smuzhiyun 	 */
63*4882a593Smuzhiyun 	DRM_BUS_FLAG_DE_LOW = BIT(0),
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	/**
66*4882a593Smuzhiyun 	 * @DRM_BUS_FLAG_DE_HIGH:
67*4882a593Smuzhiyun 	 *
68*4882a593Smuzhiyun 	 * The Data Enable signal is active high
69*4882a593Smuzhiyun 	 */
70*4882a593Smuzhiyun 	DRM_BUS_FLAG_DE_HIGH = BIT(1),
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	/**
73*4882a593Smuzhiyun 	 * @DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE:
74*4882a593Smuzhiyun 	 *
75*4882a593Smuzhiyun 	 * Data is driven on the rising edge of the pixel clock
76*4882a593Smuzhiyun 	 */
77*4882a593Smuzhiyun 	DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE = BIT(2),
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	/**
80*4882a593Smuzhiyun 	 * @DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE:
81*4882a593Smuzhiyun 	 *
82*4882a593Smuzhiyun 	 * Data is driven on the falling edge of the pixel clock
83*4882a593Smuzhiyun 	 */
84*4882a593Smuzhiyun 	DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE = BIT(3),
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	/**
87*4882a593Smuzhiyun 	 * @DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE:
88*4882a593Smuzhiyun 	 *
89*4882a593Smuzhiyun 	 * Data is sampled on the rising edge of the pixel clock
90*4882a593Smuzhiyun 	 */
91*4882a593Smuzhiyun 	DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE = DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	/**
94*4882a593Smuzhiyun 	 * @DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE:
95*4882a593Smuzhiyun 	 *
96*4882a593Smuzhiyun 	 * Data is sampled on the falling edge of the pixel clock
97*4882a593Smuzhiyun 	 */
98*4882a593Smuzhiyun 	DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	/**
101*4882a593Smuzhiyun 	 * @DRM_BUS_FLAG_DATA_MSB_TO_LSB:
102*4882a593Smuzhiyun 	 *
103*4882a593Smuzhiyun 	 * Data is transmitted MSB to LSB on the bus
104*4882a593Smuzhiyun 	 */
105*4882a593Smuzhiyun 	DRM_BUS_FLAG_DATA_MSB_TO_LSB = BIT(4),
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	/**
108*4882a593Smuzhiyun 	 * @DRM_BUS_FLAG_DATA_LSB_TO_MSB:
109*4882a593Smuzhiyun 	 *
110*4882a593Smuzhiyun 	 * Data is transmitted LSB to MSB on the bus
111*4882a593Smuzhiyun 	 */
112*4882a593Smuzhiyun 	DRM_BUS_FLAG_DATA_LSB_TO_MSB = BIT(5),
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	/**
115*4882a593Smuzhiyun 	 * @DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE:
116*4882a593Smuzhiyun 	 *
117*4882a593Smuzhiyun 	 * Sync signals are driven on the rising edge of the pixel clock
118*4882a593Smuzhiyun 	 */
119*4882a593Smuzhiyun 	DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE = BIT(6),
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	/**
122*4882a593Smuzhiyun 	 * @DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE:
123*4882a593Smuzhiyun 	 *
124*4882a593Smuzhiyun 	 * Sync signals are driven on the falling edge of the pixel clock
125*4882a593Smuzhiyun 	 */
126*4882a593Smuzhiyun 	DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE = BIT(7),
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	/**
129*4882a593Smuzhiyun 	 * @DRM_BUS_FLAG_SYNC_SAMPLE_POSEDGE:
130*4882a593Smuzhiyun 	 *
131*4882a593Smuzhiyun 	 * Sync signals are sampled on the rising edge of the pixel clock
132*4882a593Smuzhiyun 	 */
133*4882a593Smuzhiyun 	DRM_BUS_FLAG_SYNC_SAMPLE_POSEDGE = DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE,
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	/**
136*4882a593Smuzhiyun 	 * @DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE:
137*4882a593Smuzhiyun 	 *
138*4882a593Smuzhiyun 	 * Sync signals are sampled on the falling edge of the pixel clock
139*4882a593Smuzhiyun 	 */
140*4882a593Smuzhiyun 	DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE = DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE,
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	/**
143*4882a593Smuzhiyun 	 * @DRM_BUS_FLAG_SHARP_SIGNALS:
144*4882a593Smuzhiyun 	 *
145*4882a593Smuzhiyun 	 *  Set if the Sharp-specific signals (SPL, CLS, PS, REV) must be used
146*4882a593Smuzhiyun 	 */
147*4882a593Smuzhiyun 	DRM_BUS_FLAG_SHARP_SIGNALS = BIT(8),
148*4882a593Smuzhiyun };
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun struct rockchip_connector_funcs {
151*4882a593Smuzhiyun 	/*
152*4882a593Smuzhiyun 	 * pre init connector, prepare some parameter out_if, this will be
153*4882a593Smuzhiyun 	 * used by rockchip_display.c and vop
154*4882a593Smuzhiyun 	 */
155*4882a593Smuzhiyun 	int (*pre_init)(struct rockchip_connector *connector, struct display_state *state);
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	/*
158*4882a593Smuzhiyun 	 * init connector, prepare resource to ensure
159*4882a593Smuzhiyun 	 * detect and get_timing can works
160*4882a593Smuzhiyun 	 */
161*4882a593Smuzhiyun 	int (*init)(struct rockchip_connector *connector, struct display_state *state);
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	void (*deinit)(struct rockchip_connector *connector, struct display_state *state);
164*4882a593Smuzhiyun 	/*
165*4882a593Smuzhiyun 	 * Optional, if connector not support hotplug,
166*4882a593Smuzhiyun 	 * Returns:
167*4882a593Smuzhiyun 	 *   0 means disconnected, else means connected
168*4882a593Smuzhiyun 	 */
169*4882a593Smuzhiyun 	int (*detect)(struct rockchip_connector *connector, struct display_state *state);
170*4882a593Smuzhiyun 	/*
171*4882a593Smuzhiyun 	 * Optional, if implement it, need fill the timing data:
172*4882a593Smuzhiyun 	 *     state->conn_state->mode
173*4882a593Smuzhiyun 	 * you can refer to the rockchip_display: display_get_timing(),
174*4882a593Smuzhiyun 	 * Returns:
175*4882a593Smuzhiyun 	 *   0 means success, else means failed
176*4882a593Smuzhiyun 	 */
177*4882a593Smuzhiyun 	int (*get_timing)(struct rockchip_connector *connector, struct display_state *state);
178*4882a593Smuzhiyun 	/*
179*4882a593Smuzhiyun 	 * Optional, if implement it, need fill the edid data:
180*4882a593Smuzhiyun 	 *     state->conn_state->edid
181*4882a593Smuzhiyun 	 * Returns:
182*4882a593Smuzhiyun 	 *   0 means success, else means failed
183*4882a593Smuzhiyun 	 */
184*4882a593Smuzhiyun 	int (*get_edid)(struct rockchip_connector *connector, struct display_state *state);
185*4882a593Smuzhiyun 	/*
186*4882a593Smuzhiyun 	 * call before crtc enable.
187*4882a593Smuzhiyun 	 */
188*4882a593Smuzhiyun 	int (*prepare)(struct rockchip_connector *connector, struct display_state *state);
189*4882a593Smuzhiyun 	/*
190*4882a593Smuzhiyun 	 * call after crtc enable
191*4882a593Smuzhiyun 	 */
192*4882a593Smuzhiyun 	int (*enable)(struct rockchip_connector *connector, struct display_state *state);
193*4882a593Smuzhiyun 	int (*disable)(struct rockchip_connector *connector, struct display_state *state);
194*4882a593Smuzhiyun 	void (*unprepare)(struct rockchip_connector *connector, struct display_state *state);
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	int (*check)(struct rockchip_connector *connector, struct display_state *state);
197*4882a593Smuzhiyun 	int (*mode_valid)(struct rockchip_connector *connector, struct display_state *state);
198*4882a593Smuzhiyun };
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun const struct rockchip_connector *
201*4882a593Smuzhiyun rockchip_get_connector(const void *blob, int connector_node);
202*4882a593Smuzhiyun int rockchip_connector_bind(struct rockchip_connector *connector, struct udevice *dev, int id,
203*4882a593Smuzhiyun 			    const struct rockchip_connector_funcs *funcs, void *data, int type);
204*4882a593Smuzhiyun struct rockchip_connector *get_rockchip_connector_by_device(struct udevice *dev);
205*4882a593Smuzhiyun int rockchip_connector_pre_init(struct display_state *state);
206*4882a593Smuzhiyun int rockchip_connector_init(struct display_state *state);
207*4882a593Smuzhiyun int rockchip_connector_deinit(struct display_state *state);
208*4882a593Smuzhiyun bool rockchip_connector_detect(struct display_state *state);
209*4882a593Smuzhiyun int rockchip_connector_get_timing(struct display_state *state);
210*4882a593Smuzhiyun int rockchip_connector_get_edid(struct display_state *state);
211*4882a593Smuzhiyun int rockchip_connector_pre_enable(struct display_state *state);
212*4882a593Smuzhiyun int rockchip_connector_enable(struct display_state *state);
213*4882a593Smuzhiyun int rockchip_connector_disable(struct display_state *state);
214*4882a593Smuzhiyun int rockchip_connector_post_disable(struct display_state *state);
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun #ifdef CONFIG_DRM_ROCKCHIP_ANALOGIX_DP
217*4882a593Smuzhiyun struct rockchip_dp_chip_data;
218*4882a593Smuzhiyun extern const struct rockchip_connector_funcs rockchip_analogix_dp_funcs;
219*4882a593Smuzhiyun extern const struct rockchip_dp_chip_data rk3399_analogix_edp_drv_data;
220*4882a593Smuzhiyun extern const struct rockchip_dp_chip_data rk3368_analogix_edp_drv_data;
221*4882a593Smuzhiyun extern const struct rockchip_dp_chip_data rk3288_analogix_dp_drv_data;
222*4882a593Smuzhiyun #endif
223*4882a593Smuzhiyun #endif
224