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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/amazon/
H A Dalpine-v3.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "amazon,al-alpine-v3";
14 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-a72";
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/ti/
H A Dk3-am654.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
8 #include "k3-am65.dtsi"
12 #address-cells = <1>;
13 #size-cells = <0>;
14 cpu-map {
37 compatible = "arm,cortex-a53";
40 enable-method = "psci";
41 i-cache-size = <0x8000>;
42 i-cache-line-size = <64>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dbcm2837.dtsi2 #include "bcm2835-common.dtsi"
3 #include "bcm2835-rpi-common.dtsi"
11 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
14 compatible = "brcm,bcm2836-l1-intc";
16 interrupt-controller;
17 #interrupt-cells = <2>;
18 interrupt-parent = <&local_intc>;
22 arm-pmu {
23 compatible = "arm,cortex-a53-pmu";
24 interrupt-parent = <&local_intc>;
[all …]
H A Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/marvell/
H A Darmada-ap806-quad.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "armada-ap806.dtsi"
12 compatible = "marvell,armada-ap806-quad", "marvell,armada-ap806";
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "arm,cortex-a72";
22 enable-method = "psci";
23 #cooling-cells = <2>;
25 i-cache-size = <0xc000>;
26 i-cache-line-size = <64>;
[all …]
H A Darmada-ap807-quad.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "armada-ap807.dtsi"
12 compatible = "marvell,armada-ap807-quad", "marvell,armada-ap807";
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "arm,cortex-a72";
22 enable-method = "psci";
23 #cooling-cells = <2>;
25 i-cache-size = <0xc000>;
26 i-cache-line-size = <64>;
[all …]
H A Darmada-ap806-dual.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "armada-ap806.dtsi"
12 compatible = "marvell,armada-ap806-dual", "marvell,armada-ap806";
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "arm,cortex-a72";
22 enable-method = "psci";
23 #cooling-cells = <2>;
25 i-cache-size = <0xc000>;
26 i-cache-line-size = <64>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/arm/
H A Djuno-r2.dts9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "juno-base.dtsi"
13 #include "juno-cs-r1r2.dtsi"
17 compatible = "arm,juno-r2", "arm,juno", "arm,vexpress";
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
27 stdout-path = "serial0:115200n8";
31 compatible = "arm,psci-0.2";
[all …]
H A Djuno.dts4 * Copyright (c) 2013-2014 ARM Ltd.
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "juno-base.dtsi"
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
26 stdout-path = "serial0:115200n8";
30 compatible = "arm,psci-0.2";
35 #address-cells = <2>;
[all …]
H A Djuno-r1.dts9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "juno-base.dtsi"
13 #include "juno-cs-r1r2.dtsi"
17 compatible = "arm,juno-r1", "arm,juno", "arm,vexpress";
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
27 stdout-path = "serial0:115200n8";
31 compatible = "arm,psci-0.2";
[all …]
/OK3568_Linux_fs/kernel/arch/riscv/boot/dts/sifive/
H A Dfu540-c000.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2018-2019 SiFive, Inc */
4 /dts-v1/;
6 #include <dt-bindings/clock/sifive-fu540-prci.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 compatible = "sifive,fu540-c000", "sifive,fu540";
23 #address-cells = <1>;
24 #size-cells = <0>;
28 i-cache-block-size = <64>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3588-cpu-swap.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /delete-node/ &cpu_l0;
7 /delete-node/ &cpu_l1;
8 /delete-node/ &cpu_l2;
9 /delete-node/ &cpu_l3;
15 compatible = "arm,cortex-a55";
17 enable-method = "psci";
18 capacity-dmips-mhz = <530>;
20 operating-points-v2 = <&cluster0_opp_table>;
21 cpu-idle-states = <&CPU_SLEEP>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/
H A Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
24 #address-cells = <1>;
[all …]
/OK3568_Linux_fs/kernel/arch/powerpc/kernel/
H A Dcacheinfo.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Processor cache information made available to userspace via sysfs;
27 /* per-cpu object for tracking:
28 * - a "cache" kobject for the top-level directory
29 * - a list of "index" objects representing the cpu's local cache hierarchy
32 struct kobject *kobj; /* bare (not embedded) kobject for cache
37 /* "index" object: each cpu's cache directory has an index
38 * subdirectory corresponding to a cache object associated with the
44 struct cache *cache; member
48 * cache type */
[all …]
/OK3568_Linux_fs/kernel/arch/mips/kernel/
H A Dbmips_5xxx_init.S7 * Copyright (C) 2011-2012 by Broadcom Corporation
28 #define cacheop(kva, size, linesize, op) \ argument
30 addu t1, kva, size ; \
34 addiu t1, t1, -1 ; \
36 9: cache op, 0(t0) ; \
80 /* ZSC L2 Cache Register Access Register Definitions */
111 * Returns: v0 = i cache size, v1 = I cache line size
112 * Description: compute the I-cache size and I-cache line size
128 * This field contains the number of sets (i.e., indices) per way of
129 * the instruction cache:
[all …]
/OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/
H A Diss4xx-mpic.dts15 /dts-v1/;
20 #address-cells = <2>;
21 #size-cells = <1>;
22 model = "ibm,iss-4xx";
23 compatible = "ibm,iss-4xx";
24 dcr-parent = <&{/cpus/cpu@0}>;
31 #address-cells = <1>;
32 #size-cells = <0>;
38 clock-frequency = <100000000>; // 100Mhz :-)
39 timebase-frequency = <100000000>;
[all …]
/OK3568_Linux_fs/kernel/mm/kasan/
H A Dcommon.c1 // SPDX-License-Identifier: GPL-2.0
8 * Some code borrowed from https://github.com/xairy/kasan-prototype by
45 track->pid = current->pid; in kasan_set_track()
46 track->stack = kasan_save_stack(flags); in kasan_set_track()
52 current->kasan_depth++; in kasan_enable_current()
57 current->kasan_depth--; in kasan_disable_current()
61 void __kasan_unpoison_range(const void *address, size_t size) in __kasan_unpoison_range() argument
63 kasan_unpoison(address, size, false); in __kasan_unpoison_range()
83 void *base = (void *)((unsigned long)watermark & ~(THREAD_SIZE - 1)); in kasan_unpoison_task_stack_below()
85 kasan_unpoison(base, watermark - base, false); in kasan_unpoison_task_stack_below()
[all …]
/OK3568_Linux_fs/kernel/arch/riscv/kernel/
H A Dcacheinfo.c1 // SPDX-License-Identifier: GPL-2.0-only
22 if (rv_cache_ops && rv_cache_ops->get_priv_group) in cache_get_priv_group()
23 return rv_cache_ops->get_priv_group(this_leaf); in cache_get_priv_group()
32 * that cores have a homonogenous view of the cache hierarchy. That in get_cacheinfo()
33 * happens to be the case for the current set of RISC-V systems, but in get_cacheinfo()
42 for (index = 0; index < this_cpu_ci->num_leaves; index++) { in get_cacheinfo()
43 this_leaf = this_cpu_ci->info_list + index; in get_cacheinfo()
44 if (this_leaf->level == level && this_leaf->type == type) in get_cacheinfo()
55 return this_leaf ? this_leaf->size : 0; in get_cache_size()
62 return this_leaf ? (this_leaf->ways_of_associativity << 16 | in get_cache_geometry()
[all …]
/OK3568_Linux_fs/kernel/arch/x86/kernel/cpu/
H A Dcacheinfo.c1 // SPDX-License-Identifier: GPL-2.0
6 * Venkatesh Pallipadi : Adding cache identification through cpuid(4)
35 short size; member
40 /* All the cache descriptor types we care about (no TLB or
41 trace cache entries) */
45 { 0x06, LVL_1_INST, 8 }, /* 4-way set assoc, 32 byte line size */
46 { 0x08, LVL_1_INST, 16 }, /* 4-way set assoc, 32 byte line size */
47 { 0x09, LVL_1_INST, 32 }, /* 4-way set assoc, 64 byte line size */
48 { 0x0a, LVL_1_DATA, 8 }, /* 2 way set assoc, 32 byte line size */
49 { 0x0c, LVL_1_DATA, 16 }, /* 4-way set assoc, 32 byte line size */
[all …]
/OK3568_Linux_fs/kernel/lib/
H A Dtest_kasan.c1 // SPDX-License-Identifier: GPL-2.0-only
43 * Temporarily enable multi-shot mode. Otherwise, KASAN would only report the
45 * hardware tag-based KASAN also allow tag checking to be reenabled for each
52 return -1; in kasan_test_init()
67 * KUNIT_EXPECT_KASAN_FAIL() - check that the executed expression produces a
72 * For hardware tag-based KASAN in sync mode, when a tag fault happens, tag
73 * checking is auto-disabled. When this happens, this test handler reenables
127 size_t size = 123; in kmalloc_oob_right() local
129 ptr = kmalloc(size, GFP_KERNEL); in kmalloc_oob_right()
132 KUNIT_EXPECT_KASAN_FAIL(test, ptr[size + OOB_TAG_OFF] = 'x'); in kmalloc_oob_right()
[all …]
/OK3568_Linux_fs/kernel/fs/squashfs/
H A Dfile.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Squashfs - a compressed read only filesystem for Linux
14 * compressed fragment block (tail-end packed block). The compressed size
19 * larger), the code implements an index cache that caches the mapping from
22 * The index cache allows Squashfs to handle large files (up to 1.75 TiB) while
23 * retaining a simple and space-efficient block list on disk. The cache
26 * The index cache is designed to be memory efficient, and by default uses
44 * Locate cache slot in range [offset, index] for specified inode. If
51 struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info; in locate_meta_index()
52 int i; in locate_meta_index() local
[all …]
/OK3568_Linux_fs/kernel/drivers/base/
H A Dcacheinfo.c1 // SPDX-License-Identifier: GPL-2.0
3 * cacheinfo support - processor cache information via sysfs
26 #define cache_leaves(cpu) (ci_cacheinfo(cpu)->num_leaves)
27 #define per_cpu_cacheinfo(cpu) (ci_cacheinfo(cpu)->info_list)
38 return sib_leaf->fw_token == this_leaf->fw_token; in cache_leaves_are_shared()
41 /* OF properties to query for a given cache type */
50 .size_prop = "cache-size",
51 .line_size_props = { "cache-line-size",
52 "cache-block-size", },
53 .nr_sets_prop = "cache-sets",
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/cpu/armv7m/
H A Dcache.c5 * SPDX-License-Identifier: GPL-2.0+
13 /* Cache maintenance operation registers */
48 INVALIDATE_POU, /* i-cache invalidate by address */
49 INVALIDATE_POC, /* d-cache invalidate by address */
50 INVALIDATE_SET_WAY, /* d-cache invalidate by sets/ways */
51 FLUSH_POU, /* d-cache clean by address to the PoU */
52 FLUSH_POC, /* d-cache clean by address to the PoC */
53 FLUSH_SET_WAY, /* d-cache clean by sets/ways */
54 FLUSH_INVAL_POC, /* d-cache clean & invalidate by addr to PoC */
55 FLUSH_INVAL_SET_WAY, /* d-cache clean & invalidate by set/ways */
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mm/
H A Dcache-v4wt.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/cache-v4wt.S
5 * Copyright (C) 1997-2002 Russell king
7 * ARMv4 write through cache operations support.
15 #include "proc-macros.S"
18 * The size of one data cache line.
23 * The number of data cache segments.
28 * The number of lines in a cache segment.
33 * This is the size at which it becomes more efficient to
34 * clean the whole cache, rather than using the individual
[all …]
/OK3568_Linux_fs/kernel/mm/
H A Dslab_common.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/cache.h>
82 * Determine the size of a slab object
86 return s->object_size; in kmem_cache_size()
91 static int kmem_cache_sanity_check(const char *name, unsigned int size) in kmem_cache_sanity_check() argument
93 if (!name || in_interrupt() || size > KMALLOC_MAX_SIZE) { in kmem_cache_sanity_check()
95 return -EINVAL; in kmem_cache_sanity_check()
102 static inline int kmem_cache_sanity_check(const char *name, unsigned int size) in kmem_cache_sanity_check() argument
110 size_t i; in __kmem_cache_free_bulk() local
112 for (i = 0; i < nr; i++) { in __kmem_cache_free_bulk()
[all …]

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