| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/thermal/ |
| H A D | zx2967-thermal.txt | 1 * ZTE zx2967 family Thermal 4 - compatible: should be one of the following. 5 * zte,zx296718-thermal 6 - reg: physical base address of the controller and length of memory mapped 8 - clocks : Pairs of phandle and specifier referencing the controller's clocks. 9 - clock-names: "topcrm" for the topcrm clock. 11 - #thermal-sensor-cells: must be 0. 13 Please note: slope coefficient defined in thermal-zones section need to be 19 compatible = "zte,zx296718-thermal"; 22 clock-names = "topcrm", "apb"; [all …]
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| H A D | thermal-zones.yaml | 1 # SPDX-License-Identifier: (GPL-2.0) 4 --- 5 $id: http://devicetree.org/schemas/thermal/thermal-zones.yaml# 6 $schema: http://devicetree.org/meta-schemas/base.yaml# 8 title: Thermal zone binding 11 - Amit Kucheria <amitk@kernel.org> 14 Thermal management is achieved in devicetree by describing the sensor hardware 15 and the software abstraction of cooling devices and thermal zones required to 16 take appropriate action to mitigate thermal overloads. 18 The following node types are used to completely describe a thermal management [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3588/ |
| H A D | rk3588.c | 4 * SPDX-License-Identifier: GPL-2.0+ 15 #include <dt-bindings/clock/rk3588-cru.h> 89 #define HDMIRX_NODE_FDT_PATH "/hdmirx-controller@fdee0000" 470 rk_clrsetreg(&pmu2_ioc->gpio0c_iomux_sel_h, in board_debug_uart_init() 480 rk_clrsetreg(&pmu1_ioc->gpio0b_iomux_sel_l, in board_debug_uart_init() 489 rk_clrsetreg(&bus_ioc->gpio4a_iomux_sel_h, in board_debug_uart_init() 492 rk_clrsetreg(&bus_ioc->gpio4a_iomux_sel_l, in board_debug_uart_init() 504 rk_clrsetreg(&bus_ioc->gpio2b_iomux_sel_h, in board_debug_uart_init() 513 rk_clrsetreg(&bus_ioc->gpio1b_iomux_sel_h, in board_debug_uart_init() 524 rk_clrsetreg(&pmu2_ioc->gpio0d_iomux_sel_l, in board_debug_uart_init() [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/microchip/ |
| H A D | sparx5.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/clock/microchip,sparx5.h> 12 interrupt-parent = <&gic>; 13 #address-cells = <2>; 14 #size-cells = <1>; 23 stdout-path = "serial0:115200n8"; 27 #address-cells = <2>; 28 #size-cells = <0>; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/qcom/ |
| H A D | msm8996.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/qcom,gcc-msm8996.h> 7 #include <dt-bindings/clock/qcom,mmcc-msm8996.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-bindings/soc/qcom,apr.h> 12 interrupt-parent = <&intc>; 14 #address-cells = <2>; 15 #size-cells = <2>; [all …]
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| H A D | sm8150.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/power/qcom-aoss-qmp.h> 9 #include <dt-bindings/power/qcom-rpmpd.h> 10 #include <dt-bindings/soc/qcom,rpmh-rsc.h> 11 #include <dt-bindings/clock/qcom,rpmh.h> 12 #include <dt-bindings/clock/qcom,gcc-sm8150.h> 13 #include <dt-bindings/clock/qcom,gpucc-sm8150.h> 14 #include <dt-bindings/interconnect/qcom,osm-l3.h> [all …]
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| H A D | msm8998.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/clock/qcom,gcc-msm8998.h> 6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h> 7 #include <dt-bindings/clock/qcom,rpmcc.h> 8 #include <dt-bindings/power/qcom-rpmpd.h> 9 #include <dt-bindings/gpio/gpio.h> 12 interrupt-parent = <&intc>; 14 qcom,msm-id = <292 0x0>; 16 #address-cells = <2>; [all …]
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| H A D | sdm845.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/qcom,camcc-sdm845.h> 9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 10 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h> 12 #include <dt-bindings/clock/qcom,lpass-sdm845.h> 13 #include <dt-bindings/clock/qcom,rpmh.h> 14 #include <dt-bindings/clock/qcom,videocc-sdm845.h> 15 #include <dt-bindings/interconnect/qcom,osm-l3.h> 16 #include <dt-bindings/interconnect/qcom,sdm845.h> [all …]
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| H A D | sm8250.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,gcc-sm8250.h> 8 #include <dt-bindings/clock/qcom,gpucc-sm8250.h> 9 #include <dt-bindings/clock/qcom,rpmh.h> 10 #include <dt-bindings/interconnect/qcom,osm-l3.h> 11 #include <dt-bindings/mailbox/qcom-ipcc.h> 12 #include <dt-bindings/power/qcom-aoss-qmp.h> 13 #include <dt-bindings/power/qcom-rpmpd.h> 14 #include <dt-bindings/soc/qcom,rpmh-rsc.h> [all …]
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| H A D | sc7180.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h> 9 #include <dt-bindings/clock/qcom,gcc-sc7180.h> 10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h> 11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h> 12 #include <dt-bindings/clock/qcom,rpmh.h> 13 #include <dt-bindings/clock/qcom,videocc-sc7180.h> 14 #include <dt-bindings/interconnect/qcom,osm-l3.h> 15 #include <dt-bindings/interconnect/qcom,sc7180.h> 16 #include <dt-bindings/interrupt-controller/arm-gic.h> [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/arm/ |
| H A D | juno-base.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "juno-clocks.dtsi" 3 #include "juno-motherboard.dtsi" 11 compatible = "arm,armv7-timer-mem"; 13 clock-frequency = <50000000>; 14 #address-cells = <1>; 15 #size-cells = <1>; 19 frame-number = <1>; 30 interrupt-names = "mhu_lpri_rx", 32 #mbox-cells = <1>; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/exynos/ |
| H A D | exynos7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/clock/exynos7-clk.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <2>; 16 #size-cells = <2>; 31 arm-pmu { 32 compatible = "arm,cortex-a57-pmu"; 37 interrupt-affinity = <&cpu_atlas0>, <&cpu_atlas1>, 43 compatible = "fixed-clock"; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | ste-dbx5x0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/mfd/dbx500-prcmu.h> 9 #include <dt-bindings/arm/ux500_pm_domains.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/thermal/thermal.h> 14 #address-cells = <1>; 15 #size-cells = <1>; 37 #address-cells = <1>; [all …]
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| H A D | sun8i-a83t.dtsi | 6 * This file is dual-licensed: you can use it either under the terms 45 #include <dt-bindings/interrupt-controller/arm-gic.h> 47 #include <dt-bindings/clock/sun8i-a83t-ccu.h> 48 #include <dt-bindings/clock/sun8i-de2.h> 49 #include <dt-bindings/clock/sun8i-r-ccu.h> 50 #include <dt-bindings/reset/sun8i-a83t-ccu.h> 51 #include <dt-bindings/reset/sun8i-de2.h> 52 #include <dt-bindings/reset/sun8i-r-ccu.h> 53 #include <dt-bindings/thermal/thermal.h> 56 interrupt-parent = <&gic>; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/socionext/ |
| H A D | uniphier-pxs3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 10 #include <dt-bindings/thermal/thermal.h> 13 compatible = "socionext,uniphier-pxs3"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <0>; [all …]
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| H A D | uniphier-ld20.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 10 #include <dt-bindings/thermal/thermal.h> 13 compatible = "socionext,uniphier-ld20"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 interrupt-parent = <&gic>; 19 #address-cells = <2>; [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | rk3368.dtsi | 4 * This file is dual-licensed: you can use it either under the terms 43 #include <dt-bindings/clock/rk3368-cru.h> 44 #include <dt-bindings/gpio/gpio.h> 45 #include <dt-bindings/interrupt-controller/irq.h> 46 #include <dt-bindings/interrupt-controller/arm-gic.h> 47 #include <dt-bindings/pinctrl/rockchip.h> 48 #include <dt-bindings/thermal/thermal.h> 49 #include <dt-bindings/memory/rk3368-dmc.h> 53 interrupt-parent = <&gic>; 54 #address-cells = <2>; [all …]
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| H A D | .rk3368-lion.dtb.dts.tmp | |
| H A D | .rk3368-geekbox.dtb.dts.tmp | |
| H A D | .rk3368-sheep.dtb.dts.tmp | |
| H A D | .rk3368-px5-evb.dtb.dts.tmp | |
| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3368.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3368-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/soc/rockchip,boot-mode.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/hisilicon/ |
| H A D | hi6220.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/reset/hisi,hi6220-resets.h> 10 #include <dt-bindings/clock/hi6220-clock.h> 11 #include <dt-bindings/pinctrl/hisi.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 21 compatible = "arm,psci-0.2"; [all …]
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| H A D | hi3660.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/hi3660-clock.h> 10 #include <dt-bindings/thermal/thermal.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <2>; 16 #size-cells = <2>; 19 compatible = "arm,psci-0.2"; 24 #address-cells = <2>; 25 #size-cells = <0>; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8173.dtsi | 14 #include <dt-bindings/clock/mt8173-clk.h> 15 #include <dt-bindings/interrupt-controller/irq.h> 16 #include <dt-bindings/interrupt-controller/arm-gic.h> 17 #include <dt-bindings/memory/mt8173-larb-port.h> 18 #include <dt-bindings/phy/phy.h> 19 #include <dt-bindings/power/mt8173-power.h> 20 #include <dt-bindings/reset/mt8173-resets.h> 21 #include <dt-bindings/gce/mt8173-gce.h> 22 #include <dt-bindings/thermal/thermal.h> 23 #include "mt8173-pinfunc.h" [all …]
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