Home
last modified time | relevance | path

Searched +full:active +full:- +full:high (Results 1 – 25 of 1099) sorted by relevance

12345678910>>...44

/OK3568_Linux_fs/kernel/arch/arm/mach-sa1100/include/mach/
H A Dh3xxx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
39 /* machine-specific gpios */
60 …CARD_RESET (H3XXX_EGPIO_BASE + 1) /* reset the attached pcmcia/compactflash card. active high. */
61 …e H3XXX_EGPIO_OPT_RESET (H3XXX_EGPIO_BASE + 2) /* reset the attached option pack. active high. */
62 #define H3XXX_EGPIO_CODEC_NRESET (H3XXX_EGPIO_BASE + 3) /* reset the onboard UDA1341. active low. …
63 …H3XXX_EGPIO_OPT_NVRAM_ON (H3XXX_EGPIO_BASE + 4) /* apply power to optionpack nvram, active high. */
64 #define H3XXX_EGPIO_OPT_ON (H3XXX_EGPIO_BASE + 5) /* full power to option pack. active high. */
65 #define H3XXX_EGPIO_LCD_ON (H3XXX_EGPIO_BASE + 6) /* enable 3.3V to LCD. active high. */
66 #define H3XXX_EGPIO_RS232_ON (H3XXX_EGPIO_BASE + 7) /* UART3 transceiver force on. Active high. */
69 #define H3600_EGPIO_LCD_PCI (H3XXX_EGPIO_BASE + 8) /* LCD control IC enable. active high. */
[all …]
/OK3568_Linux_fs/kernel/Documentation/fb/
H A Dviafb.modes10 # 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock)
21 # Active Time 25.422 us 15.253 ms
28 mode "640x480-60"
31 timings 39722 48 16 33 10 96 2 endmode mode "480x640-60"
35 # 640x480, 75 Hz, Non-Interlaced (31.50 MHz dotclock)
46 # Active Time 20.317 us 12.800 ms
52 mode "640x480-75"
56 # 640x480, 85 Hz, Non-Interlaced (36.000 MHz dotclock)
67 # Active Time 17.778 us 11.093 ms
73 mode "640x480-85"
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-socfpga/
H A Dfreeze_controller.c4 * SPDX-License-Identifier: GPL-2.0+
36 writel(SYSMGR_FRZCTRL_SRC_VIO1_ENUM_SW, &freeze_controller_base->src); in sys_mgr_frzctrl_freeze_req()
41 &freeze_controller_base->vioctrl + channel_id); in sys_mgr_frzctrl_freeze_req()
44 * Assert active low enrnsl, plniotri in sys_mgr_frzctrl_freeze_req()
55 * Assert active low bhniotri signal and de-assert in sys_mgr_frzctrl_freeze_req()
56 * active high csrdone in sys_mgr_frzctrl_freeze_req()
69 * Assert active low enrnsl, plniotri and in sys_mgr_frzctrl_freeze_req()
76 clrbits_le32(&freeze_controller_base->hioctrl, reg_cfg_mask); in sys_mgr_frzctrl_freeze_req()
79 * assert active low bhniotri & nfrzdrv signals, in sys_mgr_frzctrl_freeze_req()
80 * de-assert active high csrdone and assert in sys_mgr_frzctrl_freeze_req()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/bus/
H A Dnvidia,tegra20-gmi.txt4 external memory. Can be used to attach various high speed devices such as
10 - compatible : Should contain one of the following:
11 For Tegra20 must contain "nvidia,tegra20-gmi".
12 For Tegra30 must contain "nvidia,tegra30-gmi".
13 - reg: Should contain GMI controller registers location and length.
14 - clocks: Must contain an entry for each entry in clock-names.
15 - clock-names: Must include the following entries: "gmi"
16 - resets : Must contain an entry for each entry in reset-names.
17 - reset-names : Must include the following entries: "gmi"
18 - #address-cells: The number of cells used to represent physical base
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dtegra30-cardhu.dts1 /dts-v1/;
10 stdout-path = &uarta;
30 pcie-controller@00003000 {
34 avdd-pexb-supply = <&ldo1_reg>;
35 vdd-pexb-supply = <&ldo1_reg>;
36 avdd-pex-pll-supply = <&ldo1_reg>;
37 hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
38 vddio-pex-ctl-supply = <&sys_3v3_reg>;
39 avdd-plle-supply = <&ldo2_reg>;
42 nvidia,num-lanes = <4>;
[all …]
/OK3568_Linux_fs/kernel/Documentation/driver-api/gpio/
H A Dintro.rst16 - The descriptor-based interface is the preferred way to manipulate GPIOs,
17 and is described by all the files in this directory excepted gpio-legacy.txt.
18 - The legacy integer-based interface which is considered deprecated (but still
19 usable for compatibility reasons) is documented in gpio-legacy.txt.
21 The remainder of this document applies to the new descriptor-based interface.
22 gpio-legacy.txt contains the same information applied to the legacy
23 integer-based interface.
29 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
37 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
38 non-dedicated pin can be configured as a GPIO; and most chips have at least
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/sound/
H A Dtlv320adcx140.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Dan Murphy <dmurphy@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - const: ti,tlv320adc3140
29 - const: ti,tlv320adc5140
30 - const: ti,tlv320adc6140
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dtegra30-cardhu-a02.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-cardhu.dtsi"
10 compatible = "nvidia,cardhu-a02", "nvidia,cardhu", "nvidia,tegra30";
14 power-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
15 bus-width = <4>;
16 keep-power-in-suspend;
20 compatible = "regulator-fixed";
21 regulator-name = "vdd_ddr";
22 regulator-min-microvolt = <1500000>;
[all …]
H A Dtegra30-cardhu-a04.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-cardhu.dtsi"
5 #include "tegra30-cpu-opp.dtsi"
6 #include "tegra30-cpu-opp-microvolt.dtsi"
12 compatible = "nvidia,cardhu-a04", "nvidia,cardhu", "nvidia,tegra30";
16 power-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_HIGH>;
17 bus-width = <4>;
18 keep-power-in-suspend;
22 compatible = "regulator-fixed";
[all …]
H A Dtegra30-cardhu.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
13 * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
14 * tegra30-cardhu-a04.dts.
17 * The sticker will have number like 600-81291-1000-002 C.3. In this 4th
19 * The (downstream internal) U-Boot of Cardhu display the board-id as
40 stdout-path = "serial0:115200n8";
51 avdd-pexb-supply = <&ldo1_reg>;
52 vdd-pexb-supply = <&ldo1_reg>;
53 avdd-pex-pll-supply = <&ldo1_reg>;
[all …]
H A Dberlin2q-marvell-dmp.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2014 Antoine Ténart <antoine.tenart@free-electrons.com>
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
12 model = "Marvell BG2-Q DMP";
13 compatible = "marvell,berlin2q-dmp", "marvell,berlin2q", "marvell,berlin";
22 stdout-path = "serial0:115200n8";
26 compatible = "simple-bus";
27 #address-cells = <1>;
28 #size-cells = <0>;
[all …]
H A Dsun8i-s3-pinecube.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
6 /dts-v1/;
7 #include "sun8i-v3.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 compatible = "pine64,pinecube", "sochip,s3", "allwinner,sun8i-v3";
20 stdout-path = "serial0:115200n8";
24 compatible = "gpio-leds";
38 compatible = "regulator-fixed";
39 regulator-name = "vcc5v0";
[all …]
H A Dimx6-logicpd-baseboard.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 compatible = "gpio-keys";
13 debounce-interval = <10>;
14 wakeup-source;
21 debounce-interval = <10>;
22 wakeup-source;
29 debounce-interval = <10>;
30 wakeup-source;
37 debounce-interval = <10>;
38 wakeup-source;
[all …]
H A Dimx6dl-mamoj.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
14 compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl";
22 backlight_lcd: backlight-lcd {
23 compatible = "pwm-backlight";
24 pwms = <&pwm3 0 25000>; /* 25000ns -> 40kHz */
25 brightness-levels = <0 4 8 16 32 64 128 160 192 224 255>;
26 default-brightness-level = <7>;
30 compatible = "fsl,imx-parallel-display";
[all …]
H A Dkirkwood-synology.dtsi1 // SPDX-License-Identifier: GPL-2.0
12 pinctrl: pin-controller@10000 {
13 pmx_alarmled_12: pmx-alarmled-12 {
18 pmx_fanctrl_15: pmx-fanctrl-15 {
23 pmx_fanctrl_16: pmx-fanctrl-16 {
28 pmx_fanctrl_17: pmx-fanctrl-17 {
33 pmx_fanalarm_18: pmx-fanalarm-18 {
38 pmx_hddled_20: pmx-hddled-20 {
43 pmx_hddled_21: pmx-hddled-21 {
48 pmx_hddled_22: pmx-hddled-22 {
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/video/
H A Drockchip_mipidsi_lcd.txt1 Device-Tree bindings for rockchip mipi dsi lcd driver
4 - rockchip,screen_init: Whether you need this screen initialization.
8 - rockchip,dsi_lane: mipi lcd data lane number.
10 - rockchip,dsi_hs_clk: mipi lcd high speed clock.
12 - rockchip,mipi_dsi_num: mipi lcd dsi number.
14 - mipi_lcd_rst:mipi_lcd_rst: Should specify pin control groups used for reset this lcd.
16 - mipi_lcd_en:mipi_lcd_en: Should specify pin control groups used for enable this lcd.
18 - rockchip,gpios: gpio pin
20 - rockchip,delay: delay the millisecond.
22 - rockchip,cmd_debug : debug the cammands.
[all …]
/OK3568_Linux_fs/u-boot/drivers/video/
H A Dam335x-fb.h2 * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at> -
3 * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
5 * SPDX-License-Identifier: GPL-2.0+
30 * 0 = DE is low-active
31 * 1 = DE is high-active
34 * 0 = pix-clk is high-active
35 * 1 = pic-clk is low-active
38 * 0 = HSYNC is active high
42 * 0 = VSYNC is active high
43 * 1 = VSYNC is active low
[all …]
/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/video/
H A Ddisplay-timing.txt1 display-timing bindings
4 display-timings node
5 --------------------
8 - none
11 - native-mode: The native mode for the display, in case multiple modes are
15 --------------
18 - hactive, vactive: display resolution
19 - hfront-porch, hback-porch, hsync-len: horizontal display timing parameters
21 vfront-porch, vback-porch, vsync-len: vertical display timing parameters in
23 - clock-frequency: display clock in Hz
[all …]
H A Ddisplaymode.txt4 (from http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html)
7 - xres, yres: Display resolution
8 - left-margin, right-margin, hsync-len: Horizontal Display timing
10 - upper-margin, lower-margin, vsync-len: Vertical display timing
12 - clock: display clock in Hz
15 - width-mm, height-mm: Display dimensions in mm
16 - hsync-active-high (bool): Hsync pulse is active high
17 - vsync-active-high (bool): Vsync pulse is active high
18 - interlaced (bool): This is an interlaced mode
19 - doublescan (bool): This is a doublescan mode
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/iio/adc/
H A Dadi,ad7606.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Beniamin Bia <beniamin.bia@analog.com>
11 - Stefan Popa <stefan.popa@analog.com>
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7616.pdf
22 - adi,ad7605-4
23 - adi,ad7606-8
[all …]
/OK3568_Linux_fs/kernel/include/media/i2c/
H A Dtvp7002.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
6 * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
19 * struct tvp7002_config - Platform dependent data
21 * 0 - Data clocked out on rising edge of DATACLK signal
22 * 1 - Data clocked out on falling edge of DATACLK signal
24 * 0 - Active low HSYNC output, 1 - Active high HSYNC output
26 * 0 - Active low VSYNC output, 1 - Active high VSYNC output
27 *@fid_polarity: Active-high Field ID polarity.
28 * 0 - The field ID output is set to logic 1 for an odd field
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/i2c/
H A Dov7670.txt8 - compatible: should be "ovti,ov7670"
9 - clocks: reference to the xclk input clock.
10 - clock-names: should be "xclk".
13 - hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.
14 - vsync-active: active state of the VSYNC signal, 0/1 for LOW/HIGH respectively.
17 - reset-gpios: reference to the GPIO connected to the resetb pin, if any.
18 Active is low.
19 - powerdown-gpios: reference to the GPIO connected to the pwdn pin, if any.
20 Active is high.
21 - ov7670,pclk-hb-disable: a boolean property to suppress pixel clock output
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/
H A Dsff,sfp.txt1 Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP)
6 - compatible : must be one of
10 - i2c-bus : phandle of an I2C bus controller for the SFP two wire serial
15 - mod-def0-gpios : GPIO phandle and a specifier of the MOD-DEF0 (AKA Mod_ABS)
16 module presence input gpio signal, active (module absent) high. Must
19 - los-gpios : GPIO phandle and a specifier of the Receiver Loss of Signal
20 Indication input gpio signal, active (signal lost) high
22 - tx-fault-gpios : GPIO phandle and a specifier of the Module Transmitter
23 Fault input gpio signal, active (fault condition) high
25 - tx-disable-gpios : GPIO phandle and a specifier of the Transmitter Disable
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/regulator/
H A Dgpio-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/gpio-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Girdwood <lgirdwood@gmail.com>
11 - Mark Brown <broonie@kernel.org>
18 - $ref: "regulator.yaml#"
22 const: regulator-gpio
24 regulator-name: true
26 enable-gpios:
[all …]
/OK3568_Linux_fs/kernel/Documentation/firmware-guide/acpi/
H A Dgpio-properties.rst1 .. SPDX-License-Identifier: GPL-2.0
31 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
34 Package () {"reset-gpios", Package() {^BTH, 1, 1, 0 }},
35 Package () {"shutdown-gpios", Package() {^BTH, 0, 0, 0 }},
55 active low or high, the "active_low" argument can be used here. Setting
56 it to 1 marks the GPIO as active low.
61 In our Bluetooth example the "reset-gpios" refers to the second GpioIo()
74 Explicit x (no _DSD) as Pull Bias (Up == High, Down == Low),
75 assuming non-active (Polarity = !Pull Bias)
76 Down Low as low, assuming active
[all …]

12345678910>>...44