xref: /OK3568_Linux_fs/kernel/include/media/i2c/tvp7002.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
3*4882a593Smuzhiyun  * Digitizer with Horizontal PLL registers
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2009 Texas Instruments Inc
6*4882a593Smuzhiyun  * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * This code is partially based upon the TVP5150 driver
9*4882a593Smuzhiyun  * written by Mauro Carvalho Chehab <mchehab@kernel.org>,
10*4882a593Smuzhiyun  * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
11*4882a593Smuzhiyun  * and the TVP7002 driver in the TI LSP 2.10.00.14
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun #ifndef _TVP7002_H_
14*4882a593Smuzhiyun #define _TVP7002_H_
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define TVP7002_MODULE_NAME "tvp7002"
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun /**
19*4882a593Smuzhiyun  * struct tvp7002_config - Platform dependent data
20*4882a593Smuzhiyun  *@clk_polarity: Clock polarity
21*4882a593Smuzhiyun  *		0 - Data clocked out on rising edge of DATACLK signal
22*4882a593Smuzhiyun  *		1 - Data clocked out on falling edge of DATACLK signal
23*4882a593Smuzhiyun  *@hs_polarity:  HSYNC polarity
24*4882a593Smuzhiyun  *		0 - Active low HSYNC output, 1 - Active high HSYNC output
25*4882a593Smuzhiyun  *@vs_polarity: VSYNC Polarity
26*4882a593Smuzhiyun  *		0 - Active low VSYNC output, 1 - Active high VSYNC output
27*4882a593Smuzhiyun  *@fid_polarity: Active-high Field ID polarity.
28*4882a593Smuzhiyun  *		0 - The field ID output is set to logic 1 for an odd field
29*4882a593Smuzhiyun  *		    (field 1) and set to logic 0 for an even field (field 0).
30*4882a593Smuzhiyun  *		1 - Operation with polarity inverted.
31*4882a593Smuzhiyun  *@sog_polarity: Active high Sync on Green output polarity.
32*4882a593Smuzhiyun  *		0 - Normal operation, 1 - Operation with polarity inverted
33*4882a593Smuzhiyun  */
34*4882a593Smuzhiyun struct tvp7002_config {
35*4882a593Smuzhiyun 	bool clk_polarity;
36*4882a593Smuzhiyun 	bool hs_polarity;
37*4882a593Smuzhiyun 	bool vs_polarity;
38*4882a593Smuzhiyun 	bool fid_polarity;
39*4882a593Smuzhiyun 	bool sog_polarity;
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun #endif
42