xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/kirkwood-synology.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Nodes for Marvell 628x Synology devices
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Andrew Lunn <andrew@lunn.ch>
6*4882a593Smuzhiyun * Ben Peddell <klightspeed@killerwolves.net>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	ocp@f1000000 {
12*4882a593Smuzhiyun		pinctrl: pin-controller@10000 {
13*4882a593Smuzhiyun			pmx_alarmled_12: pmx-alarmled-12 {
14*4882a593Smuzhiyun				marvell,pins = "mpp12";
15*4882a593Smuzhiyun				marvell,function = "gpio";
16*4882a593Smuzhiyun			};
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun			pmx_fanctrl_15: pmx-fanctrl-15 {
19*4882a593Smuzhiyun				marvell,pins = "mpp15";
20*4882a593Smuzhiyun				marvell,function = "gpio";
21*4882a593Smuzhiyun			};
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun			pmx_fanctrl_16: pmx-fanctrl-16 {
24*4882a593Smuzhiyun				marvell,pins = "mpp16";
25*4882a593Smuzhiyun				marvell,function = "gpio";
26*4882a593Smuzhiyun			};
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun			pmx_fanctrl_17: pmx-fanctrl-17 {
29*4882a593Smuzhiyun				marvell,pins = "mpp17";
30*4882a593Smuzhiyun				marvell,function = "gpio";
31*4882a593Smuzhiyun			};
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun			pmx_fanalarm_18: pmx-fanalarm-18 {
34*4882a593Smuzhiyun				marvell,pins = "mpp18";
35*4882a593Smuzhiyun				marvell,function = "gpo";
36*4882a593Smuzhiyun			};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun			pmx_hddled_20: pmx-hddled-20 {
39*4882a593Smuzhiyun				marvell,pins = "mpp20";
40*4882a593Smuzhiyun				marvell,function = "gpio";
41*4882a593Smuzhiyun			};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun			pmx_hddled_21: pmx-hddled-21 {
44*4882a593Smuzhiyun				marvell,pins = "mpp21";
45*4882a593Smuzhiyun				marvell,function = "gpio";
46*4882a593Smuzhiyun			};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun			pmx_hddled_22: pmx-hddled-22 {
49*4882a593Smuzhiyun				marvell,pins = "mpp22";
50*4882a593Smuzhiyun				marvell,function = "gpio";
51*4882a593Smuzhiyun			};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun			pmx_hddled_23: pmx-hddled-23 {
54*4882a593Smuzhiyun				marvell,pins = "mpp23";
55*4882a593Smuzhiyun				marvell,function = "gpio";
56*4882a593Smuzhiyun			};
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun			pmx_hddled_24: pmx-hddled-24 {
59*4882a593Smuzhiyun				marvell,pins = "mpp24";
60*4882a593Smuzhiyun				marvell,function = "gpio";
61*4882a593Smuzhiyun			};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun			pmx_hddled_25: pmx-hddled-25 {
64*4882a593Smuzhiyun				marvell,pins = "mpp25";
65*4882a593Smuzhiyun				marvell,function = "gpio";
66*4882a593Smuzhiyun			};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun			pmx_hddled_26: pmx-hddled-26 {
69*4882a593Smuzhiyun				marvell,pins = "mpp26";
70*4882a593Smuzhiyun				marvell,function = "gpio";
71*4882a593Smuzhiyun			};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun			pmx_hddled_27: pmx-hddled-27 {
74*4882a593Smuzhiyun				marvell,pins = "mpp27";
75*4882a593Smuzhiyun				marvell,function = "gpio";
76*4882a593Smuzhiyun			};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun			pmx_hddled_28: pmx-hddled-28 {
79*4882a593Smuzhiyun				marvell,pins = "mpp28";
80*4882a593Smuzhiyun				marvell,function = "gpio";
81*4882a593Smuzhiyun			};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun			pmx_hdd1_pwr_29: pmx-hdd1-pwr-29 {
84*4882a593Smuzhiyun				marvell,pins = "mpp29";
85*4882a593Smuzhiyun				marvell,function = "gpio";
86*4882a593Smuzhiyun			};
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun			pmx_hdd1_pwr_30: pmx-hdd-pwr-30 {
89*4882a593Smuzhiyun				marvell,pins = "mpp30";
90*4882a593Smuzhiyun				marvell,function = "gpio";
91*4882a593Smuzhiyun			};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun			pmx_hdd2_pwr_31: pmx-hdd2-pwr-31 {
94*4882a593Smuzhiyun				marvell,pins = "mpp31";
95*4882a593Smuzhiyun				marvell,function = "gpio";
96*4882a593Smuzhiyun			};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun			pmx_fanctrl_32: pmx-fanctrl-32 {
99*4882a593Smuzhiyun				marvell,pins = "mpp32";
100*4882a593Smuzhiyun				marvell,function = "gpio";
101*4882a593Smuzhiyun			};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun			pmx_fanctrl_33: pmx-fanctrl-33 {
104*4882a593Smuzhiyun				marvell,pins = "mpp33";
105*4882a593Smuzhiyun				marvell,function = "gpo";
106*4882a593Smuzhiyun			};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun			pmx_fanctrl_34: pmx-fanctrl-34 {
109*4882a593Smuzhiyun				marvell,pins = "mpp34";
110*4882a593Smuzhiyun				marvell,function = "gpio";
111*4882a593Smuzhiyun			};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun			pmx_hdd2_pwr_34: pmx-hdd2-pwr-34 {
114*4882a593Smuzhiyun				marvell,pins = "mpp34";
115*4882a593Smuzhiyun				marvell,function = "gpio";
116*4882a593Smuzhiyun			};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun			pmx_fanalarm_35: pmx-fanalarm-35 {
119*4882a593Smuzhiyun				marvell,pins = "mpp35";
120*4882a593Smuzhiyun				marvell,function = "gpio";
121*4882a593Smuzhiyun			};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun			pmx_hddled_36: pmx-hddled-36 {
124*4882a593Smuzhiyun				marvell,pins = "mpp36";
125*4882a593Smuzhiyun				marvell,function = "gpio";
126*4882a593Smuzhiyun			};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun			pmx_hddled_37: pmx-hddled-37 {
129*4882a593Smuzhiyun				marvell,pins = "mpp37";
130*4882a593Smuzhiyun				marvell,function = "gpio";
131*4882a593Smuzhiyun			};
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun			pmx_hddled_38: pmx-hddled-38 {
134*4882a593Smuzhiyun				marvell,pins = "mpp38";
135*4882a593Smuzhiyun				marvell,function = "gpio";
136*4882a593Smuzhiyun			};
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun			pmx_hddled_39: pmx-hddled-39 {
139*4882a593Smuzhiyun				marvell,pins = "mpp39";
140*4882a593Smuzhiyun				marvell,function = "gpio";
141*4882a593Smuzhiyun			};
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun			pmx_hddled_40: pmx-hddled-40 {
144*4882a593Smuzhiyun				marvell,pins = "mpp40";
145*4882a593Smuzhiyun				marvell,function = "gpio";
146*4882a593Smuzhiyun			};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun			pmx_hddled_41: pmx-hddled-41 {
149*4882a593Smuzhiyun				marvell,pins = "mpp41";
150*4882a593Smuzhiyun				marvell,function = "gpio";
151*4882a593Smuzhiyun			};
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun			pmx_hddled_42: pmx-hddled-42 {
154*4882a593Smuzhiyun				marvell,pins = "mpp42";
155*4882a593Smuzhiyun				marvell,function = "gpio";
156*4882a593Smuzhiyun			};
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun			pmx_hddled_43: pmx-hddled-43 {
159*4882a593Smuzhiyun				marvell,pins = "mpp43";
160*4882a593Smuzhiyun				marvell,function = "gpio";
161*4882a593Smuzhiyun			};
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun			pmx_hddled_44: pmx-hddled-44 {
164*4882a593Smuzhiyun				marvell,pins = "mpp44";
165*4882a593Smuzhiyun				marvell,function = "gpio";
166*4882a593Smuzhiyun			};
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun			pmx_hddled_45: pmx-hddled-45 {
169*4882a593Smuzhiyun				marvell,pins = "mpp45";
170*4882a593Smuzhiyun				marvell,function = "gpio";
171*4882a593Smuzhiyun			};
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun			pmx_hdd3_pwr_44: pmx-hdd3-pwr-44 {
174*4882a593Smuzhiyun				marvell,pins = "mpp44";
175*4882a593Smuzhiyun				marvell,function = "gpio";
176*4882a593Smuzhiyun			};
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun			pmx_hdd4_pwr_45: pmx-hdd4-pwr-45 {
179*4882a593Smuzhiyun				marvell,pins = "mpp45";
180*4882a593Smuzhiyun				marvell,function = "gpio";
181*4882a593Smuzhiyun			};
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun			pmx_fanalarm_44: pmx-fanalarm-44 {
184*4882a593Smuzhiyun				marvell,pins = "mpp44";
185*4882a593Smuzhiyun				marvell,function = "gpio";
186*4882a593Smuzhiyun			};
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun			pmx_fanalarm_45: pmx-fanalarm-45 {
189*4882a593Smuzhiyun				marvell,pins = "mpp45";
190*4882a593Smuzhiyun				marvell,function = "gpio";
191*4882a593Smuzhiyun			};
192*4882a593Smuzhiyun		};
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun		rtc@10300 {
195*4882a593Smuzhiyun			status = "disabled";
196*4882a593Smuzhiyun		};
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun		spi@10600 {
199*4882a593Smuzhiyun			status = "okay";
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun			m25p80@0 {
202*4882a593Smuzhiyun				#address-cells = <1>;
203*4882a593Smuzhiyun				#size-cells = <1>;
204*4882a593Smuzhiyun				compatible = "st,m25p80", "jedec,spi-nor";
205*4882a593Smuzhiyun				reg = <0>;
206*4882a593Smuzhiyun				spi-max-frequency = <20000000>;
207*4882a593Smuzhiyun				mode = <0>;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun				partition@0 {
210*4882a593Smuzhiyun					reg = <0x00000000 0x00080000>;
211*4882a593Smuzhiyun					label = "RedBoot";
212*4882a593Smuzhiyun				};
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun				partition@80000 {
215*4882a593Smuzhiyun					reg = <0x00080000 0x00200000>;
216*4882a593Smuzhiyun					label = "zImage";
217*4882a593Smuzhiyun				};
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun				partition@280000 {
220*4882a593Smuzhiyun					reg = <0x00280000 0x00140000>;
221*4882a593Smuzhiyun					label = "rd.gz";
222*4882a593Smuzhiyun				};
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun				partition@3c0000 {
225*4882a593Smuzhiyun					reg = <0x003c0000 0x00010000>;
226*4882a593Smuzhiyun					label = "vendor";
227*4882a593Smuzhiyun				};
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun				partition@3d0000 {
230*4882a593Smuzhiyun					reg = <0x003d0000 0x00020000>;
231*4882a593Smuzhiyun					label = "RedBoot config";
232*4882a593Smuzhiyun				};
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun				partition@3f0000 {
235*4882a593Smuzhiyun					reg = <0x003f0000 0x00010000>;
236*4882a593Smuzhiyun					label = "FIS directory";
237*4882a593Smuzhiyun				};
238*4882a593Smuzhiyun			};
239*4882a593Smuzhiyun		};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun		i2c@11000 {
242*4882a593Smuzhiyun			status = "okay";
243*4882a593Smuzhiyun			clock-frequency = <400000>;
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun			rs5c372: rs5c372@32 {
246*4882a593Smuzhiyun				status = "disabled";
247*4882a593Smuzhiyun				compatible = "ricoh,rs5c372a";
248*4882a593Smuzhiyun				reg = <0x32>;
249*4882a593Smuzhiyun			};
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun			s35390a: s35390a@30 {
252*4882a593Smuzhiyun				status = "disabled";
253*4882a593Smuzhiyun				compatible = "sii,s35390a";
254*4882a593Smuzhiyun				reg = <0x30>;
255*4882a593Smuzhiyun			};
256*4882a593Smuzhiyun		};
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun		serial@12000 {
259*4882a593Smuzhiyun			status = "okay";
260*4882a593Smuzhiyun		};
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun		serial@12100 {
263*4882a593Smuzhiyun			status = "okay";
264*4882a593Smuzhiyun		};
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun		poweroff@12100 {
267*4882a593Smuzhiyun			compatible = "synology,power-off";
268*4882a593Smuzhiyun			reg = <0x12100 0x100>;
269*4882a593Smuzhiyun			clocks = <&gate_clk 7>;
270*4882a593Smuzhiyun		};
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun		sata@80000 {
273*4882a593Smuzhiyun			pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
274*4882a593Smuzhiyun			pinctrl-names = "default";
275*4882a593Smuzhiyun			status = "okay";
276*4882a593Smuzhiyun			nr-ports = <2>;
277*4882a593Smuzhiyun		};
278*4882a593Smuzhiyun	};
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun	gpio-fan-150-32-35 {
281*4882a593Smuzhiyun		status = "disabled";
282*4882a593Smuzhiyun		compatible = "gpio-fan";
283*4882a593Smuzhiyun		pinctrl-0 = <&pmx_fanctrl_32 &pmx_fanctrl_33 &pmx_fanctrl_34
284*4882a593Smuzhiyun		             &pmx_fanalarm_35>;
285*4882a593Smuzhiyun		pinctrl-names = "default";
286*4882a593Smuzhiyun		gpios = <&gpio1 0 GPIO_ACTIVE_HIGH
287*4882a593Smuzhiyun			 &gpio1 1 GPIO_ACTIVE_HIGH
288*4882a593Smuzhiyun			 &gpio1 2 GPIO_ACTIVE_HIGH>;
289*4882a593Smuzhiyun		gpio-fan,speed-map = <    0 0
290*4882a593Smuzhiyun				       2200 1
291*4882a593Smuzhiyun				       2500 2
292*4882a593Smuzhiyun				       3000 4
293*4882a593Smuzhiyun				       3300 3
294*4882a593Smuzhiyun				       3700 5
295*4882a593Smuzhiyun				       3800 6
296*4882a593Smuzhiyun				       4200 7 >;
297*4882a593Smuzhiyun	};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun	gpio-fan-150-15-18 {
300*4882a593Smuzhiyun		status = "disabled";
301*4882a593Smuzhiyun		compatible = "gpio-fan";
302*4882a593Smuzhiyun		pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17
303*4882a593Smuzhiyun		             &pmx_fanalarm_18>;
304*4882a593Smuzhiyun		pinctrl-names = "default";
305*4882a593Smuzhiyun		gpios = <&gpio0 15 GPIO_ACTIVE_HIGH
306*4882a593Smuzhiyun			 &gpio0 16 GPIO_ACTIVE_HIGH
307*4882a593Smuzhiyun			 &gpio0 17 GPIO_ACTIVE_HIGH>;
308*4882a593Smuzhiyun		alarm-gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
309*4882a593Smuzhiyun		gpio-fan,speed-map = <    0 0
310*4882a593Smuzhiyun				       2200 1
311*4882a593Smuzhiyun				       2500 2
312*4882a593Smuzhiyun				       3000 4
313*4882a593Smuzhiyun				       3300 3
314*4882a593Smuzhiyun				       3700 5
315*4882a593Smuzhiyun				       3800 6
316*4882a593Smuzhiyun				       4200 7 >;
317*4882a593Smuzhiyun	};
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun	gpio-fan-100-32-35 {
320*4882a593Smuzhiyun		status = "disabled";
321*4882a593Smuzhiyun		compatible = "gpio-fan";
322*4882a593Smuzhiyun		pinctrl-0 = <&pmx_fanctrl_32 &pmx_fanctrl_33 &pmx_fanctrl_34
323*4882a593Smuzhiyun		             &pmx_fanalarm_35>;
324*4882a593Smuzhiyun		pinctrl-names = "default";
325*4882a593Smuzhiyun		gpios = <&gpio1 0 GPIO_ACTIVE_HIGH
326*4882a593Smuzhiyun			 &gpio1 1 GPIO_ACTIVE_HIGH
327*4882a593Smuzhiyun			 &gpio1 2 GPIO_ACTIVE_HIGH>;
328*4882a593Smuzhiyun		alarm-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
329*4882a593Smuzhiyun		gpio-fan,speed-map = <    0 0
330*4882a593Smuzhiyun				       2500 1
331*4882a593Smuzhiyun				       3100 2
332*4882a593Smuzhiyun				       3800 3
333*4882a593Smuzhiyun				       4600 4
334*4882a593Smuzhiyun				       4800 5
335*4882a593Smuzhiyun				       4900 6
336*4882a593Smuzhiyun				       5000 7 >;
337*4882a593Smuzhiyun	};
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun	gpio-fan-100-15-18 {
340*4882a593Smuzhiyun		status = "disabled";
341*4882a593Smuzhiyun		compatible = "gpio-fan";
342*4882a593Smuzhiyun		pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17
343*4882a593Smuzhiyun		             &pmx_fanalarm_18>;
344*4882a593Smuzhiyun		pinctrl-names = "default";
345*4882a593Smuzhiyun		gpios = <&gpio0 15 GPIO_ACTIVE_HIGH
346*4882a593Smuzhiyun			 &gpio0 16 GPIO_ACTIVE_HIGH
347*4882a593Smuzhiyun			 &gpio0 17 GPIO_ACTIVE_HIGH>;
348*4882a593Smuzhiyun		alarm-gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
349*4882a593Smuzhiyun		gpio-fan,speed-map = <    0 0
350*4882a593Smuzhiyun				       2500 1
351*4882a593Smuzhiyun				       3100 2
352*4882a593Smuzhiyun				       3800 3
353*4882a593Smuzhiyun				       4600 4
354*4882a593Smuzhiyun				       4800 5
355*4882a593Smuzhiyun				       4900 6
356*4882a593Smuzhiyun				       5000 7 >;
357*4882a593Smuzhiyun	};
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun	gpio-fan-100-15-35-1 {
360*4882a593Smuzhiyun		status = "disabled";
361*4882a593Smuzhiyun		compatible = "gpio-fan";
362*4882a593Smuzhiyun		pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17
363*4882a593Smuzhiyun		             &pmx_fanalarm_35>;
364*4882a593Smuzhiyun		pinctrl-names = "default";
365*4882a593Smuzhiyun		gpios = <&gpio0 15 GPIO_ACTIVE_HIGH
366*4882a593Smuzhiyun			 &gpio0 16 GPIO_ACTIVE_HIGH
367*4882a593Smuzhiyun			 &gpio0 17 GPIO_ACTIVE_HIGH>;
368*4882a593Smuzhiyun		alarm-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
369*4882a593Smuzhiyun		gpio-fan,speed-map = <    0 0
370*4882a593Smuzhiyun				       2500 1
371*4882a593Smuzhiyun				       3100 2
372*4882a593Smuzhiyun				       3800 3
373*4882a593Smuzhiyun				       4600 4
374*4882a593Smuzhiyun				       4800 5
375*4882a593Smuzhiyun				       4900 6
376*4882a593Smuzhiyun				       5000 7 >;
377*4882a593Smuzhiyun	};
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun	gpio-fan-100-15-35-3 {
380*4882a593Smuzhiyun		status = "disabled";
381*4882a593Smuzhiyun		compatible = "gpio-fan";
382*4882a593Smuzhiyun		pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17
383*4882a593Smuzhiyun		             &pmx_fanalarm_35 &pmx_fanalarm_44 &pmx_fanalarm_45>;
384*4882a593Smuzhiyun		pinctrl-names = "default";
385*4882a593Smuzhiyun		gpios = <&gpio0 15 GPIO_ACTIVE_HIGH
386*4882a593Smuzhiyun			 &gpio0 16 GPIO_ACTIVE_HIGH
387*4882a593Smuzhiyun			 &gpio0 17 GPIO_ACTIVE_HIGH>;
388*4882a593Smuzhiyun		alarm-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH
389*4882a593Smuzhiyun			       &gpio1 12 GPIO_ACTIVE_HIGH
390*4882a593Smuzhiyun			       &gpio1 13 GPIO_ACTIVE_HIGH>;
391*4882a593Smuzhiyun		gpio-fan,speed-map = <    0 0
392*4882a593Smuzhiyun				       2500 1
393*4882a593Smuzhiyun				       3100 2
394*4882a593Smuzhiyun				       3800 3
395*4882a593Smuzhiyun				       4600 4
396*4882a593Smuzhiyun				       4800 5
397*4882a593Smuzhiyun				       4900 6
398*4882a593Smuzhiyun				       5000 7 >;
399*4882a593Smuzhiyun	};
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun	gpio-leds-alarm-12 {
402*4882a593Smuzhiyun		status = "disabled";
403*4882a593Smuzhiyun		compatible = "gpio-leds";
404*4882a593Smuzhiyun		pinctrl-0 = <&pmx_alarmled_12>;
405*4882a593Smuzhiyun		pinctrl-names = "default";
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun		hdd1-green {
408*4882a593Smuzhiyun			label = "synology:alarm";
409*4882a593Smuzhiyun			gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
410*4882a593Smuzhiyun		};
411*4882a593Smuzhiyun	};
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun	gpio-leds-hdd-20 {
414*4882a593Smuzhiyun		status = "disabled";
415*4882a593Smuzhiyun		compatible = "gpio-leds";
416*4882a593Smuzhiyun		pinctrl-0 = <&pmx_hddled_20 &pmx_hddled_21 &pmx_hddled_22
417*4882a593Smuzhiyun			     &pmx_hddled_23 &pmx_hddled_24 &pmx_hddled_25
418*4882a593Smuzhiyun			     &pmx_hddled_26 &pmx_hddled_27>;
419*4882a593Smuzhiyun		pinctrl-names = "default";
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun		hdd1-green {
422*4882a593Smuzhiyun			label = "synology:green:hdd1";
423*4882a593Smuzhiyun			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
424*4882a593Smuzhiyun		};
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun		hdd1-amber {
427*4882a593Smuzhiyun			label = "synology:amber:hdd1";
428*4882a593Smuzhiyun			gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
429*4882a593Smuzhiyun		};
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun		hdd2-green {
432*4882a593Smuzhiyun			label = "synology:green:hdd2";
433*4882a593Smuzhiyun			gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
434*4882a593Smuzhiyun		};
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun		hdd2-amber {
437*4882a593Smuzhiyun			label = "synology:amber:hdd2";
438*4882a593Smuzhiyun			gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
439*4882a593Smuzhiyun		};
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun		hdd3-green {
442*4882a593Smuzhiyun			label = "synology:green:hdd3";
443*4882a593Smuzhiyun			gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
444*4882a593Smuzhiyun		};
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun		hdd3-amber {
447*4882a593Smuzhiyun			label = "synology:amber:hdd3";
448*4882a593Smuzhiyun			gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
449*4882a593Smuzhiyun		};
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun		hdd4-green {
452*4882a593Smuzhiyun			label = "synology:green:hdd4";
453*4882a593Smuzhiyun			gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
454*4882a593Smuzhiyun		};
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun		hdd4-amber {
457*4882a593Smuzhiyun			label = "synology:amber:hdd4";
458*4882a593Smuzhiyun			gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
459*4882a593Smuzhiyun		};
460*4882a593Smuzhiyun	};
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun	gpio-leds-hdd-21-1 {
463*4882a593Smuzhiyun		status = "disabled";
464*4882a593Smuzhiyun		compatible = "gpio-leds";
465*4882a593Smuzhiyun		pinctrl-0 = <&pmx_hddled_21 &pmx_hddled_23>;
466*4882a593Smuzhiyun		pinctrl-names = "default";
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun		hdd1-green {
469*4882a593Smuzhiyun			label = "synology:green:hdd1";
470*4882a593Smuzhiyun			gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
471*4882a593Smuzhiyun		};
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun		hdd1-amber {
474*4882a593Smuzhiyun			label = "synology:amber:hdd1";
475*4882a593Smuzhiyun			gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
476*4882a593Smuzhiyun		};
477*4882a593Smuzhiyun	};
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun	gpio-leds-hdd-21-2 {
480*4882a593Smuzhiyun		status = "disabled";
481*4882a593Smuzhiyun		compatible = "gpio-leds";
482*4882a593Smuzhiyun		pinctrl-0 = <&pmx_hddled_21 &pmx_hddled_23 &pmx_hddled_20 &pmx_hddled_22>;
483*4882a593Smuzhiyun		pinctrl-names = "default";
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun		hdd1-green {
486*4882a593Smuzhiyun			label = "synology:green:hdd1";
487*4882a593Smuzhiyun			gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
488*4882a593Smuzhiyun		};
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun		hdd1-amber {
491*4882a593Smuzhiyun			label = "synology:amber:hdd1";
492*4882a593Smuzhiyun			gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
493*4882a593Smuzhiyun		};
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun		hdd2-green {
496*4882a593Smuzhiyun			label = "synology:green:hdd2";
497*4882a593Smuzhiyun			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
498*4882a593Smuzhiyun		};
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun		hdd2-amber {
501*4882a593Smuzhiyun			label = "synology:amber:hdd2";
502*4882a593Smuzhiyun			gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
503*4882a593Smuzhiyun		};
504*4882a593Smuzhiyun	};
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun	gpio-leds-hdd-36 {
507*4882a593Smuzhiyun		status = "disabled";
508*4882a593Smuzhiyun		compatible = "gpio-leds";
509*4882a593Smuzhiyun		pinctrl-0 = <&pmx_hddled_36 &pmx_hddled_37 &pmx_hddled_38
510*4882a593Smuzhiyun			     &pmx_hddled_39 &pmx_hddled_40 &pmx_hddled_41
511*4882a593Smuzhiyun			     &pmx_hddled_42 &pmx_hddled_43 &pmx_hddled_44
512*4882a593Smuzhiyun			     &pmx_hddled_45>;
513*4882a593Smuzhiyun		pinctrl-names = "default";
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun		hdd1-green {
516*4882a593Smuzhiyun			label = "synology:green:hdd1";
517*4882a593Smuzhiyun			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
518*4882a593Smuzhiyun		};
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun		hdd1-amber {
521*4882a593Smuzhiyun			label = "synology:amber:hdd1";
522*4882a593Smuzhiyun			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
523*4882a593Smuzhiyun		};
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun		hdd2-green {
526*4882a593Smuzhiyun			label = "synology:green:hdd2";
527*4882a593Smuzhiyun			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
528*4882a593Smuzhiyun		};
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun		hdd2-amber {
531*4882a593Smuzhiyun			label = "synology:amber:hdd2";
532*4882a593Smuzhiyun			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
533*4882a593Smuzhiyun		};
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun		hdd3-green {
536*4882a593Smuzhiyun			label = "synology:green:hdd3";
537*4882a593Smuzhiyun			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
538*4882a593Smuzhiyun		};
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun		hdd3-amber {
541*4882a593Smuzhiyun			label = "synology:amber:hdd3";
542*4882a593Smuzhiyun			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
543*4882a593Smuzhiyun		};
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun		hdd4-green {
546*4882a593Smuzhiyun			label = "synology:green:hdd4";
547*4882a593Smuzhiyun			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
548*4882a593Smuzhiyun		};
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun		hdd4-amber {
551*4882a593Smuzhiyun			label = "synology:amber:hdd4";
552*4882a593Smuzhiyun			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
553*4882a593Smuzhiyun		};
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun		hdd5-green {
556*4882a593Smuzhiyun			label = "synology:green:hdd5";
557*4882a593Smuzhiyun			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
558*4882a593Smuzhiyun		};
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun		hdd5-amber {
561*4882a593Smuzhiyun			label = "synology:amber:hdd5";
562*4882a593Smuzhiyun			gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
563*4882a593Smuzhiyun		};
564*4882a593Smuzhiyun	};
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun	gpio-leds-hdd-38 {
567*4882a593Smuzhiyun		status = "disabled";
568*4882a593Smuzhiyun		compatible = "gpio-leds";
569*4882a593Smuzhiyun		pinctrl-0 = <&pmx_hddled_38 &pmx_hddled_39 &pmx_hddled_36 &pmx_hddled_37>;
570*4882a593Smuzhiyun		pinctrl-names = "default";
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun		hdd1-green {
573*4882a593Smuzhiyun			label = "synology:green:hdd1";
574*4882a593Smuzhiyun			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
575*4882a593Smuzhiyun		};
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun		hdd1-amber {
578*4882a593Smuzhiyun			label = "synology:amber:hdd1";
579*4882a593Smuzhiyun			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
580*4882a593Smuzhiyun		};
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun		hdd2-green {
583*4882a593Smuzhiyun			label = "synology:green:hdd2";
584*4882a593Smuzhiyun			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
585*4882a593Smuzhiyun		};
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun		hdd2-amber {
588*4882a593Smuzhiyun			label = "synology:amber:hdd2";
589*4882a593Smuzhiyun			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
590*4882a593Smuzhiyun		};
591*4882a593Smuzhiyun	};
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun	regulators-hdd-29 {
594*4882a593Smuzhiyun		status = "disabled";
595*4882a593Smuzhiyun		compatible = "simple-bus";
596*4882a593Smuzhiyun		#address-cells = <1>;
597*4882a593Smuzhiyun		#size-cells = <0>;
598*4882a593Smuzhiyun		pinctrl-0 = <&pmx_hdd1_pwr_29 &pmx_hdd2_pwr_31>;
599*4882a593Smuzhiyun		pinctrl-names = "default";
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun		regulator@1 {
602*4882a593Smuzhiyun			compatible = "regulator-fixed";
603*4882a593Smuzhiyun			reg = <1>;
604*4882a593Smuzhiyun			regulator-name = "hdd1power";
605*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
606*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
607*4882a593Smuzhiyun			enable-active-high;
608*4882a593Smuzhiyun			regulator-always-on;
609*4882a593Smuzhiyun			regulator-boot-on;
610*4882a593Smuzhiyun			startup-delay-us = <5000000>;
611*4882a593Smuzhiyun			gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
612*4882a593Smuzhiyun		};
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun		regulator@2 {
615*4882a593Smuzhiyun			compatible = "regulator-fixed";
616*4882a593Smuzhiyun			reg = <2>;
617*4882a593Smuzhiyun			regulator-name = "hdd2power";
618*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
619*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
620*4882a593Smuzhiyun			enable-active-high;
621*4882a593Smuzhiyun			regulator-always-on;
622*4882a593Smuzhiyun			regulator-boot-on;
623*4882a593Smuzhiyun			startup-delay-us = <5000000>;
624*4882a593Smuzhiyun			gpio = <&gpio0 31 GPIO_ACTIVE_HIGH>;
625*4882a593Smuzhiyun		};
626*4882a593Smuzhiyun	};
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun	regulators-hdd-30-1 {
629*4882a593Smuzhiyun		status = "disabled";
630*4882a593Smuzhiyun		compatible = "simple-bus";
631*4882a593Smuzhiyun		#address-cells = <1>;
632*4882a593Smuzhiyun		#size-cells = <0>;
633*4882a593Smuzhiyun		pinctrl-0 = <&pmx_hdd1_pwr_30>;
634*4882a593Smuzhiyun		pinctrl-names = "default";
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun		regulator@1 {
637*4882a593Smuzhiyun			compatible = "regulator-fixed";
638*4882a593Smuzhiyun			reg = <1>;
639*4882a593Smuzhiyun			regulator-name = "hdd1power";
640*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
641*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
642*4882a593Smuzhiyun			enable-active-high;
643*4882a593Smuzhiyun			regulator-always-on;
644*4882a593Smuzhiyun			regulator-boot-on;
645*4882a593Smuzhiyun			startup-delay-us = <5000000>;
646*4882a593Smuzhiyun			gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>;
647*4882a593Smuzhiyun		};
648*4882a593Smuzhiyun	};
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun	regulators-hdd-30-2 {
651*4882a593Smuzhiyun		status = "disabled";
652*4882a593Smuzhiyun		compatible = "simple-bus";
653*4882a593Smuzhiyun		#address-cells = <1>;
654*4882a593Smuzhiyun		#size-cells = <0>;
655*4882a593Smuzhiyun		pinctrl-0 = <&pmx_hdd1_pwr_30 &pmx_hdd2_pwr_34>;
656*4882a593Smuzhiyun		pinctrl-names = "default";
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun		regulator@1 {
659*4882a593Smuzhiyun			compatible = "regulator-fixed";
660*4882a593Smuzhiyun			reg = <1>;
661*4882a593Smuzhiyun			regulator-name = "hdd1power";
662*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
663*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
664*4882a593Smuzhiyun			enable-active-high;
665*4882a593Smuzhiyun			regulator-always-on;
666*4882a593Smuzhiyun			regulator-boot-on;
667*4882a593Smuzhiyun			startup-delay-us = <5000000>;
668*4882a593Smuzhiyun			gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>;
669*4882a593Smuzhiyun		};
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun		regulator@2 {
672*4882a593Smuzhiyun			compatible = "regulator-fixed";
673*4882a593Smuzhiyun			reg = <2>;
674*4882a593Smuzhiyun			regulator-name = "hdd2power";
675*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
676*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
677*4882a593Smuzhiyun			enable-active-high;
678*4882a593Smuzhiyun			regulator-always-on;
679*4882a593Smuzhiyun			regulator-boot-on;
680*4882a593Smuzhiyun			startup-delay-us = <5000000>;
681*4882a593Smuzhiyun			gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
682*4882a593Smuzhiyun		};
683*4882a593Smuzhiyun	};
684*4882a593Smuzhiyun
685*4882a593Smuzhiyun	regulators-hdd-30-4 {
686*4882a593Smuzhiyun		status = "disabled";
687*4882a593Smuzhiyun		compatible = "simple-bus";
688*4882a593Smuzhiyun		#address-cells = <1>;
689*4882a593Smuzhiyun		#size-cells = <0>;
690*4882a593Smuzhiyun		pinctrl-0 = <&pmx_hdd1_pwr_30 &pmx_hdd2_pwr_34
691*4882a593Smuzhiyun			     &pmx_hdd3_pwr_44 &pmx_hdd4_pwr_45>;
692*4882a593Smuzhiyun		pinctrl-names = "default";
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun		regulator@1 {
695*4882a593Smuzhiyun			compatible = "regulator-fixed";
696*4882a593Smuzhiyun			reg = <1>;
697*4882a593Smuzhiyun			regulator-name = "hdd1power";
698*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
699*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
700*4882a593Smuzhiyun			enable-active-high;
701*4882a593Smuzhiyun			regulator-always-on;
702*4882a593Smuzhiyun			regulator-boot-on;
703*4882a593Smuzhiyun			startup-delay-us = <5000000>;
704*4882a593Smuzhiyun			gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>;
705*4882a593Smuzhiyun		};
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun		regulator@2 {
708*4882a593Smuzhiyun			compatible = "regulator-fixed";
709*4882a593Smuzhiyun			reg = <2>;
710*4882a593Smuzhiyun			regulator-name = "hdd2power";
711*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
712*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
713*4882a593Smuzhiyun			enable-active-high;
714*4882a593Smuzhiyun			regulator-always-on;
715*4882a593Smuzhiyun			regulator-boot-on;
716*4882a593Smuzhiyun			startup-delay-us = <5000000>;
717*4882a593Smuzhiyun			gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
718*4882a593Smuzhiyun		};
719*4882a593Smuzhiyun
720*4882a593Smuzhiyun		regulator@3 {
721*4882a593Smuzhiyun			compatible = "regulator-fixed";
722*4882a593Smuzhiyun			reg = <3>;
723*4882a593Smuzhiyun			regulator-name = "hdd3power";
724*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
725*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
726*4882a593Smuzhiyun			enable-active-high;
727*4882a593Smuzhiyun			regulator-always-on;
728*4882a593Smuzhiyun			regulator-boot-on;
729*4882a593Smuzhiyun			startup-delay-us = <5000000>;
730*4882a593Smuzhiyun			gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
731*4882a593Smuzhiyun		};
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun		regulator@4 {
734*4882a593Smuzhiyun			compatible = "regulator-fixed";
735*4882a593Smuzhiyun			reg = <4>;
736*4882a593Smuzhiyun			regulator-name = "hdd4power";
737*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
738*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
739*4882a593Smuzhiyun			enable-active-high;
740*4882a593Smuzhiyun			regulator-always-on;
741*4882a593Smuzhiyun			regulator-boot-on;
742*4882a593Smuzhiyun			startup-delay-us = <5000000>;
743*4882a593Smuzhiyun			gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
744*4882a593Smuzhiyun		};
745*4882a593Smuzhiyun	};
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun	regulators-hdd-31 {
748*4882a593Smuzhiyun		status = "disabled";
749*4882a593Smuzhiyun		compatible = "simple-bus";
750*4882a593Smuzhiyun		#address-cells = <1>;
751*4882a593Smuzhiyun		#size-cells = <0>;
752*4882a593Smuzhiyun		pinctrl-0 = <&pmx_hdd2_pwr_31>;
753*4882a593Smuzhiyun		pinctrl-names = "default";
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun		regulator@1 {
756*4882a593Smuzhiyun			compatible = "regulator-fixed";
757*4882a593Smuzhiyun			reg = <1>;
758*4882a593Smuzhiyun			regulator-name = "hdd2power";
759*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
760*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
761*4882a593Smuzhiyun			enable-active-high;
762*4882a593Smuzhiyun			regulator-always-on;
763*4882a593Smuzhiyun			regulator-boot-on;
764*4882a593Smuzhiyun			startup-delay-us = <5000000>;
765*4882a593Smuzhiyun			gpio = <&gpio0 31 GPIO_ACTIVE_HIGH>;
766*4882a593Smuzhiyun		};
767*4882a593Smuzhiyun	};
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun	regulators-hdd-34 {
770*4882a593Smuzhiyun		status = "disabled";
771*4882a593Smuzhiyun		compatible = "simple-bus";
772*4882a593Smuzhiyun		#address-cells = <1>;
773*4882a593Smuzhiyun		#size-cells = <0>;
774*4882a593Smuzhiyun		pinctrl-0 = <&pmx_hdd2_pwr_34 &pmx_hdd3_pwr_44
775*4882a593Smuzhiyun			     &pmx_hdd4_pwr_45>;
776*4882a593Smuzhiyun		pinctrl-names = "default";
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun		regulator@2 {
779*4882a593Smuzhiyun			compatible = "regulator-fixed";
780*4882a593Smuzhiyun			reg = <2>;
781*4882a593Smuzhiyun			regulator-name = "hdd2power";
782*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
783*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
784*4882a593Smuzhiyun			enable-active-high;
785*4882a593Smuzhiyun			regulator-always-on;
786*4882a593Smuzhiyun			regulator-boot-on;
787*4882a593Smuzhiyun			startup-delay-us = <5000000>;
788*4882a593Smuzhiyun			gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
789*4882a593Smuzhiyun		};
790*4882a593Smuzhiyun
791*4882a593Smuzhiyun		regulator@3 {
792*4882a593Smuzhiyun			compatible = "regulator-fixed";
793*4882a593Smuzhiyun			reg = <3>;
794*4882a593Smuzhiyun			regulator-name = "hdd3power";
795*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
796*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
797*4882a593Smuzhiyun			enable-active-high;
798*4882a593Smuzhiyun			regulator-always-on;
799*4882a593Smuzhiyun			regulator-boot-on;
800*4882a593Smuzhiyun			startup-delay-us = <5000000>;
801*4882a593Smuzhiyun			gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
802*4882a593Smuzhiyun		};
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun		regulator@4 {
805*4882a593Smuzhiyun			compatible = "regulator-fixed";
806*4882a593Smuzhiyun			reg = <4>;
807*4882a593Smuzhiyun			regulator-name = "hdd4power";
808*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
809*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
810*4882a593Smuzhiyun			enable-active-high;
811*4882a593Smuzhiyun			regulator-always-on;
812*4882a593Smuzhiyun			regulator-boot-on;
813*4882a593Smuzhiyun			startup-delay-us = <5000000>;
814*4882a593Smuzhiyun			gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
815*4882a593Smuzhiyun		};
816*4882a593Smuzhiyun	};
817*4882a593Smuzhiyun};
818*4882a593Smuzhiyun
819*4882a593Smuzhiyun&mdio {
820*4882a593Smuzhiyun	status = "okay";
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun	ethphy0: ethernet-phy@0 {
823*4882a593Smuzhiyun		device_type = "ethernet-phy";
824*4882a593Smuzhiyun		reg = <8>;
825*4882a593Smuzhiyun	};
826*4882a593Smuzhiyun
827*4882a593Smuzhiyun	ethphy1: ethernet-phy@1 {
828*4882a593Smuzhiyun		device_type = "ethernet-phy";
829*4882a593Smuzhiyun		reg = <9>;
830*4882a593Smuzhiyun	};
831*4882a593Smuzhiyun};
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun&eth0 {
834*4882a593Smuzhiyun	status = "okay";
835*4882a593Smuzhiyun
836*4882a593Smuzhiyun	ethernet0-port@0 {
837*4882a593Smuzhiyun		phy-handle = <&ethphy0>;
838*4882a593Smuzhiyun	};
839*4882a593Smuzhiyun};
840*4882a593Smuzhiyun
841*4882a593Smuzhiyun&eth1 {
842*4882a593Smuzhiyun	status = "disabled";
843*4882a593Smuzhiyun
844*4882a593Smuzhiyun	ethernet1-port@0 {
845*4882a593Smuzhiyun		phy-handle = <&ethphy1>;
846*4882a593Smuzhiyun	};
847*4882a593Smuzhiyun};
848*4882a593Smuzhiyun
849*4882a593Smuzhiyun&pciec {
850*4882a593Smuzhiyun        status = "okay";
851*4882a593Smuzhiyun};
852*4882a593Smuzhiyun
853*4882a593Smuzhiyun&pcie0 {
854*4882a593Smuzhiyun	status = "okay";
855*4882a593Smuzhiyun};
856