xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/tegra30-cardhu-a04.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/dts-v1/;
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun#include "tegra30-cardhu.dtsi"
5*4882a593Smuzhiyun#include "tegra30-cpu-opp.dtsi"
6*4882a593Smuzhiyun#include "tegra30-cpu-opp-microvolt.dtsi"
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/* This dts file support the cardhu A04 and later versions of board */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	model = "NVIDIA Tegra30 Cardhu A04 (A05, A06, A07) evaluation board";
12*4882a593Smuzhiyun	compatible = "nvidia,cardhu-a04", "nvidia,cardhu", "nvidia,tegra30";
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun	mmc@78000400 {
15*4882a593Smuzhiyun		status = "okay";
16*4882a593Smuzhiyun		power-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_HIGH>;
17*4882a593Smuzhiyun		bus-width = <4>;
18*4882a593Smuzhiyun		keep-power-in-suspend;
19*4882a593Smuzhiyun	};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	ddr_reg: regulator@100 {
22*4882a593Smuzhiyun		compatible = "regulator-fixed";
23*4882a593Smuzhiyun		regulator-name = "ddr";
24*4882a593Smuzhiyun		regulator-min-microvolt = <1500000>;
25*4882a593Smuzhiyun		regulator-max-microvolt = <1500000>;
26*4882a593Smuzhiyun		regulator-always-on;
27*4882a593Smuzhiyun		regulator-boot-on;
28*4882a593Smuzhiyun		enable-active-high;
29*4882a593Smuzhiyun		gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
30*4882a593Smuzhiyun	};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun	sys_3v3_reg: regulator@101 {
33*4882a593Smuzhiyun		compatible = "regulator-fixed";
34*4882a593Smuzhiyun		regulator-name = "sys_3v3";
35*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
36*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
37*4882a593Smuzhiyun		regulator-always-on;
38*4882a593Smuzhiyun		regulator-boot-on;
39*4882a593Smuzhiyun		enable-active-high;
40*4882a593Smuzhiyun		gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
41*4882a593Smuzhiyun	};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun	usb1_vbus_reg: regulator@102 {
44*4882a593Smuzhiyun		compatible = "regulator-fixed";
45*4882a593Smuzhiyun		regulator-name = "usb1_vbus";
46*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
47*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
48*4882a593Smuzhiyun		enable-active-high;
49*4882a593Smuzhiyun		gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>;
50*4882a593Smuzhiyun		gpio-open-drain;
51*4882a593Smuzhiyun		vin-supply = <&vdd_5v0_reg>;
52*4882a593Smuzhiyun	};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun	usb3_vbus_reg: regulator@103 {
55*4882a593Smuzhiyun		compatible = "regulator-fixed";
56*4882a593Smuzhiyun		regulator-name = "usb3_vbus";
57*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
58*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
59*4882a593Smuzhiyun		enable-active-high;
60*4882a593Smuzhiyun		gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
61*4882a593Smuzhiyun		gpio-open-drain;
62*4882a593Smuzhiyun		vin-supply = <&vdd_5v0_reg>;
63*4882a593Smuzhiyun	};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun	vdd_5v0_reg: regulator@104 {
66*4882a593Smuzhiyun		compatible = "regulator-fixed";
67*4882a593Smuzhiyun		regulator-name = "5v0";
68*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
69*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
70*4882a593Smuzhiyun		enable-active-high;
71*4882a593Smuzhiyun		gpio = <&pmic 8 GPIO_ACTIVE_HIGH>;
72*4882a593Smuzhiyun	};
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun	vdd_bl_reg: regulator@105 {
75*4882a593Smuzhiyun		compatible = "regulator-fixed";
76*4882a593Smuzhiyun		regulator-name = "vdd_bl";
77*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
78*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
79*4882a593Smuzhiyun		regulator-always-on;
80*4882a593Smuzhiyun		regulator-boot-on;
81*4882a593Smuzhiyun		enable-active-high;
82*4882a593Smuzhiyun		gpio = <&gpio TEGRA_GPIO(DD, 2) GPIO_ACTIVE_HIGH>;
83*4882a593Smuzhiyun	};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun	vdd_bl2_reg: regulator@106 {
86*4882a593Smuzhiyun		compatible = "regulator-fixed";
87*4882a593Smuzhiyun		regulator-name = "vdd_bl2";
88*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
89*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
90*4882a593Smuzhiyun		regulator-always-on;
91*4882a593Smuzhiyun		regulator-boot-on;
92*4882a593Smuzhiyun		enable-active-high;
93*4882a593Smuzhiyun		gpio = <&gpio TEGRA_GPIO(DD, 0) GPIO_ACTIVE_HIGH>;
94*4882a593Smuzhiyun	};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun	i2c@7000d000 {
97*4882a593Smuzhiyun		pmic: tps65911@2d {
98*4882a593Smuzhiyun			regulators {
99*4882a593Smuzhiyun				vddctrl_reg: vddctrl {
100*4882a593Smuzhiyun					regulator-min-microvolt = <800000>;
101*4882a593Smuzhiyun					regulator-max-microvolt = <1125000>;
102*4882a593Smuzhiyun					regulator-coupled-with = <&vddcore_reg>;
103*4882a593Smuzhiyun					regulator-coupled-max-spread = <300000>;
104*4882a593Smuzhiyun					regulator-max-step-microvolt = <100000>;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun					nvidia,tegra-cpu-regulator;
107*4882a593Smuzhiyun				};
108*4882a593Smuzhiyun			};
109*4882a593Smuzhiyun		};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun		vddcore_reg: tps62361@60 {
112*4882a593Smuzhiyun			regulator-coupled-with = <&vddctrl_reg>;
113*4882a593Smuzhiyun			regulator-coupled-max-spread = <300000>;
114*4882a593Smuzhiyun			regulator-max-step-microvolt = <100000>;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun			nvidia,tegra-core-regulator;
117*4882a593Smuzhiyun		};
118*4882a593Smuzhiyun	};
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun	cpus {
121*4882a593Smuzhiyun		cpu0: cpu@0 {
122*4882a593Smuzhiyun			cpu-supply = <&vddctrl_reg>;
123*4882a593Smuzhiyun			operating-points-v2 = <&cpu0_opp_table>;
124*4882a593Smuzhiyun		};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun		cpu@1 {
127*4882a593Smuzhiyun			cpu-supply = <&vddctrl_reg>;
128*4882a593Smuzhiyun			operating-points-v2 = <&cpu0_opp_table>;
129*4882a593Smuzhiyun		};
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun		cpu@2 {
132*4882a593Smuzhiyun			cpu-supply = <&vddctrl_reg>;
133*4882a593Smuzhiyun			operating-points-v2 = <&cpu0_opp_table>;
134*4882a593Smuzhiyun		};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun		cpu@3 {
137*4882a593Smuzhiyun			cpu-supply = <&vddctrl_reg>;
138*4882a593Smuzhiyun			operating-points-v2 = <&cpu0_opp_table>;
139*4882a593Smuzhiyun		};
140*4882a593Smuzhiyun	};
141*4882a593Smuzhiyun};
142