1*4882a593Smuzhiyun* Omnivision OV7670 CMOS sensor 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe Omnivision OV7670 sensor supports multiple resolutions output, such as 4*4882a593SmuzhiyunCIF, SVGA, UXGA. It also can support the YUV422/420, RGB565/555 or raw RGB 5*4882a593Smuzhiyunoutput formats. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired Properties: 8*4882a593Smuzhiyun- compatible: should be "ovti,ov7670" 9*4882a593Smuzhiyun- clocks: reference to the xclk input clock. 10*4882a593Smuzhiyun- clock-names: should be "xclk". 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunRequired Endpoint Properties: 13*4882a593Smuzhiyun- hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively. 14*4882a593Smuzhiyun- vsync-active: active state of the VSYNC signal, 0/1 for LOW/HIGH respectively. 15*4882a593Smuzhiyun 16*4882a593SmuzhiyunOptional Properties: 17*4882a593Smuzhiyun- reset-gpios: reference to the GPIO connected to the resetb pin, if any. 18*4882a593Smuzhiyun Active is low. 19*4882a593Smuzhiyun- powerdown-gpios: reference to the GPIO connected to the pwdn pin, if any. 20*4882a593Smuzhiyun Active is high. 21*4882a593Smuzhiyun- ov7670,pclk-hb-disable: a boolean property to suppress pixel clock output 22*4882a593Smuzhiyun signal during horizontal blankings. 23*4882a593Smuzhiyun 24*4882a593SmuzhiyunThe device node must contain one 'port' child node with one 'endpoint' child 25*4882a593Smuzhiyunsub-node for its digital output video port, in accordance with the video 26*4882a593Smuzhiyuninterface bindings defined in: 27*4882a593SmuzhiyunDocumentation/devicetree/bindings/media/video-interfaces.txt. 28*4882a593Smuzhiyun 29*4882a593SmuzhiyunExample: 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun i2c1: i2c@f0018000 { 32*4882a593Smuzhiyun ov7670: camera@21 { 33*4882a593Smuzhiyun compatible = "ovti,ov7670"; 34*4882a593Smuzhiyun reg = <0x21>; 35*4882a593Smuzhiyun pinctrl-names = "default"; 36*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_pck0_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>; 37*4882a593Smuzhiyun reset-gpios = <&pioE 11 GPIO_ACTIVE_LOW>; 38*4882a593Smuzhiyun powerdown-gpios = <&pioE 13 GPIO_ACTIVE_HIGH>; 39*4882a593Smuzhiyun clocks = <&pck0>; 40*4882a593Smuzhiyun clock-names = "xclk"; 41*4882a593Smuzhiyun assigned-clocks = <&pck0>; 42*4882a593Smuzhiyun assigned-clock-rates = <25000000>; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun ov7670,pclk-hb-disable; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun port { 47*4882a593Smuzhiyun ov7670_0: endpoint { 48*4882a593Smuzhiyun hsync-active = <0>; 49*4882a593Smuzhiyun vsync-active = <0>; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun remote-endpoint = <&isi_0>; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun }; 56