Home
last modified time | relevance | path

Searched defs:reg (Results 1 – 25 of 757) sorted by relevance

12345678910>>...31

/rk3399_rockchip-uboot/arch/arm/include/asm/
H A Darm32_macros.S8 .macro read_midr reg argument
12 .macro read_ctr reg argument
16 .macro read_mpidr reg argument
20 .macro read_sctlr reg argument
24 .macro write_sctlr reg argument
28 .macro write_actlr reg argument
32 .macro read_actlr reg argument
36 .macro write_cpacr reg argument
40 .macro read_cpacr reg argument
44 .macro read_scr reg argument
[all …]
/rk3399_rockchip-uboot/drivers/video/drm/
H A Danalogix_dp_reg.c37 static void analogix_dp_write(struct analogix_dp_device *dp, u32 reg, u32 val) in analogix_dp_write()
44 static u32 analogix_dp_read(struct analogix_dp_device *dp, u32 reg) in analogix_dp_read()
53 u32 reg; in analogix_dp_enable_video_mute() local
68 u32 reg; in analogix_dp_stop_video() local
77 u32 i, reg = 0; in analogix_dp_set_lane_map() local
87 u32 reg; in analogix_dp_init_analog_param() local
143 u32 reg; in analogix_dp_reset() local
193 u32 reg; in analogix_dp_config_interrupt() local
214 u32 reg; in analogix_dp_mute_hpd_interrupt() local
228 u32 reg; in analogix_dp_unmute_hpd_interrupt() local
[all …]
/rk3399_rockchip-uboot/drivers/video/exynos/
H A Dexynos_dp_lowlevel.c25 unsigned int reg; in exynos_dp_enable_video_input() local
42 unsigned int reg; in exynos_dp_enable_video_bist() local
58 unsigned int reg; in exynos_dp_enable_video_mute() local
73 unsigned int reg; in exynos_dp_init_analog_param() local
176 unsigned int reg; in exynos_dp_enable_sw_func() local
192 unsigned int reg; in exynos_dp_set_analog_power_down() local
245 unsigned int reg; in exynos_dp_get_pll_lock_status() local
258 unsigned int reg; in exynos_dp_set_pll_power() local
273 unsigned int reg; in exynos_dp_init_analog_func() local
322 unsigned int reg; in exynos_dp_init_hpd() local
[all …]
H A Dexynos_mipi_dsi_lowlevel.c21 unsigned int reg; in exynos_mipi_dsi_func_reset() local
35 unsigned int reg = 0; in exynos_mipi_dsi_sw_reset() local
52 unsigned int reg = readl(&mipi_dsim->intsrc); in exynos_mipi_dsi_sw_release() local
64 unsigned int reg = readl(&mipi_dsim->intmsk); in exynos_mipi_dsi_set_interrupt_mask() local
77 unsigned int reg; in exynos_mipi_dsi_init_fifo_pointer() local
105 unsigned int reg; in exynos_mipi_dsi_set_main_disp_resol() local
124 unsigned int reg; in exynos_mipi_dsi_set_main_disp_vporch() local
142 unsigned int reg; in exynos_mipi_dsi_set_main_disp_hporch() local
157 unsigned int reg; in exynos_mipi_dsi_set_main_disp_sync_area() local
173 unsigned int reg; in exynos_mipi_dsi_set_sub_disp_resol() local
[all …]
/rk3399_rockchip-uboot/arch/x86/cpu/quark/
H A Dmsg_port.c12 void msg_port_setup(int op, int port, int reg) in msg_port_setup()
19 u32 msg_port_read(u8 port, u32 reg) in msg_port_read()
31 void msg_port_write(u8 port, u32 reg, u32 value) in msg_port_write()
39 u32 msg_port_alt_read(u8 port, u32 reg) in msg_port_alt_read()
51 void msg_port_alt_write(u8 port, u32 reg, u32 value) in msg_port_alt_write()
59 u32 msg_port_io_read(u8 port, u32 reg) in msg_port_io_read()
71 void msg_port_io_write(u8 port, u32 reg, u32 value) in msg_port_io_write()
/rk3399_rockchip-uboot/arch/x86/include/asm/arch-quark/
H A Dmsg_port.h109 #define msg_port_generic_clrsetbits(type, port, reg, clr, set) \ argument
114 #define msg_port_clrbits(port, reg, clr) \ argument
116 #define msg_port_setbits(port, reg, set) \ argument
118 #define msg_port_clrsetbits(port, reg, clr, set) \ argument
121 #define msg_port_alt_clrbits(port, reg, clr) \ argument
123 #define msg_port_alt_setbits(port, reg, set) \ argument
125 #define msg_port_alt_clrsetbits(port, reg, clr, set) \ argument
128 #define msg_port_io_clrbits(port, reg, clr) \ argument
130 #define msg_port_io_setbits(port, reg, set) \ argument
132 #define msg_port_io_clrsetbits(port, reg, clr, set) \ argument
/rk3399_rockchip-uboot/arch/arm/mach-socfpga/
H A Dclock_manager_gen5.c322 u32 reg, clock; in cm_get_main_vco_clk_hz() local
337 u32 reg, clock = 0; in cm_get_per_vco_clk_hz() local
362 u32 reg, clock; in cm_get_mpu_clk_hz() local
376 u32 reg, clock = 0; in cm_get_sdram_clk_hz() local
407 u32 reg, clock = 0; in cm_get_l4_sp_clk_hz() local
441 u32 reg, clock = 0; in cm_get_mmc_controller_clk_hz() local
471 u32 reg, clock = 0; in cm_get_qspi_controller_clk_hz() local
499 u32 reg, clock = 0; in cm_get_spi_controller_clk_hz() local
/rk3399_rockchip-uboot/arch/arm/mach-imx/mx6/
H A Dclock.c30 u32 reg; in enable_ocotp_clk() local
84 u32 reg; in enable_usboh3_clk() local
157 u32 reg; in enable_i2c_clk() local
197 u32 reg; in enable_spi_clk() local
311 u32 reg, freq; in get_mcu_main_clk() local
323 u32 reg, div = 0, freq = 0; in get_periph_clk() local
373 u32 reg, ipg_podf; in get_ipg_clk() local
384 u32 reg, perclk_podf; in get_ipg_per_clk() local
400 u32 reg, uart_podf; in get_uart_clk() local
418 u32 reg, cspi_podf; in get_cspi_clk() local
[all …]
/rk3399_rockchip-uboot/drivers/misc/
H A Dsmsc_sio1007.c12 static inline u8 sio1007_read(int port, int reg) in sio1007_read()
19 static inline void sio1007_write(int port, int reg, int val) in sio1007_write()
25 static inline void sio1007_clrsetbits(int port, int reg, u8 clr, u8 set) in sio1007_clrsetbits()
70 int reg = GPIO0_DIR; in sio1007_gpio_config() local
93 int reg = GPIO0_DATA; in sio1007_gpio_get_value() local
112 int reg = GPIO0_DATA; in sio1007_gpio_set_value() local
/rk3399_rockchip-uboot/drivers/power/power_delivery/
H A Dtcpci.c20 #define tcpc_presenting_cc1_rd(reg) \ argument
24 #define tcpc_presenting_cc2_rd(reg) \ argument
53 static int tcpci_read16(struct tcpci *tcpci, unsigned int reg, u16 *val) in tcpci_read16()
70 static int tcpci_block_read(struct tcpci *tcpci, unsigned int reg, in tcpci_block_read()
83 static int tcpci_write16(struct tcpci *tcpci, unsigned int reg, u16 val) in tcpci_write16()
98 static int tcpci_block_write(struct tcpci *tcpci, unsigned int reg, in tcpci_block_write()
114 unsigned int reg; in tcpci_set_cc() local
164 unsigned int reg = TCPC_ROLE_CTRL_DRP; in tcpci_start_toggling() local
226 unsigned int reg, role_control; in tcpci_get_cc() local
252 unsigned int reg; in tcpci_set_polarity() local
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-imx/mx7ulp/
H A Dpcc.c86 u32 reg, val; in pcc_clock_enable() local
116 u32 reg, val, i, clksrc_type; in pcc_clock_sel() local
165 u32 reg, val; in pcc_clock_div_config() local
201 u32 reg, val; in pcc_clock_is_enable() local
217 u32 reg, val, clksrc_type; in pcc_clock_get_clksrc() local
258 u32 reg, val, rate, frac, div; in pcc_clock_get_rate() local
H A Dscg.c21 u32 reg; in scg_src_get_rate() local
57 u32 reg, val, rate; in scg_sircdiv_get_rate() local
95 u32 reg, val, rate; in scg_fircdiv_get_rate() local
133 u32 reg, val, rate; in scg_soscdiv_get_rate() local
171 u32 reg, val, rate; in scg_apll_pfd_get_rate() local
221 u32 reg, val, rate; in scg_spll_pfd_get_rate() local
271 u32 reg, val, rate; in scg_apll_get_rate() local
299 u32 reg, val, rate; in scg_spll_get_rate() local
334 u32 reg, val, rate, div; in scg_ddr_get_rate() local
358 u32 reg, val, rate; in scg_nic_get_rate() local
[all …]
/rk3399_rockchip-uboot/board/freescale/t208xrdb/
H A Dcpld.c13 u8 cpld_read(unsigned int reg) in cpld_read()
20 void cpld_write(unsigned int reg, u8 value) in cpld_write()
30 u8 reg = CPLD_READ(flash_csr); in cpld_set_altbank() local
40 u8 reg = CPLD_READ(flash_csr); in cpld_set_defbank() local
/rk3399_rockchip-uboot/board/freescale/ls1043ardb/
H A Dcpld.c14 u8 cpld_read(unsigned int reg) in cpld_read()
21 void cpld_write(unsigned int reg, u8 value) in cpld_write()
31 u16 reg = CPLD_CFG_RCW_SRC_NOR; in cpld_set_altbank() local
53 u16 reg = CPLD_CFG_RCW_SRC_NOR; in cpld_set_defbank() local
72 u16 reg = CPLD_CFG_RCW_SRC_NAND; in cpld_set_nand() local
88 u16 reg = CPLD_CFG_RCW_SRC_SD; in cpld_set_sd() local
/rk3399_rockchip-uboot/arch/arm/mach-tegra/
H A Dpinmux-common.c145 u32 *reg = _R(APB_MISC_PP_PINMUX_GLOBAL_0); in pinmux_set_tristate_input_clamping() local
152 u32 *reg = _R(APB_MISC_PP_PINMUX_GLOBAL_0); in pinmux_clear_tristate_input_clamping() local
160 u32 *reg = MUX_REG(pin); in pinmux_set_func() local
192 u32 *reg = PULL_REG(pin); in pinmux_set_pullupdown() local
207 u32 *reg = TRI_REG(pin); in pinmux_set_tristate() local
235 u32 *reg = REG(pin); in pinmux_set_io() local
257 u32 *reg = REG(pin); in pinmux_set_lock() local
284 u32 *reg = REG(pin); in pinmux_set_od() local
309 u32 *reg = REG(pin); in pinmux_set_ioreset() local
334 u32 *reg = REG(pin); in pinmux_set_rcv_sel() local
[all …]
/rk3399_rockchip-uboot/board/freescale/t102xrdb/
H A Dcpld.c16 u8 cpld_read(unsigned int reg) in cpld_read()
23 void cpld_write(unsigned int reg, u8 value) in cpld_write()
35 u8 reg = CPLD_READ(flash_csr); in cpld_set_altbank() local
48 u8 reg = CPLD_READ(flash_csr); in cpld_set_defbank() local
/rk3399_rockchip-uboot/board/freescale/t104xrdb/
H A Dcpld.c20 u8 cpld_read(unsigned int reg) in cpld_read()
27 void cpld_write(unsigned int reg, u8 value) in cpld_write()
39 u8 reg = CPLD_READ(flash_ctl_status); in cpld_set_altbank() local
52 u8 reg = CPLD_READ(flash_ctl_status); in cpld_set_defbank() local
/rk3399_rockchip-uboot/board/micronas/vct/
H A Dtop.c14 u32 reg; member
29 TOP_PINMUX_t reg; in top_read_pin() local
68 static void top_write_pin(int pin, TOP_PINMUX_t reg) in top_write_pin()
102 TOP_PINMUX_t reg; in top_set_pin() local
125 TOP_PINMUX_t reg; in top_set_pin() local
/rk3399_rockchip-uboot/drivers/mmc/
H A Dbcm2835_sdhci.c65 int reg) in bcm2835_sdhci_raw_writel()
86 static inline u32 bcm2835_sdhci_raw_readl(struct sdhci_host *host, int reg) in bcm2835_sdhci_raw_readl()
91 static void bcm2835_sdhci_writel(struct sdhci_host *host, u32 val, int reg) in bcm2835_sdhci_writel()
96 static void bcm2835_sdhci_writew(struct sdhci_host *host, u16 val, int reg) in bcm2835_sdhci_writew()
112 static void bcm2835_sdhci_writeb(struct sdhci_host *host, u8 val, int reg) in bcm2835_sdhci_writeb()
123 static u32 bcm2835_sdhci_readl(struct sdhci_host *host, int reg) in bcm2835_sdhci_readl()
130 static u16 bcm2835_sdhci_readw(struct sdhci_host *host, int reg) in bcm2835_sdhci_readw()
140 static u8 bcm2835_sdhci_readb(struct sdhci_host *host, int reg) in bcm2835_sdhci_readb()
/rk3399_rockchip-uboot/drivers/rtc/
H A Drtc-uclass.c43 int rtc_read8(struct udevice *dev, unsigned int reg) in rtc_read8()
53 int rtc_write8(struct udevice *dev, unsigned int reg, int val) in rtc_write8()
63 int rtc_read16(struct udevice *dev, unsigned int reg, u16 *valuep) in rtc_read16()
80 int rtc_write16(struct udevice *dev, unsigned int reg, u16 value) in rtc_write16()
93 int rtc_read32(struct udevice *dev, unsigned int reg, u32 *valuep) in rtc_read32()
110 int rtc_write32(struct udevice *dev, unsigned int reg, u32 value) in rtc_write32()
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra114/
H A Dcpu.c23 u32 reg; in enable_cpu_power_rail() local
56 u32 reg; in enable_cpu_clocks() local
80 u32 reg; in remove_cpu_resets() local
190 u32 reg; in is_partition_powered() local
200 u32 reg; in is_clamp_enabled() local
/rk3399_rockchip-uboot/arch/arm/mach-imx/
H A Dmisc.c19 int mxs_wait_mask_set(struct mxs_register_32 *reg, uint32_t mask, unsigned in mxs_wait_mask_set()
31 int mxs_wait_mask_clr(struct mxs_register_32 *reg, uint32_t mask, unsigned in mxs_wait_mask_clr()
43 int mxs_reset_block(struct mxs_register_32 *reg) in mxs_reset_block()
H A Drdc-sema.c19 u32 reg; in imx_rdc_check_sema_required() local
38 u32 reg; in imx_rdc_check_permission() local
54 u8 reg; in imx_rdc_sema_lock() local
84 u8 reg; in imx_rdc_sema_unlock() local
110 u32 reg = 0; in imx_rdc_setup_peri() local
/rk3399_rockchip-uboot/board/freescale/ls1046ardb/
H A Dcpld.c14 u8 cpld_read(unsigned int reg) in cpld_read()
21 void cpld_write(unsigned int reg, u8 value) in cpld_write()
31 u16 reg = CPLD_CFG_RCW_SRC_QSPI; in cpld_set_altbank() local
53 u16 reg = CPLD_CFG_RCW_SRC_QSPI; in cpld_set_defbank() local
72 u16 reg = CPLD_CFG_RCW_SRC_SD; in cpld_set_sd() local
/rk3399_rockchip-uboot/arch/arm/mach-sunxi/
H A Dpmic_bus.c62 int pmic_bus_read(u8 reg, u8 *data) in pmic_bus_read()
79 int pmic_bus_write(u8 reg, u8 data) in pmic_bus_write()
96 int pmic_bus_setbits(u8 reg, u8 bits) in pmic_bus_setbits()
109 int pmic_bus_clrbits(u8 reg, u8 bits) in pmic_bus_clrbits()

12345678910>>...31