xref: /rk3399_rockchip-uboot/arch/x86/include/asm/arch-quark/msg_port.h (revision 13a3972585af60ec367d209cedbd3601e0c77467)
1faa83232SBin Meng /*
2faa83232SBin Meng  * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
3faa83232SBin Meng  *
4faa83232SBin Meng  * SPDX-License-Identifier:	GPL-2.0+
5faa83232SBin Meng  */
6faa83232SBin Meng 
7faa83232SBin Meng #ifndef _QUARK_MSG_PORT_H_
8faa83232SBin Meng #define _QUARK_MSG_PORT_H_
9faa83232SBin Meng 
10faa83232SBin Meng /*
11faa83232SBin Meng  * In the Quark SoC, some chipset commands are accomplished by utilizing
12faa83232SBin Meng  * the internal message network within the host bridge (D0:F0). Accesses
13faa83232SBin Meng  * to this network are accomplished by populating the message control
14faa83232SBin Meng  * register (MCR), Message Control Register eXtension (MCRX) and the
15faa83232SBin Meng  * message data register (MDR).
16faa83232SBin Meng  */
17faa83232SBin Meng #define MSG_CTRL_REG		0xd0	/* Message Control Register */
18faa83232SBin Meng #define MSG_DATA_REG		0xd4	/* Message Data Register */
19faa83232SBin Meng #define MSG_CTRL_EXT_REG	0xd8	/* Message Control Register EXT */
20faa83232SBin Meng 
21faa83232SBin Meng /* Normal Read/Write OpCodes */
22faa83232SBin Meng #define MSG_OP_READ		0x10
23faa83232SBin Meng #define MSG_OP_WRITE		0x11
24faa83232SBin Meng 
25faa83232SBin Meng /* Alternative Read/Write OpCodes */
26faa83232SBin Meng #define MSG_OP_ALT_READ		0x06
27faa83232SBin Meng #define MSG_OP_ALT_WRITE	0x07
28faa83232SBin Meng 
29faa83232SBin Meng /* IO Read/Write OpCodes */
30faa83232SBin Meng #define MSG_OP_IO_READ		0x02
31faa83232SBin Meng #define MSG_OP_IO_WRITE		0x03
32faa83232SBin Meng 
33faa83232SBin Meng /* All byte enables */
34faa83232SBin Meng #define MSG_BYTE_ENABLE		0xf0
35faa83232SBin Meng 
36faa83232SBin Meng #ifndef __ASSEMBLY__
37faa83232SBin Meng 
38faa83232SBin Meng /**
39faa83232SBin Meng  * msg_port_setup - set up the message port control register
40faa83232SBin Meng  *
41faa83232SBin Meng  * @op:     message bus access opcode
42faa83232SBin Meng  * @port:   port number on the message bus
43faa83232SBin Meng  * @reg:    register number within a port
44faa83232SBin Meng  */
45faa83232SBin Meng void msg_port_setup(int op, int port, int reg);
46faa83232SBin Meng 
47faa83232SBin Meng /**
48faa83232SBin Meng  * msg_port_read - read a message port register using normal opcode
49faa83232SBin Meng  *
50faa83232SBin Meng  * @port:   port number on the message bus
51faa83232SBin Meng  * @reg:    register number within a port
52faa83232SBin Meng  *
53faa83232SBin Meng  * @return: message port register value
54faa83232SBin Meng  */
55faa83232SBin Meng u32 msg_port_read(u8 port, u32 reg);
56faa83232SBin Meng 
57faa83232SBin Meng /**
58faa83232SBin Meng  * msg_port_write - write a message port register using normal opcode
59faa83232SBin Meng  *
60faa83232SBin Meng  * @port:   port number on the message bus
61faa83232SBin Meng  * @reg:    register number within a port
62faa83232SBin Meng  * @value:  register value to write
63faa83232SBin Meng  */
64faa83232SBin Meng void msg_port_write(u8 port, u32 reg, u32 value);
65faa83232SBin Meng 
66faa83232SBin Meng /**
67faa83232SBin Meng  * msg_port_alt_read - read a message port register using alternative opcode
68faa83232SBin Meng  *
69faa83232SBin Meng  * @port:   port number on the message bus
70faa83232SBin Meng  * @reg:    register number within a port
71faa83232SBin Meng  *
72faa83232SBin Meng  * @return: message port register value
73faa83232SBin Meng  */
74faa83232SBin Meng u32 msg_port_alt_read(u8 port, u32 reg);
75faa83232SBin Meng 
76faa83232SBin Meng /**
77faa83232SBin Meng  * msg_port_alt_write - write a message port register using alternative opcode
78faa83232SBin Meng  *
79faa83232SBin Meng  * @port:   port number on the message bus
80faa83232SBin Meng  * @reg:    register number within a port
81faa83232SBin Meng  * @value:  register value to write
82faa83232SBin Meng  */
83faa83232SBin Meng void msg_port_alt_write(u8 port, u32 reg, u32 value);
84faa83232SBin Meng 
85faa83232SBin Meng /**
86faa83232SBin Meng  * msg_port_io_read - read a message port register using I/O opcode
87faa83232SBin Meng  *
88faa83232SBin Meng  * @port:   port number on the message bus
89faa83232SBin Meng  * @reg:    register number within a port
90faa83232SBin Meng  *
91faa83232SBin Meng  * @return: message port register value
92faa83232SBin Meng  */
93faa83232SBin Meng u32 msg_port_io_read(u8 port, u32 reg);
94faa83232SBin Meng 
95faa83232SBin Meng /**
96faa83232SBin Meng  * msg_port_io_write - write a message port register using I/O opcode
97faa83232SBin Meng  *
98faa83232SBin Meng  * @port:   port number on the message bus
99faa83232SBin Meng  * @reg:    register number within a port
100faa83232SBin Meng  * @value:  register value to write
101faa83232SBin Meng  */
102faa83232SBin Meng void msg_port_io_write(u8 port, u32 reg, u32 value);
103faa83232SBin Meng 
104*d0b3e3bfSBin Meng /* clrbits, setbits, clrsetbits macros for message port access */
105*d0b3e3bfSBin Meng 
106*d0b3e3bfSBin Meng #define msg_port_normal_read	msg_port_read
107*d0b3e3bfSBin Meng #define msg_port_normal_write	msg_port_write
108*d0b3e3bfSBin Meng 
109*d0b3e3bfSBin Meng #define msg_port_generic_clrsetbits(type, port, reg, clr, set)		\
110*d0b3e3bfSBin Meng 	msg_port_##type##_write(port, reg,				\
111*d0b3e3bfSBin Meng 				(msg_port_##type##_read(port, reg)	\
112*d0b3e3bfSBin Meng 				& ~(clr)) | (set))
113*d0b3e3bfSBin Meng 
114*d0b3e3bfSBin Meng #define msg_port_clrbits(port, reg, clr)		\
115*d0b3e3bfSBin Meng 	msg_port_generic_clrsetbits(normal, port, reg, clr, 0)
116*d0b3e3bfSBin Meng #define msg_port_setbits(port, reg, set)		\
117*d0b3e3bfSBin Meng 	msg_port_generic_clrsetbits(normal, port, reg, 0, set)
118*d0b3e3bfSBin Meng #define msg_port_clrsetbits(port, reg, clr, set)	\
119*d0b3e3bfSBin Meng 	msg_port_generic_clrsetbits(normal, port, reg, clr, set)
120*d0b3e3bfSBin Meng 
121*d0b3e3bfSBin Meng #define msg_port_alt_clrbits(port, reg, clr)		\
122*d0b3e3bfSBin Meng 	msg_port_generic_clrsetbits(alt, port, reg, clr, 0)
123*d0b3e3bfSBin Meng #define msg_port_alt_setbits(port, reg, set)		\
124*d0b3e3bfSBin Meng 	msg_port_generic_clrsetbits(alt, port, reg, 0, set)
125*d0b3e3bfSBin Meng #define msg_port_alt_clrsetbits(port, reg, clr, set)	\
126*d0b3e3bfSBin Meng 	msg_port_generic_clrsetbits(alt, port, reg, clr, set)
127*d0b3e3bfSBin Meng 
128*d0b3e3bfSBin Meng #define msg_port_io_clrbits(port, reg, clr)		\
129*d0b3e3bfSBin Meng 	msg_port_generic_clrsetbits(io, port, reg, clr, 0)
130*d0b3e3bfSBin Meng #define msg_port_io_setbits(port, reg, set)		\
131*d0b3e3bfSBin Meng 	msg_port_generic_clrsetbits(io, port, reg, 0, set)
132*d0b3e3bfSBin Meng #define msg_port_io_clrsetbits(port, reg, clr, set)	\
133*d0b3e3bfSBin Meng 	msg_port_generic_clrsetbits(io, port, reg, clr, set)
134*d0b3e3bfSBin Meng 
135faa83232SBin Meng #endif /* __ASSEMBLY__ */
136faa83232SBin Meng 
137faa83232SBin Meng #endif /* _QUARK_MSG_PORT_H_ */
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