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/OK3568_Linux_fs/kernel/drivers/net/wireless/quantenna/qtnfmac/pcie/
H A Dpearl_pcie_regs.h8 #define PCIE_HDP_CTRL(base) ((base) + 0x2c00) argument
9 #define PCIE_HDP_AXI_CTRL(base) ((base) + 0x2c04) argument
10 #define PCIE_HDP_HOST_WR_DESC0(base) ((base) + 0x2c10) argument
11 #define PCIE_HDP_HOST_WR_DESC0_H(base) ((base) + 0x2c14) argument
12 #define PCIE_HDP_HOST_WR_DESC1(base) ((base) + 0x2c18) argument
13 #define PCIE_HDP_HOST_WR_DESC1_H(base) ((base) + 0x2c1c) argument
14 #define PCIE_HDP_HOST_WR_DESC2(base) ((base) + 0x2c20) argument
15 #define PCIE_HDP_HOST_WR_DESC2_H(base) ((base) + 0x2c24) argument
16 #define PCIE_HDP_HOST_WR_DESC3(base) ((base) + 0x2c28) argument
17 #define PCIE_HDP_HOST_WR_DESC4_H(base) ((base) + 0x2c2c) argument
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H A Dtopaz_pcie_regs.h8 #define PCIE_DMA_WR_INTR_STATUS(base) ((base) + 0x9bc) argument
9 #define PCIE_DMA_WR_INTR_MASK(base) ((base) + 0x9c4) argument
10 #define PCIE_DMA_WR_INTR_CLR(base) ((base) + 0x9c8) argument
11 #define PCIE_DMA_WR_ERR_STATUS(base) ((base) + 0x9cc) argument
12 #define PCIE_DMA_WR_DONE_IMWR_ADDR_LOW(base) ((base) + 0x9D0) argument
13 #define PCIE_DMA_WR_DONE_IMWR_ADDR_HIGH(base) ((base) + 0x9d4) argument
15 #define PCIE_DMA_RD_INTR_STATUS(base) ((base) + 0x310) argument
16 #define PCIE_DMA_RD_INTR_MASK(base) ((base) + 0x319) argument
17 #define PCIE_DMA_RD_INTR_CLR(base) ((base) + 0x31c) argument
18 #define PCIE_DMA_RD_ERR_STATUS_LOW(base) ((base) + 0x324) argument
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/OK3568_Linux_fs/u-boot/board/micronas/vct/vctv/
H A Dreg_ebi.h17 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
19 #define EBI_IO_ACCS_DATA(base) ((base) + EBI_IO_ACCS_DATA_OFFS) argument
21 #define EBI_CPU_IO_ACCS2(base) ((base) + EBI_CPU_IO_ACCS2_OFFS) argument
23 #define EBI_IO_ACCS2_DATA(base) ((base) + EBI_IO_ACCS2_DATA_OFFS) argument
25 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
27 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
29 #define EBI_IRQ_MASK2(base) ((base) + EBI_IRQ_MASK2_OFFS) argument
31 #define EBI_TAG1_SYS_ID(base) ((base) + EBI_TAG1_SYS_ID_OFFS) argument
33 #define EBI_TAG2_SYS_ID(base) ((base) + EBI_TAG2_SYS_ID_OFFS) argument
35 #define EBI_TAG3_SYS_ID(base) ((base) + EBI_TAG3_SYS_ID_OFFS) argument
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/OK3568_Linux_fs/u-boot/board/micronas/vct/vcth2/
H A Dreg_ebi.h17 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
19 #define EBI_IO_ACCS_DATA(base) ((base) + EBI_IO_ACCS_DATA_OFFS) argument
21 #define EBI_CPU_IO_ACCS2(base) ((base) + EBI_CPU_IO_ACCS2_OFFS) argument
23 #define EBI_IO_ACCS2_DATA(base) ((base) + EBI_IO_ACCS2_DATA_OFFS) argument
25 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
27 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
29 #define EBI_IRQ_MASK2(base) ((base) + EBI_IRQ_MASK2_OFFS) argument
31 #define EBI_TAG1_SYS_ID(base) ((base) + EBI_TAG1_SYS_ID_OFFS) argument
33 #define EBI_TAG2_SYS_ID(base) ((base) + EBI_TAG2_SYS_ID_OFFS) argument
35 #define EBI_TAG3_SYS_ID(base) ((base) + EBI_TAG3_SYS_ID_OFFS) argument
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/OK3568_Linux_fs/u-boot/board/micronas/vct/vcth/
H A Dreg_ebi.h17 #define EBI_CPU_IO_ACCS(base) ((base) + EBI_CPU_IO_ACCS_OFFS) argument
19 #define EBI_IO_ACCS_DATA(base) ((base) + EBI_IO_ACCS_DATA_OFFS) argument
21 #define EBI_CTRL(base) ((base) + EBI_CTRL_OFFS) argument
23 #define EBI_IRQ_MASK(base) ((base) + EBI_IRQ_MASK_OFFS) argument
25 #define EBI_TAG1_SYS_ID(base) ((base) + EBI_TAG1_SYS_ID_OFFS) argument
27 #define EBI_TAG2_SYS_ID(base) ((base) + EBI_TAG2_SYS_ID_OFFS) argument
29 #define EBI_TAG3_SYS_ID(base) ((base) + EBI_TAG3_SYS_ID_OFFS) argument
31 #define EBI_TAG4_SYS_ID(base) ((base) + EBI_TAG4_SYS_ID_OFFS) argument
33 #define EBI_GEN_DMA_CTRL(base) ((base) + EBI_GEN_DMA_CTRL_OFFS) argument
35 #define EBI_STATUS(base) ((base) + EBI_STATUS_OFFS) argument
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H A Dreg_fwsram.h22 #define FWSRAM_SR_ADDR_OFFSET(base) ((base) + FWSRAM_SR_ADDR_OFFSET_OFFS) argument
24 #define FWSRAM_TOP_BOOT_LOG(base) ((base) + FWSRAM_TOP_BOOT_LOG_OFFS) argument
26 #define FWSRAM_TOP_ROM_KBIST(base) ((base) + FWSRAM_TOP_ROM_KBIST_OFFS) argument
28 #define FWSRAM_TOP_CID1_H(base) ((base) + FWSRAM_TOP_CID1_H_OFFS) argument
30 #define FWSRAM_TOP_CID1_L(base) ((base) + FWSRAM_TOP_CID1_L_OFFS) argument
32 #define FWSRAM_TOP_CID2_H(base) ((base) + FWSRAM_TOP_CID2_H_OFFS) argument
34 #define FWSRAM_TOP_CID2_L(base) ((base) + FWSRAM_TOP_CID2_L_OFFS) argument
36 #define FWSRAM_TOP_TDO_CFG(base) ((base) + FWSRAM_TOP_TDO_CFG_OFFS) argument
38 #define FWSRAM_TOP_GPIO2_0_CFG(base) ((base) + FWSRAM_TOP_GPIO2_0_CFG_OFFS) argument
40 #define FWSRAM_TOP_GPIO2_1_CFG(base) ((base) + FWSRAM_TOP_GPIO2_1_CFG_OFFS) argument
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H A Dreg_scc.h57 #define SCC_ENABLE(base) ((base) + SCC_ENABLE_OFFS) argument
59 #define SCC_RESET(base) ((base) + SCC_RESET_OFFS) argument
61 #define SCC_VCID(base) ((base) + SCC_VCID_OFFS) argument
63 #define SCC_MCI_CFG(base) ((base) + SCC_MCI_CFG_OFFS) argument
65 #define SCC_PACKET_CFG1(base) ((base) + SCC_PACKET_CFG1_OFFS) argument
67 #define SCC_PACKET_CFG2(base) ((base) + SCC_PACKET_CFG2_OFFS) argument
69 #define SCC_PACKET_CFG3(base) ((base) + SCC_PACKET_CFG3_OFFS) argument
71 #define SCC_DMA_CFG(base) ((base) + SCC_DMA_CFG_OFFS) argument
73 #define SCC_CMD(base) ((base) + SCC_CMD_OFFS) argument
75 #define SCC_PRIO(base) ((base) + SCC_PRIO_OFFS) argument
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/sun4i/
H A Dsun8i_vi_scaler.h30 #define SUN8I_SCALER_VSU_CTRL(base) ((base) + 0x0) argument
31 #define SUN50I_SCALER_VSU_SCALE_MODE(base) ((base) + 0x10) argument
32 #define SUN50I_SCALER_VSU_DIR_THR(base) ((base) + 0x20) argument
33 #define SUN50I_SCALER_VSU_EDGE_THR(base) ((base) + 0x24) argument
34 #define SUN50I_SCALER_VSU_EDSCL_CTRL(base) ((base) + 0x28) argument
35 #define SUN50I_SCALER_VSU_ANGLE_THR(base) ((base) + 0x2c) argument
36 #define SUN8I_SCALER_VSU_OUTSIZE(base) ((base) + 0x40) argument
37 #define SUN8I_SCALER_VSU_YINSIZE(base) ((base) + 0x80) argument
38 #define SUN8I_SCALER_VSU_YHSTEP(base) ((base) + 0x88) argument
39 #define SUN8I_SCALER_VSU_YVSTEP(base) ((base) + 0x8c) argument
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H A Dsun8i_ui_layer.h17 #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR(base, layer) \ argument
19 #define SUN8I_MIXER_CHAN_UI_LAYER_SIZE(base, layer) \ argument
21 #define SUN8I_MIXER_CHAN_UI_LAYER_COORD(base, layer) \ argument
23 #define SUN8I_MIXER_CHAN_UI_LAYER_PITCH(base, layer) \ argument
25 #define SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(base, layer) \ argument
27 #define SUN8I_MIXER_CHAN_UI_LAYER_BOT_LADDR(base, layer) \ argument
29 #define SUN8I_MIXER_CHAN_UI_LAYER_FCOLOR(base, layer) \ argument
31 #define SUN8I_MIXER_CHAN_UI_TOP_HADDR(base) \ argument
33 #define SUN8I_MIXER_CHAN_UI_BOT_HADDR(base) \ argument
35 #define SUN8I_MIXER_CHAN_UI_OVL_SIZE(base) \ argument
H A Dsun8i_vi_layer.h11 #define SUN8I_MIXER_CHAN_VI_LAYER_ATTR(base, layer) \ argument
13 #define SUN8I_MIXER_CHAN_VI_LAYER_SIZE(base, layer) \ argument
15 #define SUN8I_MIXER_CHAN_VI_LAYER_COORD(base, layer) \ argument
17 #define SUN8I_MIXER_CHAN_VI_LAYER_PITCH(base, layer, plane) \ argument
19 #define SUN8I_MIXER_CHAN_VI_LAYER_TOP_LADDR(base, layer, plane) \ argument
21 #define SUN8I_MIXER_CHAN_VI_OVL_SIZE(base) \ argument
23 #define SUN8I_MIXER_CHAN_VI_HDS_Y(base) \ argument
25 #define SUN8I_MIXER_CHAN_VI_HDS_UV(base) \ argument
27 #define SUN8I_MIXER_CHAN_VI_VDS_Y(base) \ argument
29 #define SUN8I_MIXER_CHAN_VI_VDS_UV(base) \ argument
H A Dsun8i_ui_scaler.h26 #define SUN8I_SCALER_GSU_CTRL(base) ((base) + 0x0) argument
27 #define SUN8I_SCALER_GSU_OUTSIZE(base) ((base) + 0x40) argument
28 #define SUN8I_SCALER_GSU_INSIZE(base) ((base) + 0x80) argument
29 #define SUN8I_SCALER_GSU_HSTEP(base) ((base) + 0x88) argument
30 #define SUN8I_SCALER_GSU_VSTEP(base) ((base) + 0x8c) argument
31 #define SUN8I_SCALER_GSU_HPHASE(base) ((base) + 0x90) argument
32 #define SUN8I_SCALER_GSU_VPHASE(base) ((base) + 0x98) argument
33 #define SUN8I_SCALER_GSU_HCOEFF(base, index) ((base) + 0x200 + 0x4 * (index)) argument
/OK3568_Linux_fs/kernel/drivers/media/platform/s5p-jpeg/
H A Djpeg-hw-exynos4.c16 void exynos4_jpeg_sw_reset(void __iomem *base) in exynos4_jpeg_sw_reset()
32 void exynos4_jpeg_set_enc_dec_mode(void __iomem *base, unsigned int mode) in exynos4_jpeg_set_enc_dec_mode()
52 void __exynos4_jpeg_set_img_fmt(void __iomem *base, unsigned int img_fmt, in __exynos4_jpeg_set_img_fmt()
136 void __exynos4_jpeg_set_enc_out_fmt(void __iomem *base, unsigned int out_fmt, in __exynos4_jpeg_set_enc_out_fmt()
169 void exynos4_jpeg_set_interrupt(void __iomem *base, unsigned int version) in exynos4_jpeg_set_interrupt()
183 unsigned int exynos4_jpeg_get_int_status(void __iomem *base) in exynos4_jpeg_get_int_status()
188 unsigned int exynos4_jpeg_get_fifo_status(void __iomem *base) in exynos4_jpeg_get_fifo_status()
193 void exynos4_jpeg_set_huf_table_enable(void __iomem *base, int value) in exynos4_jpeg_set_huf_table_enable()
207 void exynos4_jpeg_set_sys_int_enable(void __iomem *base, int value) in exynos4_jpeg_set_sys_int_enable()
219 void exynos4_jpeg_set_stream_buf_address(void __iomem *base, in exynos4_jpeg_set_stream_buf_address()
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/OK3568_Linux_fs/kernel/drivers/scsi/
H A Dnsp32_io.h12 static inline void nsp32_write1(unsigned int base, in nsp32_write1()
19 static inline unsigned char nsp32_read1(unsigned int base, in nsp32_read1()
25 static inline void nsp32_write2(unsigned int base, in nsp32_write2()
32 static inline unsigned short nsp32_read2(unsigned int base, in nsp32_read2()
38 static inline void nsp32_write4(unsigned int base, in nsp32_write4()
45 static inline unsigned long nsp32_read4(unsigned int base, in nsp32_read4()
53 static inline void nsp32_mmio_write1(unsigned long base, in nsp32_mmio_write1()
64 static inline unsigned char nsp32_mmio_read1(unsigned long base, in nsp32_mmio_read1()
74 static inline void nsp32_mmio_write2(unsigned long base, in nsp32_mmio_write2()
85 static inline unsigned short nsp32_mmio_read2(unsigned long base, in nsp32_mmio_read2()
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H A Daha1740.h19 #define HID0(base) (base + 0x0) argument
20 #define HID1(base) (base + 0x1) argument
21 #define HID2(base) (base + 0x2) argument
22 #define HID3(base) (base + 0x3) argument
23 #define EBCNTRL(base) (base + 0x4) argument
24 #define PORTADR(base) (base + 0x40) argument
25 #define BIOSADR(base) (base + 0x41) argument
26 #define INTDEF(base) (base + 0x42) argument
27 #define SCSIDEF(base) (base + 0x43) argument
28 #define BUSDEF(base) (base + 0x44) argument
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H A Dmyrs.c106 void __iomem *base = cs->io_base; in myrs_qcmd() local
485 void __iomem *base = cs->io_base; in myrs_enable_mmio_mbox() local
2403 static inline void DAC960_GEM_hw_mbox_new_cmd(void __iomem *base) in DAC960_GEM_hw_mbox_new_cmd()
2410 static inline void DAC960_GEM_ack_hw_mbox_status(void __iomem *base) in DAC960_GEM_ack_hw_mbox_status()
2417 static inline void DAC960_GEM_gen_intr(void __iomem *base) in DAC960_GEM_gen_intr()
2424 static inline void DAC960_GEM_reset_ctrl(void __iomem *base) in DAC960_GEM_reset_ctrl()
2431 static inline void DAC960_GEM_mem_mbox_new_cmd(void __iomem *base) in DAC960_GEM_mem_mbox_new_cmd()
2438 static inline bool DAC960_GEM_hw_mbox_is_full(void __iomem *base) in DAC960_GEM_hw_mbox_is_full()
2446 static inline bool DAC960_GEM_init_in_progress(void __iomem *base) in DAC960_GEM_init_in_progress()
2454 static inline void DAC960_GEM_ack_hw_mbox_intr(void __iomem *base) in DAC960_GEM_ack_hw_mbox_intr()
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H A Dmyrb.c165 void __iomem *base = cb->io_base; in myrb_qcmd() local
810 void __iomem *base = cb->io_base; in myrb_enable_mmio() local
2548 static inline void DAC960_LA_hw_mbox_new_cmd(void __iomem *base) in DAC960_LA_hw_mbox_new_cmd()
2553 static inline void DAC960_LA_ack_hw_mbox_status(void __iomem *base) in DAC960_LA_ack_hw_mbox_status()
2558 static inline void DAC960_LA_gen_intr(void __iomem *base) in DAC960_LA_gen_intr()
2563 static inline void DAC960_LA_reset_ctrl(void __iomem *base) in DAC960_LA_reset_ctrl()
2568 static inline void DAC960_LA_mem_mbox_new_cmd(void __iomem *base) in DAC960_LA_mem_mbox_new_cmd()
2573 static inline bool DAC960_LA_hw_mbox_is_full(void __iomem *base) in DAC960_LA_hw_mbox_is_full()
2580 static inline bool DAC960_LA_init_in_progress(void __iomem *base) in DAC960_LA_init_in_progress()
2587 static inline void DAC960_LA_ack_hw_mbox_intr(void __iomem *base) in DAC960_LA_ack_hw_mbox_intr()
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/OK3568_Linux_fs/kernel/drivers/video/rockchip/iep/
H A Dhw_iep_reg.h377 #define IEP_REGB_V_REVERSE_DISP(base, x) ConfRegBits32(base, RAW_rIEP_CONFIG0,rIEP_CONFIG0… argument
378 #define IEP_REGB_H_REVERSE_DISP(base, x) ConfRegBits32(base, RAW_rIEP_CONFIG0,rIEP_CONFIG0… argument
379 #define IEP_REGB_SCL_EN(base, x) ConfRegBits32(base, RAW_rIEP_CONFIG0,rIEP_CONFIG0… argument
380 #define IEP_REGB_SCL_SEL(base, x) ConfRegBits32(base, RAW_rIEP_CONFIG0,rIEP_CONFIG0… argument
381 #define IEP_REGB_SCL_UP_COE_SEL(base, x) ConfRegBits32(base, RAW_rIEP_CONFIG0,rIEP_CONFIG0… argument
382 #define IEP_REGB_DIL_EI_SEL(base, x) ConfRegBits32(base, RAW_rIEP_CONFIG0,rIEP_CONFIG0… argument
383 #define IEP_REGB_DIL_EI_RADIUS(base, x) ConfRegBits32(base, RAW_rIEP_CONFIG0,rIEP_CONFIG0… argument
384 #define IEP_REGB_CON_GAM_ORDER(base, x) ConfRegBits32(base, RAW_rIEP_CONFIG0,rIEP_CONFIG0… argument
385 #define IEP_REGB_RGB_ENH_SEL(base, x) ConfRegBits32(base, RAW_rIEP_CONFIG0,rIEP_CONFIG0… argument
386 #define IEP_REGB_RGB_CON_GAM_EN(base, x) ConfRegBits32(base, RAW_rIEP_CONFIG0,rIEP_CONFIG0… argument
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/OK3568_Linux_fs/external/xserver/hw/xfree86/common/
H A Dcompiler.h402 xf86ReadMmio8(__volatile__ void *base, const unsigned long offset) in xf86ReadMmio8()
414 xf86ReadMmio16Be(__volatile__ void *base, const unsigned long offset) in xf86ReadMmio16Be()
426 xf86ReadMmio16Le(__volatile__ void *base, const unsigned long offset) in xf86ReadMmio16Le()
438 xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset) in xf86ReadMmio32Be()
450 xf86ReadMmio32Le(__volatile__ void *base, const unsigned long offset) in xf86ReadMmio32Le()
462 xf86WriteMmio8(__volatile__ void *base, const unsigned long offset, in xf86WriteMmio8()
474 xf86WriteMmio16Be(__volatile__ void *base, const unsigned long offset, in xf86WriteMmio16Be()
486 xf86WriteMmio16Le(__volatile__ void *base, const unsigned long offset, in xf86WriteMmio16Le()
498 xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset, in xf86WriteMmio32Be()
510 xf86WriteMmio32Le(__volatile__ void *base, const unsigned long offset, in xf86WriteMmio32Le()
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/OK3568_Linux_fs/kernel/drivers/media/platform/mtk-jpeg/
H A Dmtk_jpeg_dec_hw.c192 u32 mtk_jpeg_dec_get_int_status(void __iomem *base) in mtk_jpeg_dec_get_int_status()
219 void mtk_jpeg_dec_start(void __iomem *base) in mtk_jpeg_dec_start()
224 static void mtk_jpeg_dec_soft_reset(void __iomem *base) in mtk_jpeg_dec_soft_reset()
231 static void mtk_jpeg_dec_hard_reset(void __iomem *base) in mtk_jpeg_dec_hard_reset()
237 void mtk_jpeg_dec_reset(void __iomem *base) in mtk_jpeg_dec_reset()
243 static void mtk_jpeg_dec_set_brz_factor(void __iomem *base, u8 yscale_w, in mtk_jpeg_dec_set_brz_factor()
253 static void mtk_jpeg_dec_set_dst_bank0(void __iomem *base, u32 addr_y, in mtk_jpeg_dec_set_dst_bank0()
264 static void mtk_jpeg_dec_set_dst_bank1(void __iomem *base, u32 addr_y, in mtk_jpeg_dec_set_dst_bank1()
272 static void mtk_jpeg_dec_set_mem_stride(void __iomem *base, u32 stride_y, in mtk_jpeg_dec_set_mem_stride()
279 static void mtk_jpeg_dec_set_img_stride(void __iomem *base, u32 stride_y, in mtk_jpeg_dec_set_img_stride()
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/OK3568_Linux_fs/u-boot/drivers/net/
H A Dtsi108_eth.c45 #define __REG32(base, offset) (*((volatile u32 *)((char *)(base) + (offset)))) argument
47 #define reg_MAC_CONFIG_1(base) __REG32(base, 0x00000000) argument
62 #define reg_MAC_CONFIG_2(base) __REG32(base, 0x00000004) argument
73 #define reg_MAXIMUM_FRAME_LENGTH(base) __REG32(base, 0x00000010) argument
75 #define reg_MII_MGMT_CONFIG(base) __REG32(base, 0x00000020) argument
81 #define reg_MII_MGMT_COMMAND(base) __REG32(base, 0x00000024) argument
85 #define reg_MII_MGMT_ADDRESS(base) __REG32(base, 0x00000028) argument
86 #define reg_MII_MGMT_CONTROL(base) __REG32(base, 0x0000002c) argument
87 #define reg_MII_MGMT_STATUS(base) __REG32(base, 0x00000030) argument
89 #define reg_MII_MGMT_INDICATORS(base) __REG32(base, 0x00000034) argument
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/OK3568_Linux_fs/u-boot/arch/arm/mach-keystone/
H A Dddr3.c25 void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg) in ddr3_init_ddrphy()
102 void ddr3_init_ddremif(u32 base, struct ddr3_emif_config *emif_cfg) in ddr3_init_ddremif()
113 int ddr3_ecc_support_rmw(u32 base) in ddr3_ecc_support_rmw()
125 static void ddr3_ecc_config(u32 base, u32 value) in ddr3_ecc_config()
149 static void ddr3_reset_data(u32 base, u32 ddr3_size) in ddr3_reset_data()
239 static void ddr3_ecc_init_range(u32 base) in ddr3_ecc_init_range()
252 void ddr3_enable_ecc(u32 base, int test) in ddr3_enable_ecc()
272 void ddr3_disable_ecc(u32 base) in ddr3_disable_ecc()
278 static void cic_init(u32 base) in cic_init()
291 static void cic_map_cic_to_gic(u32 base, u32 chan_num, u32 irq_num) in cic_map_cic_to_gic()
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/OK3568_Linux_fs/kernel/arch/arm/mm/
H A Dcache-l2x0.c65 static void l2c_write_sec(unsigned long val, void __iomem *base, unsigned reg) in l2c_write_sec()
80 static inline void l2c_set_debug(void __iomem *base, unsigned long val) in l2c_set_debug()
91 static inline void l2c_unlock(void __iomem *base, unsigned num) in l2c_unlock()
103 static void l2c_configure(void __iomem *base) in l2c_configure()
112 static void l2c_enable(void __iomem *base, unsigned num_lock) in l2c_enable()
134 void __iomem *base = l2x0_base; in l2c_disable() local
143 static void l2c_save(void __iomem *base) in l2c_save()
150 void __iomem *base = l2x0_base; in l2c_resume() local
173 static void __l2c210_cache_sync(void __iomem *base) in __l2c210_cache_sync()
189 void __iomem *base = l2x0_base; in l2c210_inv_range() local
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/OK3568_Linux_fs/kernel/lib/
H A Dkstrtox.c24 const char *_parse_integer_fixup_radix(const char *s, unsigned int *base) in _parse_integer_fixup_radix()
49 unsigned int _parse_integer_limit(const char *s, unsigned int base, unsigned long long *p, in _parse_integer_limit()
87 unsigned int _parse_integer(const char *s, unsigned int base, unsigned long long *p) in _parse_integer()
92 static int _kstrtoull(const char *s, unsigned int base, unsigned long long *res) in _kstrtoull()
127 int kstrtoull(const char *s, unsigned int base, unsigned long long *res) in kstrtoull()
150 int kstrtoll(const char *s, unsigned int base, long long *res) in kstrtoll()
175 int _kstrtoul(const char *s, unsigned int base, unsigned long *res) in _kstrtoul()
191 int _kstrtol(const char *s, unsigned int base, long *res) in _kstrtol()
221 int kstrtouint(const char *s, unsigned int base, unsigned int *res) in kstrtouint()
251 int kstrtoint(const char *s, unsigned int base, int *res) in kstrtoint()
[all …]
/OK3568_Linux_fs/kernel/drivers/scsi/pcmcia/
H A Dnsp_io.h30 static inline void nsp_write(unsigned int base, in nsp_write()
37 static inline unsigned char nsp_read(unsigned int base, in nsp_read()
75 static inline void nsp_fifo8_read(unsigned int base, in nsp_fifo8_read()
94 static inline void nsp_fifo16_read(unsigned int base, in nsp_fifo16_read()
113 static inline void nsp_fifo32_read(unsigned int base, in nsp_fifo32_read()
132 static inline void nsp_fifo8_write(unsigned int base, in nsp_fifo8_write()
150 static inline void nsp_fifo16_write(unsigned int base, in nsp_fifo16_write()
168 static inline void nsp_fifo32_write(unsigned int base, in nsp_fifo32_write()
178 static inline void nsp_mmio_write(unsigned long base, in nsp_mmio_write()
187 static inline unsigned char nsp_mmio_read(unsigned long base, in nsp_mmio_read()
[all …]
/OK3568_Linux_fs/kernel/arch/powerpc/boot/
H A Dcrt0.S229 #define SAVE_GPR(n, base) std n,8*(n)(base) argument
230 #define REST_GPR(n, base) ld n,8*(n)(base) argument
231 #define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base) argument
232 #define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base) argument
233 #define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base) argument
234 #define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base) argument
235 #define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base) argument
236 #define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base) argument
237 #define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base) argument
238 #define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base) argument

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