xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/sun4i/sun8i_ui_layer.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) Icenowy Zheng <icenowy@aosc.io>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Based on sun4i_layer.h, which is:
6*4882a593Smuzhiyun  *   Copyright (C) 2015 Free Electrons
7*4882a593Smuzhiyun  *   Copyright (C) 2015 NextThing Co
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  *   Maxime Ripard <maxime.ripard@free-electrons.com>
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #ifndef _SUN8I_UI_LAYER_H_
13*4882a593Smuzhiyun #define _SUN8I_UI_LAYER_H_
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include <drm/drm_plane.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR(base, layer) \
18*4882a593Smuzhiyun 			((base) + 0x20 * (layer) + 0x0)
19*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_UI_LAYER_SIZE(base, layer) \
20*4882a593Smuzhiyun 			((base) + 0x20 * (layer) + 0x4)
21*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_UI_LAYER_COORD(base, layer) \
22*4882a593Smuzhiyun 			((base) + 0x20 * (layer) + 0x8)
23*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_UI_LAYER_PITCH(base, layer) \
24*4882a593Smuzhiyun 			((base) + 0x20 * (layer) + 0xc)
25*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(base, layer) \
26*4882a593Smuzhiyun 			((base) + 0x20 * (layer) + 0x10)
27*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_UI_LAYER_BOT_LADDR(base, layer) \
28*4882a593Smuzhiyun 			((base) + 0x20 * (layer) + 0x14)
29*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_UI_LAYER_FCOLOR(base, layer) \
30*4882a593Smuzhiyun 			((base) + 0x20 * (layer) + 0x18)
31*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_UI_TOP_HADDR(base) \
32*4882a593Smuzhiyun 			((base) + 0x80)
33*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_UI_BOT_HADDR(base) \
34*4882a593Smuzhiyun 			((base) + 0x84)
35*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_UI_OVL_SIZE(base) \
36*4882a593Smuzhiyun 			((base) + 0x88)
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN		BIT(0)
39*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_MASK	GENMASK(2, 1)
40*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_MASK	GENMASK(12, 8)
41*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_OFFSET	8
42*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MASK	GENMASK(31, 24)
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun struct sun8i_mixer;
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun struct sun8i_ui_layer {
47*4882a593Smuzhiyun 	struct drm_plane	plane;
48*4882a593Smuzhiyun 	struct sun8i_mixer	*mixer;
49*4882a593Smuzhiyun 	int			channel;
50*4882a593Smuzhiyun 	int			overlay;
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun static inline struct sun8i_ui_layer *
plane_to_sun8i_ui_layer(struct drm_plane * plane)54*4882a593Smuzhiyun plane_to_sun8i_ui_layer(struct drm_plane *plane)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun 	return container_of(plane, struct sun8i_ui_layer, plane);
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun struct sun8i_ui_layer *sun8i_ui_layer_init_one(struct drm_device *drm,
60*4882a593Smuzhiyun 					       struct sun8i_mixer *mixer,
61*4882a593Smuzhiyun 					       int index);
62*4882a593Smuzhiyun #endif /* _SUN8I_UI_LAYER_H_ */
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