1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) Jernej Skrabec <jernej.skrabec@siol.net>
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #ifndef _SUN8I_VI_LAYER_H_
7*4882a593Smuzhiyun #define _SUN8I_VI_LAYER_H_
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <drm/drm_plane.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_VI_LAYER_ATTR(base, layer) \
12*4882a593Smuzhiyun ((base) + 0x30 * (layer) + 0x0)
13*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_VI_LAYER_SIZE(base, layer) \
14*4882a593Smuzhiyun ((base) + 0x30 * (layer) + 0x4)
15*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_VI_LAYER_COORD(base, layer) \
16*4882a593Smuzhiyun ((base) + 0x30 * (layer) + 0x8)
17*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_VI_LAYER_PITCH(base, layer, plane) \
18*4882a593Smuzhiyun ((base) + 0x30 * (layer) + 0xc + 4 * (plane))
19*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_VI_LAYER_TOP_LADDR(base, layer, plane) \
20*4882a593Smuzhiyun ((base) + 0x30 * (layer) + 0x18 + 4 * (plane))
21*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_VI_OVL_SIZE(base) \
22*4882a593Smuzhiyun ((base) + 0xe8)
23*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_VI_HDS_Y(base) \
24*4882a593Smuzhiyun ((base) + 0xf0)
25*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_VI_HDS_UV(base) \
26*4882a593Smuzhiyun ((base) + 0xf4)
27*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_VI_VDS_Y(base) \
28*4882a593Smuzhiyun ((base) + 0xf8)
29*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_VI_VDS_UV(base) \
30*4882a593Smuzhiyun ((base) + 0xfc)
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN BIT(0)
33*4882a593Smuzhiyun /* RGB mode should be set for RGB formats and cleared for YCbCr */
34*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE BIT(15)
35*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_OFFSET 8
36*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_MASK GENMASK(12, 8)
37*4882a593Smuzhiyun #define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MASK GENMASK(31, 24)
38*4882a593Smuzhiyun #define SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA(x) ((x) << 24)
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_VI_DS_N(x) ((x) << 16)
41*4882a593Smuzhiyun #define SUN8I_MIXER_CHAN_VI_DS_M(x) ((x) << 0)
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun struct sun8i_mixer;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun struct sun8i_vi_layer {
46*4882a593Smuzhiyun struct drm_plane plane;
47*4882a593Smuzhiyun struct sun8i_mixer *mixer;
48*4882a593Smuzhiyun int channel;
49*4882a593Smuzhiyun int overlay;
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun static inline struct sun8i_vi_layer *
plane_to_sun8i_vi_layer(struct drm_plane * plane)53*4882a593Smuzhiyun plane_to_sun8i_vi_layer(struct drm_plane *plane)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun return container_of(plane, struct sun8i_vi_layer, plane);
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm,
59*4882a593Smuzhiyun struct sun8i_mixer *mixer,
60*4882a593Smuzhiyun int index);
61*4882a593Smuzhiyun #endif /* _SUN8I_VI_LAYER_H_ */
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