Introduce timeout_init_us/timeout_elapsed() delay tracking with CNTPCT.

timeout_init_us(some_timeout_us); returns a reference to detect
timeout for the provided microsecond delay value from current

Introduce timeout_init_us/timeout_elapsed() delay tracking with CNTPCT.

timeout_init_us(some_timeout_us); returns a reference to detect
timeout for the provided microsecond delay value from current time.

timeout_elapsed(reference) return true/false whether the reference
timeout is elapsed.

This change is inspired by the OP-TEE OS timeout resources [1].

[1] https://github.com/OP-TEE/optee_os/blob/3.4.0/core/arch/arm/include/kernel/delay.h#L45

Change-Id: Id81ff48aa49693f555dc621064878417101d5587
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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stm32mp1: remove some dependencies on clocks and reset in drivers

Include all RCC, clocks and reset headers from stm32mp1_def.h
which if exported to the firmware through platform_def.h.
The same dep

stm32mp1: remove some dependencies on clocks and reset in drivers

Include all RCC, clocks and reset headers from stm32mp1_def.h
which if exported to the firmware through platform_def.h.
The same dependency removal is done in common code as well.
Some useless includes are also removed in stm32_sdmmc2 driver.

Change-Id: I731ea5775c3fdb7f7b0c388b93923ed5e84b8d3f
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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stm32mp1: make functions and macros more common

Mainly remove suffix 1 from prefix stm32mp1 in several macros and functions
that can be used in drivers shared by different platforms.

Change-Id: I22

stm32mp1: make functions and macros more common

Mainly remove suffix 1 from prefix stm32mp1 in several macros and functions
that can be used in drivers shared by different platforms.

Change-Id: I2295c44f5b1edac7e80a93c0e8dfd671b36e88e7
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

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stm32mp1: split code between common and private parts

Some parts of code could be shared with platform derivatives,
or new platforms.
A new folder plat/st/common is created to put common parts.

stm

stm32mp1: split code between common and private parts

Some parts of code could be shared with platform derivatives,
or new platforms.
A new folder plat/st/common is created to put common parts.

stm32mp_common.h is a common API aggregate.

Remove some casts where applicable.
Fix some types where applicable.
Remove also some platform includes that are already in stm32mp1_def.h.

Change-Id: I46d763c8d9e15732d1ee7383207fd58206d7f583
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

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Merge pull request #1820 from thloh85-intel/integration_mbr

drivers: partition: Add simple MBR partition entries support

Merge pull request #1819 from thloh85-intel/integration

plat: intel: Fix faulty DDR calibration value

Merge pull request #1813 from oscardagrach/hikey960-iomcu-dma

hikey960: enable IOMCU DMAC

docs: Update note about plat/arm in Porting Guide

Platforms are not allowed to use any file inside include/plat/arm or
plat/arm to prevent dependencies between Arm platforms and non-Arm
platforms.

docs: Update note about plat/arm in Porting Guide

Platforms are not allowed to use any file inside include/plat/arm or
plat/arm to prevent dependencies between Arm platforms and non-Arm
platforms.

Change-Id: I6dc336ab71134c8d2758761fac0e4716e2d7e6ff
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Merge pull request #1816 from grandpaul/paulliu-warp7-multiconsoleapi

imx: warp7: Migrate to MULTI_CONSOLE_API

Merge pull request #1814 from glneo/ti-sci-async

TI-SCI asynchronous power down sequencing

plat: intel: Fix faulty DDR calibration value

A DDR calibration value is missing write mask, causing ECC DDR calibration
to fail. This patch addresses the issue. ECC should also be scrubbed before
M

plat: intel: Fix faulty DDR calibration value

A DDR calibration value is missing write mask, causing ECC DDR calibration
to fail. This patch addresses the issue. ECC should also be scrubbed before
MMU initializes, thus the scrubbing is moved to ddr intialization phase.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>

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drivers: partition: Add simple MBR partition entries support

This is to add simple MBR partition entry support. This will read all four
MBR partition into the partition list, and the partition type

drivers: partition: Add simple MBR partition entries support

This is to add simple MBR partition entry support. This will read all four
MBR partition into the partition list, and the partition type will be saved
in the list.name[0] entry.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>

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Merge pull request #1812 from antonio-nino-diaz-arm/an/fix-cortex

Fix CPU headers' definitions

Merge pull request #1817 from antonio-nino-diaz-arm/an/spd-includes

Sanitize SPD include paths

Merge pull request #1818 from pbeesley-arm/doc-links

doc: Fix broken external links

fvp: trusty: Move dynamic xlat enable to platform

Rather than letting the Trusty makefile set the option to enable dynamic
translation tables, make platforms do it themselves.

This also allows plat

fvp: trusty: Move dynamic xlat enable to platform

Rather than letting the Trusty makefile set the option to enable dynamic
translation tables, make platforms do it themselves.

This also allows platforms to replace the implementation of the
translation tables library as long as they use the same function
prototypes.

Change-Id: Ia60904f61709ac323addcb57f7a83391d9e21cd0
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Sanitize SPD include paths

Commit 09d40e0e0828 ("Sanitise includes across codebase") modified the
include paths of the TSP includes but it didn't remove the include path
from the makefile or did the

Sanitize SPD include paths

Commit 09d40e0e0828 ("Sanitise includes across codebase") modified the
include paths of the TSP includes but it didn't remove the include path
from the makefile or did the same for TLK. This patch does the remaining
work.

Change-Id: Iecee2e88fabcd06989d35568c3a4c1f4e7d93572
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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imx: warp7: Migrate to MULTI_CONSOLE_API

This commit migrates to MULTI_CONSOLE_API for IMX Warp7 board.
We also rename the functions in imx_uart driver to more specific one.

Signed-off-by: Ying-Chu

imx: warp7: Migrate to MULTI_CONSOLE_API

This commit migrates to MULTI_CONSOLE_API for IMX Warp7 board.
We also rename the functions in imx_uart driver to more specific one.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>

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ti: k3: common: Do not release processor control on startup

ATF should be the only host needing to control a processor that it has
started. ATF will need this control to stop the core later. Do not

ti: k3: common: Do not release processor control on startup

ATF should be the only host needing to control a processor that it has
started. ATF will need this control to stop the core later. Do not
relinquish control of a core after starting the core.

Signed-off-by: Andrew F. Davis <afd@ti.com>

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ti: k3: drivers: ti_sci: Use non-blocking TI-SCI messages for power down

Now that we have non-blocking TI-SCI functions we can initiate the shutdown
sequence from the PSCI handler without needing th

ti: k3: drivers: ti_sci: Use non-blocking TI-SCI messages for power down

Now that we have non-blocking TI-SCI functions we can initiate the shutdown
sequence from the PSCI handler without needing the ti_sci_proc_shutdown
helper function, which is removed. This gives us the greater control and
flexibility that will be needed when cluster power down sequences are added.

Signed-off-by: Andrew F. Davis <afd@ti.com>

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ti: k3: drivers: ti_sci: Add non-blocking TI-SCI messages

Most TI-SCI functions request an ACK and wait until it is received. For
some power sequence tasks we cannot wait but instead queue messages

ti: k3: drivers: ti_sci: Add non-blocking TI-SCI messages

Most TI-SCI functions request an ACK and wait until it is received. For
some power sequence tasks we cannot wait but instead queue messages
asynchronously. Three messages have been identified that will need to
be used in this way. Add non-waiting versions of these functions.

Signed-off-by: Andrew F. Davis <afd@ti.com>

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ti: k3: drivers: ti_sci: Request and check for ACK by default

Currently almost all TI-SCI messages request and check for an ACK from
the system firmware. Move this into a common place to remove the

ti: k3: drivers: ti_sci: Request and check for ACK by default

Currently almost all TI-SCI messages request and check for an ACK from
the system firmware. Move this into a common place to remove the same
from each function.

Signed-off-by: Andrew F. Davis <afd@ti.com>

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ti: k3: drivers: ti_sci: Add exclusive device accessors

When a device is requested with TI-SCI its control can be made exclusive
to the requesting host. This was currently the default but is not wha

ti: k3: drivers: ti_sci: Add exclusive device accessors

When a device is requested with TI-SCI its control can be made exclusive
to the requesting host. This was currently the default but is not what
is needed most of the time. Add _exclusive versions of the request
functions and remove the exclusive flag from the default version.

Signed-off-by: Andrew F. Davis <afd@ti.com>

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ti: k3: drivers: ti_sci: Internalize raw get/set state functions

The raw get and set state functions for both devices and clocks
are only meant for use internal to the TI-SCI driver, the same
functi

ti: k3: drivers: ti_sci: Internalize raw get/set state functions

The raw get and set state functions for both devices and clocks
are only meant for use internal to the TI-SCI driver, the same
functionality is available from the other API that call into
these. Remove them from the external interface and make them
static scope to the driver.

Signed-off-by: Andrew F. Davis <afd@ti.com>

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hikey960: enable IOMCU DMAC

There exists a third DMA controller on the hi3660
SoC called the IOMCU DMAC. This controller is used by
peripherals like SPI2 and UART3. Initialize channels 4-7
as non-se

hikey960: enable IOMCU DMAC

There exists a third DMA controller on the hi3660
SoC called the IOMCU DMAC. This controller is used by
peripherals like SPI2 and UART3. Initialize channels 4-7
as non-secure, while 0-3 remain reserved and secure.

Signed-off-by: Ryan Grachek <ryan@edited.us>

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