1 /* 2 * Copyright (c) 2017-2019, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <errno.h> 8 #include <stdbool.h> 9 10 #include <libfdt.h> 11 12 #include <platform_def.h> 13 14 #include <common/debug.h> 15 #include <drivers/delay_timer.h> 16 #include <drivers/st/stm32mp_pmic.h> 17 #include <drivers/st/stm32_gpio.h> 18 #include <drivers/st/stpmic1.h> 19 #include <lib/mmio.h> 20 #include <lib/utils_def.h> 21 22 /* I2C Timing hard-coded value, for I2C clock source is HSI at 64MHz */ 23 #define I2C_TIMING 0x10D07DB5 24 25 #define I2C_TIMEOUT 0xFFFFF 26 27 #define MASK_RESET_BUCK3 BIT(2) 28 29 #define STPMIC1_LDO12356_OUTPUT_MASK (uint8_t)(GENMASK(6, 2)) 30 #define STPMIC1_LDO12356_OUTPUT_SHIFT 2 31 #define STPMIC1_LDO3_MODE (uint8_t)(BIT(7)) 32 #define STPMIC1_LDO3_DDR_SEL 31U 33 #define STPMIC1_LDO3_1800000 (9U << STPMIC1_LDO12356_OUTPUT_SHIFT) 34 35 #define STPMIC1_BUCK_OUTPUT_SHIFT 2 36 #define STPMIC1_BUCK3_1V8 (39U << STPMIC1_BUCK_OUTPUT_SHIFT) 37 38 #define STPMIC1_DEFAULT_START_UP_DELAY_MS 1 39 40 static struct i2c_handle_s i2c_handle; 41 static uint32_t pmic_i2c_addr; 42 43 static int dt_get_pmic_node(void *fdt) 44 { 45 return fdt_node_offset_by_compatible(fdt, -1, "st,stpmic1"); 46 } 47 48 bool dt_check_pmic(void) 49 { 50 int node; 51 void *fdt; 52 53 if (fdt_get_address(&fdt) == 0) { 54 return false; 55 } 56 57 node = dt_get_pmic_node(fdt); 58 if (node < 0) { 59 VERBOSE("%s: No PMIC node found in DT\n", __func__); 60 return false; 61 } 62 63 return fdt_get_status(node); 64 } 65 66 static int dt_pmic_i2c_config(struct dt_node_info *i2c_info) 67 { 68 int pmic_node, i2c_node; 69 void *fdt; 70 const fdt32_t *cuint; 71 72 if (fdt_get_address(&fdt) == 0) { 73 return -ENOENT; 74 } 75 76 pmic_node = dt_get_pmic_node(fdt); 77 if (pmic_node < 0) { 78 return -FDT_ERR_NOTFOUND; 79 } 80 81 cuint = fdt_getprop(fdt, pmic_node, "reg", NULL); 82 if (cuint == NULL) { 83 return -FDT_ERR_NOTFOUND; 84 } 85 86 pmic_i2c_addr = fdt32_to_cpu(*cuint) << 1; 87 if (pmic_i2c_addr > UINT16_MAX) { 88 return -EINVAL; 89 } 90 91 i2c_node = fdt_parent_offset(fdt, pmic_node); 92 if (i2c_node < 0) { 93 return -FDT_ERR_NOTFOUND; 94 } 95 96 dt_fill_device_info(i2c_info, i2c_node); 97 if (i2c_info->base == 0U) { 98 return -FDT_ERR_NOTFOUND; 99 } 100 101 return dt_set_pinctrl_config(i2c_node); 102 } 103 104 int dt_pmic_enable_boot_on_regulators(void) 105 { 106 int pmic_node, regulators_node, regulator_node; 107 void *fdt; 108 109 if (fdt_get_address(&fdt) == 0) { 110 return -ENOENT; 111 } 112 113 pmic_node = dt_get_pmic_node(fdt); 114 if (pmic_node < 0) { 115 return -FDT_ERR_NOTFOUND; 116 } 117 118 regulators_node = fdt_subnode_offset(fdt, pmic_node, "regulators"); 119 120 fdt_for_each_subnode(regulator_node, fdt, regulators_node) { 121 const fdt32_t *cuint; 122 const char *node_name; 123 uint16_t voltage; 124 125 if (fdt_getprop(fdt, regulator_node, "regulator-boot-on", 126 NULL) == NULL) { 127 continue; 128 } 129 130 cuint = fdt_getprop(fdt, regulator_node, 131 "regulator-min-microvolt", NULL); 132 if (cuint == NULL) { 133 continue; 134 } 135 136 /* DT uses microvolts, whereas driver awaits millivolts */ 137 voltage = (uint16_t)(fdt32_to_cpu(*cuint) / 1000U); 138 node_name = fdt_get_name(fdt, regulator_node, NULL); 139 140 if (stpmic1_is_regulator_enabled(node_name) == 0U) { 141 int status; 142 143 status = stpmic1_regulator_voltage_set(node_name, 144 voltage); 145 if (status != 0) { 146 return status; 147 } 148 149 status = stpmic1_regulator_enable(node_name); 150 if (status != 0) { 151 return status; 152 } 153 } 154 } 155 156 return 0; 157 } 158 159 void initialize_pmic_i2c(void) 160 { 161 int ret; 162 struct dt_node_info i2c_info; 163 164 if (dt_pmic_i2c_config(&i2c_info) != 0) { 165 ERROR("I2C configuration failed\n"); 166 panic(); 167 } 168 169 if (stm32mp_clk_enable((uint32_t)i2c_info.clock) < 0) { 170 ERROR("I2C clock enable failed\n"); 171 panic(); 172 } 173 174 /* Initialize PMIC I2C */ 175 i2c_handle.i2c_base_addr = i2c_info.base; 176 i2c_handle.i2c_init.timing = I2C_TIMING; 177 i2c_handle.i2c_init.own_address1 = pmic_i2c_addr; 178 i2c_handle.i2c_init.addressing_mode = I2C_ADDRESSINGMODE_7BIT; 179 i2c_handle.i2c_init.dual_address_mode = I2C_DUALADDRESS_DISABLE; 180 i2c_handle.i2c_init.own_address2 = 0; 181 i2c_handle.i2c_init.own_address2_masks = I2C_OAR2_OA2NOMASK; 182 i2c_handle.i2c_init.general_call_mode = I2C_GENERALCALL_DISABLE; 183 i2c_handle.i2c_init.no_stretch_mode = I2C_NOSTRETCH_DISABLE; 184 185 ret = stm32_i2c_init(&i2c_handle); 186 if (ret != 0) { 187 ERROR("Cannot initialize I2C %x (%d)\n", 188 i2c_handle.i2c_base_addr, ret); 189 panic(); 190 } 191 192 ret = stm32_i2c_config_analog_filter(&i2c_handle, 193 I2C_ANALOGFILTER_ENABLE); 194 if (ret != 0) { 195 ERROR("Cannot initialize I2C analog filter (%d)\n", ret); 196 panic(); 197 } 198 199 ret = stm32_i2c_is_device_ready(&i2c_handle, (uint16_t)pmic_i2c_addr, 1, 200 I2C_TIMEOUT); 201 if (ret != 0) { 202 ERROR("I2C device not ready (%d)\n", ret); 203 panic(); 204 } 205 206 stpmic1_bind_i2c(&i2c_handle, (uint16_t)pmic_i2c_addr); 207 } 208 209 void initialize_pmic(void) 210 { 211 int status; 212 uint8_t read_val; 213 214 initialize_pmic_i2c(); 215 216 status = stpmic1_register_read(VERSION_STATUS_REG, &read_val); 217 if (status != 0) { 218 panic(); 219 } 220 221 INFO("PMIC version = 0x%x\n", read_val); 222 223 /* Keep VDD on during the reset cycle */ 224 status = stpmic1_register_update(MASK_RESET_BUCK_REG, 225 MASK_RESET_BUCK3, 226 MASK_RESET_BUCK3); 227 if (status != 0) { 228 panic(); 229 } 230 } 231 232 int pmic_ddr_power_init(enum ddr_type ddr_type) 233 { 234 bool buck3_at_1v8 = false; 235 uint8_t read_val; 236 int status; 237 238 switch (ddr_type) { 239 case STM32MP_DDR3: 240 /* Set LDO3 to sync mode */ 241 status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val); 242 if (status != 0) { 243 return status; 244 } 245 246 read_val &= ~STPMIC1_LDO3_MODE; 247 read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK; 248 read_val |= STPMIC1_LDO3_DDR_SEL << 249 STPMIC1_LDO12356_OUTPUT_SHIFT; 250 251 status = stpmic1_register_write(LDO3_CONTROL_REG, read_val); 252 if (status != 0) { 253 return status; 254 } 255 256 status = stpmic1_regulator_voltage_set("buck2", 1350); 257 if (status != 0) { 258 return status; 259 } 260 261 status = stpmic1_regulator_enable("buck2"); 262 if (status != 0) { 263 return status; 264 } 265 266 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 267 268 status = stpmic1_regulator_enable("vref_ddr"); 269 if (status != 0) { 270 return status; 271 } 272 273 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 274 275 status = stpmic1_regulator_enable("ldo3"); 276 if (status != 0) { 277 return status; 278 } 279 280 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 281 break; 282 283 case STM32MP_LPDDR2: 284 /* 285 * Set LDO3 to 1.8V 286 * Set LDO3 to bypass mode if BUCK3 = 1.8V 287 * Set LDO3 to normal mode if BUCK3 != 1.8V 288 */ 289 status = stpmic1_register_read(BUCK3_CONTROL_REG, &read_val); 290 if (status != 0) { 291 return status; 292 } 293 294 if ((read_val & STPMIC1_BUCK3_1V8) == STPMIC1_BUCK3_1V8) { 295 buck3_at_1v8 = true; 296 } 297 298 status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val); 299 if (status != 0) { 300 return status; 301 } 302 303 read_val &= ~STPMIC1_LDO3_MODE; 304 read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK; 305 read_val |= STPMIC1_LDO3_1800000; 306 if (buck3_at_1v8) { 307 read_val |= STPMIC1_LDO3_MODE; 308 } 309 310 status = stpmic1_register_write(LDO3_CONTROL_REG, read_val); 311 if (status != 0) { 312 return status; 313 } 314 315 status = stpmic1_regulator_voltage_set("buck2", 1200); 316 if (status != 0) { 317 return status; 318 } 319 320 status = stpmic1_regulator_enable("ldo3"); 321 if (status != 0) { 322 return status; 323 } 324 325 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 326 327 status = stpmic1_regulator_enable("buck2"); 328 if (status != 0) { 329 return status; 330 } 331 332 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 333 334 status = stpmic1_regulator_enable("vref_ddr"); 335 if (status != 0) { 336 return status; 337 } 338 339 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 340 break; 341 342 default: 343 break; 344 }; 345 346 return 0; 347 } 348