1 /* 2 * Copyright (c) 2015-2025, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #if MEASURED_BOOT 10 #include "./include/rpi3_measured_boot.h" 11 #endif 12 13 #include <arch_helpers.h> 14 #include <common/bl_common.h> 15 #include <common/debug.h> 16 #include <common/desc_image_load.h> 17 #include <lib/optee_utils.h> 18 #include <lib/xlat_tables/xlat_mmu_helpers.h> 19 #include <lib/xlat_tables/xlat_tables_defs.h> 20 #include <drivers/generic_delay_timer.h> 21 #include <drivers/rpi3/gpio/rpi3_gpio.h> 22 #include <drivers/rpi3/sdhost/rpi3_sdhost.h> 23 #include <platform_def.h> 24 25 #include <rpi_shared.h> 26 27 /* Data structure which holds the extents of the trusted SRAM for BL2 */ 28 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); 29 30 /* Data structure which holds the MMC info */ 31 static struct mmc_device_info mmc_info; 32 33 /* Variables that hold the eventlog addr and size for use in BL2 Measured Boot */ 34 static uint8_t *event_log_start; 35 static size_t event_log_size; 36 37 static void rpi3_sdhost_setup(void) 38 { 39 struct rpi3_sdhost_params params; 40 41 memset(¶ms, 0, sizeof(struct rpi3_sdhost_params)); 42 params.reg_base = RPI3_SDHOST_BASE; 43 params.bus_width = MMC_BUS_WIDTH_1; 44 params.clk_rate = 50000000; 45 params.clk_rate_initial = (RPI3_SDHOST_MAX_CLOCK / HC_CLOCKDIVISOR_MAXVAL); 46 mmc_info.mmc_dev_type = MMC_IS_SD_HC; 47 mmc_info.ocr_voltage = OCR_3_2_3_3 | OCR_3_3_3_4; 48 rpi3_sdhost_init(¶ms, &mmc_info); 49 } 50 51 void rpi3_mboot_fetch_eventlog_info(uint8_t **eventlog_addr, size_t *eventlog_size) 52 { 53 *eventlog_addr = event_log_start; 54 *eventlog_size = event_log_size; 55 } 56 57 /******************************************************************************* 58 * BL1 has passed the extents of the trusted SRAM that should be visible to BL2 59 * in x0. This memory layout is sitting at the base of the free trusted SRAM. 60 * Copy it to a safe location before its reclaimed by later BL2 functionality. 61 ******************************************************************************/ 62 63 void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1, 64 u_register_t arg2, u_register_t arg3) 65 { 66 meminfo_t *mem_layout = (meminfo_t *) arg1; 67 68 /* Initialize the console to provide early debug support */ 69 rpi3_console_init(); 70 71 /* Enable arch timer */ 72 generic_delay_timer_init(); 73 74 /* Setup GPIO driver */ 75 rpi3_gpio_init(); 76 77 /* Setup the BL2 memory layout */ 78 bl2_tzram_layout = *mem_layout; 79 80 /* Setup SDHost driver */ 81 rpi3_sdhost_setup(); 82 83 /* populate eventlog addr and size for use in bl2 mboot */ 84 event_log_start = (uint8_t *)(uintptr_t)arg2; 85 event_log_size = arg3; 86 87 plat_rpi3_io_setup(); 88 } 89 90 void bl2_platform_setup(void) 91 { 92 /* 93 * This is where a TrustZone address space controller and other 94 * security related peripherals would be configured. 95 */ 96 } 97 98 /******************************************************************************* 99 * Perform the very early platform specific architectural setup here. 100 ******************************************************************************/ 101 void bl2_plat_arch_setup(void) 102 { 103 rpi3_setup_page_tables(bl2_tzram_layout.total_base, 104 bl2_tzram_layout.total_size, 105 BL_CODE_BASE, BL_CODE_END, 106 BL_RO_DATA_BASE, BL_RO_DATA_END 107 #if USE_COHERENT_MEM 108 , BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END 109 #endif 110 ); 111 112 enable_mmu_el1(0); 113 } 114 115 /******************************************************************************* 116 * This function can be used by the platforms to update/use image 117 * information for given `image_id`. 118 ******************************************************************************/ 119 int bl2_plat_handle_post_image_load(unsigned int image_id) 120 { 121 int err = 0; 122 bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id); 123 #ifdef SPD_opteed 124 bl_mem_params_node_t *pager_mem_params = NULL; 125 bl_mem_params_node_t *paged_mem_params = NULL; 126 #endif 127 128 assert(bl_mem_params != NULL); 129 130 switch (image_id) { 131 case BL32_IMAGE_ID: 132 #ifdef SPD_opteed 133 pager_mem_params = get_bl_mem_params_node(BL32_EXTRA1_IMAGE_ID); 134 assert(pager_mem_params); 135 136 paged_mem_params = get_bl_mem_params_node(BL32_EXTRA2_IMAGE_ID); 137 assert(paged_mem_params); 138 139 err = parse_optee_header(&bl_mem_params->ep_info, 140 &pager_mem_params->image_info, 141 &paged_mem_params->image_info); 142 if (err != 0) 143 WARN("OPTEE header parse error.\n"); 144 #endif 145 bl_mem_params->ep_info.spsr = rpi3_get_spsr_for_bl32_entry(); 146 break; 147 148 case BL33_IMAGE_ID: 149 /* BL33 expects to receive the primary CPU MPID (through r0) */ 150 bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr(); 151 bl_mem_params->ep_info.spsr = rpi3_get_spsr_for_bl33_entry(); 152 153 /* Shutting down the SDHost driver to let BL33 drives SDHost.*/ 154 rpi3_sdhost_stop(); 155 break; 156 157 default: 158 /* Do nothing in default case */ 159 break; 160 } 161 162 return err; 163 } 164