tegra: Fix mmap_region_t struct mismatch

Commit fdb1964c34968921379d3592e7ac6e9a685dbab1 ("xlat: Introduce
MAP_REGION2() macro") added a granularity field to mmap_region_t.

Tegra platforms were usi

tegra: Fix mmap_region_t struct mismatch

Commit fdb1964c34968921379d3592e7ac6e9a685dbab1 ("xlat: Introduce
MAP_REGION2() macro") added a granularity field to mmap_region_t.

Tegra platforms were using the v2 xlat_tables implementation in
common/tegra_common.mk, but v1 xlat_tables.h headers in soc/*/plat_setup.c
where arrays are being defined. This caused the next physical address to
be read as granularity, causing EINVAL error and triggering an assert.

Consistently use xlat_tables_v2.h header to avoid this.

Fixes ARM-software/tf-issues#548.

Signed-off-by: Andreas Färber <afaerber@suse.de>

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hikey960: avoid hardcode on uart port

Avoid hardcode on uart port. The uart port could be auto detected
on HiKey960 platform.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

ARM platforms: Fix console address for flush

The console core flush API expects the base address in the first
register, but ARM helpers currently sets the second register with the
base address. This

ARM platforms: Fix console address for flush

The console core flush API expects the base address in the first
register, but ARM helpers currently sets the second register with the
base address. This causes an assert failure.

This patch fixes that.

Change-Id: Ic54c423cd60f2756902ab3cfc77b3de2ac45481e
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

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qemu: Fix interrupt type check

Function plat_ic_get_pending_interrupt_type() should return interrupt
type, not id. The function is used in aarch64 exception handling and
currently the irq/fiq forwar

qemu: Fix interrupt type check

Function plat_ic_get_pending_interrupt_type() should return interrupt
type, not id. The function is used in aarch64 exception handling and
currently the irq/fiq forwarding fails if a secure interrupt happens while
running normal world.

The qemu-specific gic file does not contain any extra functionality so it
can be removed and common file can be used instead.

fixes arm-software/tf-issues#546

Signed-off-by: Santeri Salko <santeri.salko@gmail.com>

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hikey*, poplar: platform.mk: Fix typo in variable assignments

Signed-off-by: Victor Chong <victor.chong@linaro.org>

poplar: Support Trusted OS extra image (OP-TEE header) parsing

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>

poplar: Add LOAD_IMAGE_V2 support

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>

poplar: Add build option for dram size

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>

poplar: Fix typo

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>

poplar: Remove unused function prototype

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>

Merge pull request #1173 from etienne-lms/armv7-qemu

support to boot OP-TEE on AArch32/Armv7+example with Cortex-A15/Qemu

Merge pull request #1224 from masahir0y/gzip

Support GZIP-compressed images for faster loading and verification

qemu: support ARMv7/Cortex-A15

Define Qemu AArch32 implementation for some platform functions
(core position, secondary boot cores, crash console). These are
derived from the AArch64 implementation.

qemu: support ARMv7/Cortex-A15

Define Qemu AArch32 implementation for some platform functions
(core position, secondary boot cores, crash console). These are
derived from the AArch64 implementation.

BL31 on Qemu is needed only for ARMv8 and later. On ARMv7, BL32 is
the first executable image after BL2.

Support SP_MIN and OP-TEE as BL32: create a sp_min make script target
in Qemu, define mapping for IMAGE_BL32

Minor fix Qemu return value type for plat_get_ns_image_entrypoint().

Qemu model for the Cortex-A15 does not support the virtualization
extension although the core expects it. To overcome the issue, Qemu
ARMv7 configuration set ARCH_SUPPORTS_VIRTUALIZATION to 0.

Add missing AArch32 assembly macro arm_print_gic_regs from ARM platform
used by the Qemu platform.

Qemu Cortex-A15 model integrates a single cluster with up to 4 cores.

Change-Id: I65b44399071d6f5aa40d5183be11422b9ee9ca15
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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Merge pull request #1249 from masahir0y/uniphier

uniphier: fix and improve memory layout

uniphier: add ULL to physical address literals

Looks like this is requirement in the pre-merge static analysis.

misra_violation: [Required] MISRA C-2012 Rule 7.2 violation:
Unsigned constants must

uniphier: add ULL to physical address literals

Looks like this is requirement in the pre-merge static analysis.

misra_violation: [Required] MISRA C-2012 Rule 7.2 violation:
Unsigned constants must be declared with U or u suffix.

Adding ULL as requested. I used ULL() macros for BL*_{BASE,LIMIT}
because they are referenced from linker scripts.

Requested-by: David Cunado <david.cunado@arm.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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uniphier: allocate xlat region of on-chip SRAM only when needed

Currently, the xlat region of the on-chip SRAM is always allocated
for all BL images.

The access to the on-chip SRAM is necessary for

uniphier: allocate xlat region of on-chip SRAM only when needed

Currently, the xlat region of the on-chip SRAM is always allocated
for all BL images.

The access to the on-chip SRAM is necessary for loading images from
a USB memory device (i.e. when updating firmware), so unneeded for
the usual boot procedure.

To avoid this waste, allocate the xlat region dynamically only for
BL2, and only when it is necessary.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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uniphier: get back original BL31/32 location used before BL2-AT-EL3

Commit 247fc0435191 ("uniphier: switch to BL2-AT-EL3 and remove BL1
support") accidentally changed the location of BL31 and BL32.

uniphier: get back original BL31/32 location used before BL2-AT-EL3

Commit 247fc0435191 ("uniphier: switch to BL2-AT-EL3 and remove BL1
support") accidentally changed the location of BL31 and BL32. The
new memory map overlaps with the audio DSP images, also gives impact
to OP-TEE. They are both out of control of ARM Trusted Firmware, so
not easy to change. This commit restores the image layout that was
originally used prior to the BL2-AT-EL3 migration.

Reported-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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Merge pull request #1247 from rockchip-linux/rk3399/fixes-memory-corruptions

rockchip/rk3399: Fix memory corruptions or illegal memory access

uniphier: support GZIP-compressed images

Allow to handle GZIP-compressed images by giving FIP_GZIP=1 from the
command line.

- Images are GZIP-compressed, then packed into FIP. If Trusted Board
B

uniphier: support GZIP-compressed images

Allow to handle GZIP-compressed images by giving FIP_GZIP=1 from the
command line.

- Images are GZIP-compressed, then packed into FIP. If Trusted Board
Boot is enabled, certificates are generated based on the compressed
images.

- GZIP decompressor is linked into BL2 to decompress images at
run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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uniphier: add a helper to get image_info

In the next commit, I will have more usecases to get struct image_info
from image ID. It is better to make a helper function at a different
layer. I do not

uniphier: add a helper to get image_info

In the next commit, I will have more usecases to get struct image_info
from image ID. It is better to make a helper function at a different
layer. I do not need the current uniphier_image_descs_fixup() since
the code is small enough to be squashed into the caller side.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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bl1: add bl1_plat_handle_{pre,post}_image_load()

Just like bl2_, add pre/post image load handlers for BL1. No argument
is needed since BL2 is the only image loaded by BL1.

Signed-off-by: Masahiro

bl1: add bl1_plat_handle_{pre,post}_image_load()

Just like bl2_, add pre/post image load handlers for BL1. No argument
is needed since BL2 is the only image loaded by BL1.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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bl2: add bl2_plat_handle_pre_image_load()

There are cases where we need to manipulate image information before
the load. For example, for decompressing data, we cannot load the
compressed images to

bl2: add bl2_plat_handle_pre_image_load()

There are cases where we need to manipulate image information before
the load. For example, for decompressing data, we cannot load the
compressed images to their final destination. Instead, we need to
load them to the temporary buffer for the decompressor.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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plat/common: move arch-agnostic fallback functions to C file

When we add a new callback, we need to duplicate fallbacks among
plat/common/{aarch32,aarch64}/platform_helpers.S This is tedious.

I cr

plat/common: move arch-agnostic fallback functions to C file

When we add a new callback, we need to duplicate fallbacks among
plat/common/{aarch32,aarch64}/platform_helpers.S This is tedious.

I created a new C file, then moved 3 functions:
plat_error_handler
bl2_plat_preload_setup
plat_try_next_boot_source

They are called from C, so I do not see a good reason to implement
them in assembly.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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Build: change the first parameter of TOOL_ADD_IMG to lowercase

In the next commit, I need the image name in lowercase because
output files are generally named in lowercase.

Unfortunately, TOOL_ADD_

Build: change the first parameter of TOOL_ADD_IMG to lowercase

In the next commit, I need the image name in lowercase because
output files are generally named in lowercase.

Unfortunately, TOOL_ADD_IMG takes the first argument in uppercase
since we generally use uppercase Make variables.

make_helpers/build_macros.mk provides 'uppercase' macro to convert
a string into uppercase, but 'lowercase' does not exist. We can
implement it if we like, but it would be more straightforward to
change the argument of TOOL_ADD_IMG.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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Build: rename FIP_ADD_IMG to TOOL_ADD_IMG

Now FIP_ADD_IMG takes care of both fiptool and cert_create
symmetrically. Rename it so that it matches the behavior.

Signed-off-by: Masahiro Yamada <yamad

Build: rename FIP_ADD_IMG to TOOL_ADD_IMG

Now FIP_ADD_IMG takes care of both fiptool and cert_create
symmetrically. Rename it so that it matches the behavior.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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