feat(stm32mp2): manage DDR FW via FIP

This feature is enabled by default using STM32MP_DDR_FIP_IO_STORAGE.

DDR firmware binary is loaded from FIP to SRAM1 which needs to be
mapped.
Only half of the

feat(stm32mp2): manage DDR FW via FIP

This feature is enabled by default using STM32MP_DDR_FIP_IO_STORAGE.

DDR firmware binary is loaded from FIP to SRAM1 which needs to be
mapped.
Only half of the SRAM1 will be allocated to TF-A.
RISAB3 has to be configured to allow access to SRAM1.
Add image ID and update maximum number on platform side also.

Fill related descriptor information, add policy and update numbers.
DDR_TYPE variable is used to identify binary file, and image is now
added in the fiptool command line.

The DDR PHY firmware is not in TF-A repository. It can be found at
https://github.com/STMicroelectronics/stm32-ddr-phy-binary
To ease the selection of the firmware path, STM32MP_DDR_FW_PATH is added
to platform.mk file.

Change-Id: I09ab0a5c63406055a7b5ccd16d65e443de47ca2f
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>

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feat(stm32mp2): introduce DDR type compilation flags

Binary size limitation implies to define DDR type build flags.
User must set one single type in the build command line.
DDR_TYPE is then deduced,

feat(stm32mp2): introduce DDR type compilation flags

Binary size limitation implies to define DDR type build flags.
User must set one single type in the build command line.
DDR_TYPE is then deduced, and will help in relative definitions.
A check routine is implemented to verify correct configuration.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: I87d0a492196efea33831d9c090e6e434cc7c0a1e

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feat(stm32mp2): add minimal support for BL31

Add the required files to compile BL31 on STM32MP2.
Update BL2 configuration to load BL31. The platform boots until BL31,
but stops here as no other bina

feat(stm32mp2): add minimal support for BL31

Add the required files to compile BL31 on STM32MP2.
Update BL2 configuration to load BL31. The platform boots until BL31,
but stops here as no other binaries are loaded as DDR is not
initialized.
At runtime, BL31 will use only the first half of the SYSRAM, the upper
half will be used for non-secure DMA LLIs. To be sure nothing from this
area is still in the cache, invalidate the upper SYSRAM before enabling
BL31 cache. BL31 should then map only first half of the SYSRAM. But it
must temporarily map the upper half read-only, as this is where we will
retrieve BL2 parameters, used to fill registers for next boot stages.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: Ie91527a7a26625624b4b3c65fb6a0ca9dd355dbd

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fix(stm32mp2): remove mapping of BL2 DT area

To prevent from coding issues that could overwrite DT area, we were
mapping this area as read-only on STM32MP1. But on STM32MP2, we need
this area to put

fix(stm32mp2): remove mapping of BL2 DT area

To prevent from coding issues that could overwrite DT area, we were
mapping this area as read-only on STM32MP1. But on STM32MP2, we need
this area to put BL31 binary. We were then using dynamic mapping. But
the area is included in the whole SYSRAM memory mapping. This is not
allowed with dynamic mapping. As no other code is running at this step,
and we know what code is running in BL2, just remove this extra
read-only protection for STM32MP2. A message is added after the post
load process of FW-CONFIG file, as BL2 DT area will be overwritten
after that.
And remove the now useless macros DTB_BASE & DTB_LIMIT.
This corrects Coverity issue: CID 443168.

Change-Id: Ic01d6a443ecf7721380ef39dc570e2d1627008d0
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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feat(stm32mp2): load fw-config file

Add FW_CONFIG_ID entry in bl2_mem_params_descs to be loaded, and add
its parsing in bl2_plat_handle_post_image_load().

Signed-off-by: Yann Gautier <yann.gautier@

feat(stm32mp2): load fw-config file

Add FW_CONFIG_ID entry in bl2_mem_params_descs to be loaded, and add
its parsing in bl2_plat_handle_post_image_load().

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I151289474325067204ffae62e17c2e1e00f79b1c

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feat(stm32mp2): add fw-config compilation

The DT file will be in the FIP, and loaded at the beginning of SYSRAM.
The info for hw-config (U-Boot DT by default) is also added, it will
be loaded just a

feat(stm32mp2): add fw-config compilation

The DT file will be in the FIP, and loaded at the beginning of SYSRAM.
The info for hw-config (U-Boot DT by default) is also added, it will
be loaded just after BL33 (U-Boot binary).

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I9d58428c2d911c5c16cae5164122bf833a847a7d

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feat(stm32mp2): enable DDR sub-system clock

Create a DDR helper files, and add a function to enable DDR clocks
in RCC_DDRCPCFGR register.
Call this ddr_sub_system_clk_init() just before clock driver

feat(stm32mp2): enable DDR sub-system clock

Create a DDR helper files, and add a function to enable DDR clocks
in RCC_DDRCPCFGR register.
Call this ddr_sub_system_clk_init() just before clock driver init,
as it needs to be done before enabling DDR PLL clock (PLL2).

Change-Id: I365d6aa034363d0c036ce2d9f944f077ba86e193
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(stm32mp2): add fixed regulators support

Call fixed_regulator_register() in bl2_el3_plat_arch_setup() to
configure fixed regulators, if any are present in device tree.

Signed-off-by: Yann Gauti

feat(stm32mp2): add fixed regulators support

Call fixed_regulator_register() in bl2_el3_plat_arch_setup() to
configure fixed regulators, if any are present in device tree.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iab2d3a4b6b294727b2b6722a6a13bf3f194ec0f9

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feat(stm32mp2): print board info

Call stm32mp_print_boardinfo() during BL2 setup. As for STM32MP1,
the board info is taken in the dedicated OTP fuse. This fuse will be
taken from device tree.

Signe

feat(stm32mp2): print board info

Call stm32mp_print_boardinfo() during BL2 setup. As for STM32MP1,
the board info is taken in the dedicated OTP fuse. This fuse will be
taken from device tree.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I2de0199378562b459b27427109ce66239316b8d9

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feat(stm32mp2): display CPU info

Print information about CPU type, package and revision.
SoC revision ID of MP2 family are defined with the OTP 102.

Signed-off-by: Maxime Méré <maxime.mere@foss.st.

feat(stm32mp2): display CPU info

Print information about CPU type, package and revision.
SoC revision ID of MP2 family are defined with the OTP 102.

Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I14a95c8a7cb9b06ce32c2e592ae69a1741067e8d

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feat(stm32mp2): get chip ID

Add a function to get chip ID from SYSCFG peripheral.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I32b15fca00e52d31f253e02873ab01b804399658

feat(stm32mp2): add BL2 boot first steps

Configure the first steps for STM32MP2 BL2 platform boot:
- Save boot context address for later use
- Configure BL2 MMU
- Load and use BL2 DT
- Reset backup

feat(stm32mp2): add BL2 boot first steps

Configure the first steps for STM32MP2 BL2 platform boot:
- Save boot context address for later use
- Configure BL2 MMU
- Load and use BL2 DT
- Reset backup domain
- Initialize clocks
- Configure UART for console
- Print some info about board and reset reason
- Setup storage (only SD-card for the moment)

The platform boot stops at BL2 image load, as bl2_mem_params_descs[]
is still empty.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: If6127cfbf77825a03afe8d65ba47c8c0661de496

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feat(st-reset): add stm32mp2_reset driver

This driver manages the resets of the peripherals embedded in STM32MP2.
Like clock driver, it also uses the RCC peripheral.

Change-Id: I8217891bdf1b847925a

feat(st-reset): add stm32mp2_reset driver

This driver manages the resets of the peripherals embedded in STM32MP2.
Like clock driver, it also uses the RCC peripheral.

Change-Id: I8217891bdf1b847925aad77f3f6ef542f08d1fba
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(st-clock): add STM32MP2 clock driver

This driver manages the clocks on STM32MP2 platforms.
It uses a dedicated RCC (Reset and Clock Control) peripheral.

Change-Id: I6ba2173e73222269a2dfca4c689

feat(st-clock): add STM32MP2 clock driver

This driver manages the clocks on STM32MP2 platforms.
It uses a dedicated RCC (Reset and Clock Control) peripheral.

Change-Id: I6ba2173e73222269a2dfca4c6897229276a150c0
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>

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refactor(st): move FWU support to common code

Move PLAT_PARTITION_MAX_ENTRIES and all other definitions linked to it
to common.mk.
Move drivers/fwu/fwu.mk inclusion there as well.

Signed-off-by: Ya

refactor(st): move FWU support to common code

Move PLAT_PARTITION_MAX_ENTRIES and all other definitions linked to it
to common.mk.
Move drivers/fwu/fwu.mk inclusion there as well.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I5dde65e41908d706328cb8929582f827ceeff841

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refactor(st): use GPIO banks definition from bindings

Use GPIO banks definition from bindings.

Change-Id: I4dcf321345e319af78285e940b72a1369569b996
Signed-off-by: Pascal Paillet <p.paillet@st.com>

feat(stm32mp2): use early traces

Replace ERROR message with EARLY_ERROR for OTP driver probe, as this
will be called before default console is enabled.

Signed-off-by: Yann Gautier <yann.gautier@st.

feat(stm32mp2): use early traces

Replace ERROR message with EARLY_ERROR for OTP driver probe, as this
will be called before default console is enabled.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I756a04727c494d5f681a45d47d01189dff07dbe7

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refactor(st): replace STM32MP_EARLY_CONSOLE with EARLY_CONSOLE

Now that EARLY_CONSOLE is generic, use it instead of the ST flag.
Remove stm32mp_setup_early_console() calls as it is done in common TF

refactor(st): replace STM32MP_EARLY_CONSOLE with EARLY_CONSOLE

Now that EARLY_CONSOLE is generic, use it instead of the ST flag.
Remove stm32mp_setup_early_console() calls as it is done in common TF-A
code.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Icac29b62a6267303cb5c679d15847c013ead1d23

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feat(stm32mp2): add STM32MP_USB_PROGRAMMER compilation

Add minimal compilation step when enabling STM32MP_USB_PROGRAMMER flag
on STM32MP2. Add DWL_BUFFER_BASE in platform.mk and the compilation
of t

feat(stm32mp2): add STM32MP_USB_PROGRAMMER compilation

Add minimal compilation step when enabling STM32MP_USB_PROGRAMMER flag
on STM32MP2. Add DWL_BUFFER_BASE in platform.mk and the compilation
of the new file plat/st/stm32mp2/stm32mp2_usb_dfu.c (just stubs for
the moment).

Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I8891ff23ddc3d40d7477ada3e49e439dd8af8316

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feat(stm32mp2): add BSEC and OTP support

Add compilation and initialization of BSEC peripheral, to access OTP
fuses. Add the definition of OTP fuses.

Signed-off-by: Yann Gautier <yann.gautier@st.co

feat(stm32mp2): add BSEC and OTP support

Add compilation and initialization of BSEC peripheral, to access OTP
fuses. Add the definition of OTP fuses.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: If6403838b1e2c04c59effc8545b381aced5f7cda

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fix(stm32mp2): add missing include

Without #include <plat/common/platform.h>, we have the following warning
with sparse:
plat/st/stm32mp2/bl2_plat_setup.c:15:6: warning: symbol
'bl2_el3_early_platf

fix(stm32mp2): add missing include

Without #include <plat/common/platform.h>, we have the following warning
with sparse:
plat/st/stm32mp2/bl2_plat_setup.c:15:6: warning: symbol
'bl2_el3_early_platform_setup' was not declared. Should it be static?
plat/st/stm32mp2/bl2_plat_setup.c:23:6: warning: symbol
'bl2_platform_setup' was not declared. Should it be static?
plat/st/stm32mp2/bl2_plat_setup.c:27:6: warning: symbol
'bl2_el3_plat_arch_setup' was not declared. Should it be static?

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I18f9265c1eef1f8e8e0eac3d6c37a959e5c9e8b6

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feat(st): do not directly call BSEC functions in common code

When STM32MP2 boots on Cortex-M33, the Cortex-A35 do no more have access
to BSEC peripheral. New static inline stm32_otp_* wrappers are a

feat(st): do not directly call BSEC functions in common code

When STM32MP2 boots on Cortex-M33, the Cortex-A35 do no more have access
to BSEC peripheral. New static inline stm32_otp_* wrappers are added,
which just redirect to BSEC functions.

While at it remove a useless bsec.h include.

Change-Id: Ie0f917c02e48acf456634f455dae41805bf6adbf
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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feat(stm32mp2): put back core 1 in wfi after debugger's halt

The core 1 is put in wfi for pen holding. If a debugger halts the
core, it causes the core to exit from wfi.

Let the core to jump back i

feat(stm32mp2): put back core 1 in wfi after debugger's halt

The core 1 is put in wfi for pen holding. If a debugger halts the
core, it causes the core to exit from wfi.

Let the core to jump back in wfi when the debugger resumes the
core's execution.

Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Change-Id: I9b5607b05cdcde905dc4047af8d6f1292d53d701

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feat(stm32mp2): add plat_my_core_pos

This function is required, at least for bakery locks.

Change-Id: I28906c50e0a0ebff5d387a424247513ec1a599fc
Signed-off-by: Yann Gautier <yann.gautier@st.com>

fix(stm32mp2): correct early/crash console init

The former code, using x2 register, was removing the LPEN bit from UART
config register. So the UART clock is stopped as soon as the CA35 is in
CSleep

fix(stm32mp2): correct early/crash console init

The former code, using x2 register, was removing the LPEN bit from UART
config register. So the UART clock is stopped as soon as the CA35 is in
CSleep. It was then displaying crap in Linux console.
The ands check instruction is replaced with a clearer tst instruction
directly with the bit to be tested.

Change-Id: I8a2b3ab195981dee2962e0c2f5d501d5933c17f4
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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